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iiconf.c (38775) iiconf.c (40782)
1/*-
2 * Copyright (c) 1998 Nicolas Souchu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 1998 Nicolas Souchu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $Id: iiconf.c,v 1.1.1.11 1998/08/29 17:02:05 son Exp $
26 * $Id: iiconf.c,v 1.1.1.1 1998/09/03 20:51:50 nsouch Exp $
27 *
28 */
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/kernel.h>
32#include <sys/malloc.h>
33#include <sys/module.h>
34#include <sys/bus.h>

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66 child = device_add_child(parent, "iicbus", -1, NULL);
67
68 if (child)
69 device_set_desc(child, "Philips I2C bus");
70
71 return (child);
72}
73
27 *
28 */
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/kernel.h>
32#include <sys/malloc.h>
33#include <sys/module.h>
34#include <sys/bus.h>

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66 child = device_add_child(parent, "iicbus", -1, NULL);
67
68 if (child)
69 device_set_desc(child, "Philips I2C bus");
70
71 return (child);
72}
73
74static int
75iicbus_poll(struct iicbus_softc *sc, int how)
76{
77 int error;
78
79 switch (how) {
80 case (IIC_WAIT | IIC_INTR):
81 error = tsleep(sc, IICPRI|PCATCH, "iicreq", 0);
82 break;
83
84 case (IIC_WAIT | IIC_NOINTR):
85 error = tsleep(sc, IICPRI, "iicreq", 0);
86 break;
87
88 default:
89 return (EWOULDBLOCK);
90 break;
91 }
92
93 return (error);
94}
95
74/*
75 * iicbus_request_bus()
76 *
77 * Allocate the device to perform transfers.
78 *
79 * how : IIC_WAIT or IIC_DONTWAIT
80 */
81int
82iicbus_request_bus(device_t bus, device_t dev, int how)
83{
84 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
85 int s, error = 0;
86
96/*
97 * iicbus_request_bus()
98 *
99 * Allocate the device to perform transfers.
100 *
101 * how : IIC_WAIT or IIC_DONTWAIT
102 */
103int
104iicbus_request_bus(device_t bus, device_t dev, int how)
105{
106 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
107 int s, error = 0;
108
109 /* first, ask the underlying layers if the request is ok */
110 do {
111 error = IICBUS_CALLBACK(device_get_parent(bus),
112 IIC_REQUEST_BUS, (caddr_t)&how);
113 if (error)
114 error = iicbus_poll(sc, how);
115 } while (error);
116
87 while (!error) {
88 s = splhigh();
89 if (sc->owner) {
90 splx(s);
91
117 while (!error) {
118 s = splhigh();
119 if (sc->owner) {
120 splx(s);
121
92 switch (how) {
93 case (IIC_WAIT | IIC_INTR):
94 error = tsleep(sc, IICPRI|PCATCH, "iicreq", 0);
95 break;
96
97 case (IIC_WAIT | IIC_NOINTR):
98 error = tsleep(sc, IICPRI, "iicreq", 0);
99 break;
100
101 default:
102 return (EWOULDBLOCK);
103 break;
104 }
105
122 error = iicbus_poll(sc, how);
106 } else {
107 sc->owner = dev;
108
109 splx(s);
110 return (0);
111 }
112 }
113

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118 * iicbus_release_bus()
119 *
120 * Release the device allocated with iicbus_request_dev()
121 */
122int
123iicbus_release_bus(device_t bus, device_t dev)
124{
125 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
123 } else {
124 sc->owner = dev;
125
126 splx(s);
127 return (0);
128 }
129 }
130

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135 * iicbus_release_bus()
136 *
137 * Release the device allocated with iicbus_request_dev()
138 */
139int
140iicbus_release_bus(device_t bus, device_t dev)
141{
142 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
126 int s;
143 int s, error;
127
144
145 /* first, ask the underlying layers if the release is ok */
146 error = IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS, NULL);
147
148 if (error)
149 return (error);
150
128 s = splhigh();
129 if (sc->owner != dev) {
130 splx(s);
131 return (EACCES);
132 }
133
134 sc->owner = 0;
135 splx(s);

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146 * Write a block of data to slave ; start/stop protocol managed
147 */
148int
149iicbus_block_write(device_t bus, u_char slave, char *buf, int len, int *sent)
150{
151 u_char addr = slave & ~LSB;
152 int error;
153
151 s = splhigh();
152 if (sc->owner != dev) {
153 splx(s);
154 return (EACCES);
155 }
156
157 sc->owner = 0;
158 splx(s);

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169 * Write a block of data to slave ; start/stop protocol managed
170 */
171int
172iicbus_block_write(device_t bus, u_char slave, char *buf, int len, int *sent)
173{
174 u_char addr = slave & ~LSB;
175 int error;
176
154 if ((error = iicbus_start(bus, addr)))
177 if ((error = iicbus_start(bus, addr, 0)))
155 return (error);
156
178 return (error);
179
157 error = iicbus_write(bus, buf, len, sent);
180 error = iicbus_write(bus, buf, len, sent, 0);
158
159 iicbus_stop(bus);
160
161 return (error);
162}
163
164/*
165 * iicbus_block_read()
166 *
167 * Read a block of data from slave ; start/stop protocol managed
168 */
169int
170iicbus_block_read(device_t bus, u_char slave, char *buf, int len, int *read)
171{
172 u_char addr = slave | LSB;
173 int error;
174
181
182 iicbus_stop(bus);
183
184 return (error);
185}
186
187/*
188 * iicbus_block_read()
189 *
190 * Read a block of data from slave ; start/stop protocol managed
191 */
192int
193iicbus_block_read(device_t bus, u_char slave, char *buf, int len, int *read)
194{
195 u_char addr = slave | LSB;
196 int error;
197
175 if ((error = iicbus_start(bus, addr)))
198 if ((error = iicbus_start(bus, addr, 0)))
176 return (error);
177
199 return (error);
200
178 error = iicbus_read(bus, buf, len, read);
201 error = iicbus_read(bus, buf, len, read, IIC_LAST_READ, 0);
179
202
180 /* STOP condition sent at adapter level */
203 iicbus_stop(bus);
181
182 return (error);
183}
184
185/*
186 * iicbus_get_addr()
187 *
188 * Get the I2C 7 bits address of the device
189 */
190u_char
191iicbus_get_addr(device_t dev)
192{
193 u_long addr;
194 device_t parent = device_get_parent(dev);
195
196 BUS_READ_IVAR(parent, dev, IICBUS_IVAR_ADDR, &addr);
197
198 return ((u_char)addr);
199}
204
205 return (error);
206}
207
208/*
209 * iicbus_get_addr()
210 *
211 * Get the I2C 7 bits address of the device
212 */
213u_char
214iicbus_get_addr(device_t dev)
215{
216 u_long addr;
217 device_t parent = device_get_parent(dev);
218
219 BUS_READ_IVAR(parent, dev, IICBUS_IVAR_ADDR, &addr);
220
221 return ((u_char)addr);
222}
200
201u_char
202iicbus_get_own_address(device_t bus)
203{
204 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
205
206 return (sc->ownaddr);
207}