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idavar.h (111979) idavar.h (124471)
1/*-
2 * Copyright (c) 1999,2000 Jonathan Lemon
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 1999,2000 Jonathan Lemon
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/ida/idavar.h 111979 2003-03-08 08:01:31Z phk $
26 * $FreeBSD: head/sys/dev/ida/idavar.h 124471 2004-01-13 11:28:21Z mdodd $
27 */
28
29/*
30 * software structures for the Compaq RAID controller
31 */
32
33#ifndef _IDAVAR_H
27 */
28
29/*
30 * software structures for the Compaq RAID controller
31 */
32
33#ifndef _IDAVAR_H
34#define _IDAVAR_H
34#define _IDAVAR_H
35
35
36#define ida_inb(ida, port) \
36#define ida_inb(ida, port) \
37 bus_space_read_1((ida)->tag, (ida)->bsh, port)
37 bus_space_read_1((ida)->tag, (ida)->bsh, port)
38#define ida_inw(ida, port) \
38#define ida_inw(ida, port) \
39 bus_space_read_2((ida)->tag, (ida)->bsh, port)
39 bus_space_read_2((ida)->tag, (ida)->bsh, port)
40#define ida_inl(ida, port) \
40#define ida_inl(ida, port) \
41 bus_space_read_4((ida)->tag, (ida)->bsh, port)
42
41 bus_space_read_4((ida)->tag, (ida)->bsh, port)
42
43#define ida_outb(ida, port, val) \
43#define ida_outb(ida, port, val) \
44 bus_space_write_1((ida)->tag, (ida)->bsh, port, val)
44 bus_space_write_1((ida)->tag, (ida)->bsh, port, val)
45#define ida_outw(ida, port, val) \
45#define ida_outw(ida, port, val) \
46 bus_space_write_2((ida)->tag, (ida)->bsh, port, val)
46 bus_space_write_2((ida)->tag, (ida)->bsh, port, val)
47#define ida_outl(ida, port, val) \
47#define ida_outl(ida, port, val) \
48 bus_space_write_4((ida)->tag, (ida)->bsh, port, val)
49
50struct ida_hdr {
51 u_int8_t drive; /* logical drive */
52 u_int8_t priority; /* block priority */
53 u_int16_t size; /* size of request, in words */
54};
55

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63 u_int8_t spare; /* reserved */
64};
65
66struct ida_sgb {
67 u_int32_t length; /* length of S/G segment */
68 u_int32_t addr; /* physical address of block */
69};
70
48 bus_space_write_4((ida)->tag, (ida)->bsh, port, val)
49
50struct ida_hdr {
51 u_int8_t drive; /* logical drive */
52 u_int8_t priority; /* block priority */
53 u_int16_t size; /* size of request, in words */
54};
55

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63 u_int8_t spare; /* reserved */
64};
65
66struct ida_sgb {
67 u_int32_t length; /* length of S/G segment */
68 u_int32_t addr; /* physical address of block */
69};
70
71#define IDA_NSEG 32 /* maximum number of segments */
71#define IDA_NSEG 32 /* maximum number of segments */
72
73/*
74 * right now, this structure totals 276 bytes.
75 */
76struct ida_hardware_qcb {
77 struct ida_hdr hdr; /* 4 */
78 struct ida_req req; /* 12 */
79 struct ida_sgb seg[IDA_NSEG]; /* 256 */
80 struct ida_qcb *qcb; /* 4 - qcb backpointer */
81};
82
83typedef enum {
84 QCB_FREE = 0x0000,
85 QCB_ACTIVE = 0x0001, /* waiting for completion */
86} qcb_state;
87
88#define DMA_DATA_IN 0x0001
89#define DMA_DATA_OUT 0x0002
72
73/*
74 * right now, this structure totals 276 bytes.
75 */
76struct ida_hardware_qcb {
77 struct ida_hdr hdr; /* 4 */
78 struct ida_req req; /* 12 */
79 struct ida_sgb seg[IDA_NSEG]; /* 256 */
80 struct ida_qcb *qcb; /* 4 - qcb backpointer */
81};
82
83typedef enum {
84 QCB_FREE = 0x0000,
85 QCB_ACTIVE = 0x0001, /* waiting for completion */
86} qcb_state;
87
88#define DMA_DATA_IN 0x0001
89#define DMA_DATA_OUT 0x0002
90#define IDA_COMMAND 0x0004
91#define DMA_DATA_TRANSFER (DMA_DATA_IN | DMA_DATA_OUT)
90#define IDA_COMMAND 0x0004
91#define DMA_DATA_TRANSFER (DMA_DATA_IN | DMA_DATA_OUT)
92
92
93#define IDA_QCB_MAX 256
94#define IDA_CONTROLLER 0 /* drive "number" for controller */
93#define IDA_QCB_MAX 256
94#define IDA_CONTROLLER 0 /* drive "number" for controller */
95
96struct ida_qcb {
97 struct ida_hardware_qcb *hwqcb;
98 qcb_state state;
99 short flags;
100 union {
101 STAILQ_ENTRY(ida_qcb) stqe;
102 SLIST_ENTRY(ida_qcb) sle;

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114 bus_addr_t (*done)(struct ida_softc *);
115 int (*int_pending)(struct ida_softc *);
116 void (*int_enable)(struct ida_softc *, int);
117};
118
119/*
120 * flags for the controller
121 */
95
96struct ida_qcb {
97 struct ida_hardware_qcb *hwqcb;
98 qcb_state state;
99 short flags;
100 union {
101 STAILQ_ENTRY(ida_qcb) stqe;
102 SLIST_ENTRY(ida_qcb) sle;

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114 bus_addr_t (*done)(struct ida_softc *);
115 int (*int_pending)(struct ida_softc *);
116 void (*int_enable)(struct ida_softc *, int);
117};
118
119/*
120 * flags for the controller
121 */
122#define IDA_ATTACHED 0x01 /* attached */
123#define IDA_FIRMWARE 0x02 /* firmware must be started */
124#define IDA_INTERRUPTS 0x04 /* interrupts enabled */
122#define IDA_ATTACHED 0x01 /* attached */
123#define IDA_FIRMWARE 0x02 /* firmware must be started */
124#define IDA_INTERRUPTS 0x04 /* interrupts enabled */
125
126struct ida_softc {
127 device_t dev;
128 int unit;
129
130 int regs_res_type;
131 int regs_res_id;
132 struct resource *regs;

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159 struct bio_queue_head bio_queue;
160
161 struct ida_access cmd;
162};
163
164/*
165 * drive flags
166 */
125
126struct ida_softc {
127 device_t dev;
128 int unit;
129
130 int regs_res_type;
131 int regs_res_id;
132 struct resource *regs;

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159 struct bio_queue_head bio_queue;
160
161 struct ida_access cmd;
162};
163
164/*
165 * drive flags
166 */
167#define DRV_WRITEPROT 0x0001
167#define DRV_WRITEPROT 0x0001
168
169struct idad_softc {
170 device_t dev;
171 struct ida_softc *controller;
172 struct disk disk;
173 int drive; /* per controller */
174 int unit; /* global */
175 int cylinders;

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169struct idad_softc {
170 device_t dev;
171 struct ida_softc *controller;
172 struct disk disk;
173 int drive; /* per controller */
174 int unit; /* global */
175 int cylinders;

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