3 */ 4 5#define DMA37MD_SINGLE 0x40 /* single pass mode */ 6#define DMA37MD_CASCADE 0xc0 /* cascade mode */ 7#define DMA37MD_WRITE 0x04 /* read the device, write memory operation */ 8#define DMA37MD_READ 0x08 /* write the device, read memory operation */ 9
| 5 */ 6 7#define DMA37MD_SINGLE 0x40 /* single pass mode */ 8#define DMA37MD_CASCADE 0xc0 /* cascade mode */ 9#define DMA37MD_WRITE 0x04 /* read the device, write memory operation */ 10#define DMA37MD_READ 0x08 /* write the device, read memory operation */ 11
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