1/*- 2 * Copyright (c) 1999 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 * 36 * from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp 37 * |
38 * $FreeBSD: head/sys/dev/hme/if_hmevar.h 108834 2003-01-06 22:12:57Z tmm $ |
39 */ 40 41#include <sys/callout.h> 42 43/* 44 * Number of receive and transmit descriptors. For each receive descriptor, 45 * an mbuf cluster is allocated and set up to receive a packet, and a dma map 46 * is created. Therefore, this number should not be too high to not waste 47 * memory. |
48 * TX descriptors have no static cost, except for the memory directly allocated 49 * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold 50 * the software state for a transmit job; each has a dmamap allocated for it. 51 * There may be multiple descriptors allocated to a single queue element. 52 * HME_NTXQ is completely arbitrary. |
53 */ 54#define HME_NRXDESC 128 |
55#define HME_NTXDESC 128 56#define HME_NTXQ (HME_NTXDESC / 2) |
57 58/* Maximum size of a mapped RX buffer. */ 59#define HME_BUFSZ 1600 60 61/* 62 * RX DMA descriptor. The descriptors are preallocated; the dma map is 63 * reused. 64 */ 65struct hme_rxdesc { 66 struct mbuf *hrx_m; 67 bus_dmamap_t hrx_dmamap; |
68}; 69 |
70/* Lazily leave at least one burst size grace space. */ 71#define HME_DESC_RXLEN(sc, d) \ 72 ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst) 73 |
74struct hme_txdesc { 75 struct mbuf *htx_m; 76 bus_dmamap_t htx_dmamap; |
77 int htx_lastdesc; 78 STAILQ_ENTRY(hme_txdesc) htx_q; |
79}; 80 |
81STAILQ_HEAD(hme_txdq, hme_txdesc); 82 |
83/* Value for htx_flags */ 84#define HTXF_MAPPED 1 85 86struct hme_ring { 87 /* Ring Descriptors */ 88 caddr_t rb_membase; /* Packet buffer: CPU address */ 89 bus_addr_t rb_dmabase; /* Packet buffer: DMA address */ 90 caddr_t rb_txd; /* Transmit descriptors */ 91 bus_addr_t rb_txddma; /* DMA address of same */ 92 caddr_t rb_rxd; /* Receive descriptors */ 93 bus_addr_t rb_rxddma; /* DMA address of same */ 94 95 /* Ring Descriptor state */ |
96 int rb_tdhead, rb_tdtail; 97 int rb_rdtail; 98 int rb_td_nbusy; |
99 100 /* Descriptors */ |
101 struct hme_rxdesc rb_rxdesc[HME_NRXDESC]; 102 struct hme_txdesc rb_txdesc[HME_NTXQ]; |
103 |
104 struct hme_txdq rb_txfreeq; 105 struct hme_txdq rb_txbusyq; 106 |
107 bus_dmamap_t rb_spare_dmamap; 108}; 109 110struct hme_softc { 111 struct arpcom sc_arpcom; 112 struct ifmedia sc_ifmedia; 113 device_t sc_dev; 114 device_t sc_miibus; --- 25 unchanged lines hidden (view full) --- 140 int sc_phys[2]; /* MII instance -> PHY map */ 141 142 int sc_pci; /* XXXXX -- PCI buses are LE. */ 143 144 /* Ring descriptor */ 145 struct hme_ring sc_rb; 146 147 int sc_debug; |
148}; 149 150extern devclass_t hme_devclass; 151 152int hme_config(struct hme_softc *); 153void hme_intr(void *); 154 155/* MII methods & callbacks */ 156int hme_mii_readreg(device_t, int, int); 157int hme_mii_writereg(device_t, int, int, int); 158void hme_mii_statchg(device_t); |