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if_hmevar.h (93043) if_hmevar.h (108834)
1/*-
2 * Copyright (c) 1999 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Paul Kranenburg.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 *
36 * from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp
37 *
1/*-
2 * Copyright (c) 1999 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Paul Kranenburg.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 *
36 * from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp
37 *
38 * $FreeBSD: head/sys/dev/hme/if_hmevar.h 93043 2002-03-23 19:37:11Z tmm $
38 * $FreeBSD: head/sys/dev/hme/if_hmevar.h 108834 2003-01-06 22:12:57Z tmm $
39 */
40
41#include <sys/callout.h>
42
43/*
44 * Number of receive and transmit descriptors. For each receive descriptor,
45 * an mbuf cluster is allocated and set up to receive a packet, and a dma map
46 * is created. Therefore, this number should not be too high to not waste
47 * memory.
39 */
40
41#include <sys/callout.h>
42
43/*
44 * Number of receive and transmit descriptors. For each receive descriptor,
45 * an mbuf cluster is allocated and set up to receive a packet, and a dma map
46 * is created. Therefore, this number should not be too high to not waste
47 * memory.
48 * TX descriptors have less static cost (a dma map is allocated which could
49 * cause bounce buffers to be reserved; other that that, the only required
50 * memory is sizeof(struct hme_txdesc)).
48 * TX descriptors have no static cost, except for the memory directly allocated
49 * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold
50 * the software state for a transmit job; each has a dmamap allocated for it.
51 * There may be multiple descriptors allocated to a single queue element.
52 * HME_NTXQ is completely arbitrary.
51 */
52#define HME_NRXDESC 128
53 */
54#define HME_NRXDESC 128
53#define HME_NTXDESC 64
55#define HME_NTXDESC 128
56#define HME_NTXQ (HME_NTXDESC / 2)
54
55/* Maximum size of a mapped RX buffer. */
56#define HME_BUFSZ 1600
57
58/*
59 * RX DMA descriptor. The descriptors are preallocated; the dma map is
60 * reused.
61 */
62struct hme_rxdesc {
63 struct mbuf *hrx_m;
64 bus_dmamap_t hrx_dmamap;
57
58/* Maximum size of a mapped RX buffer. */
59#define HME_BUFSZ 1600
60
61/*
62 * RX DMA descriptor. The descriptors are preallocated; the dma map is
63 * reused.
64 */
65struct hme_rxdesc {
66 struct mbuf *hrx_m;
67 bus_dmamap_t hrx_dmamap;
65 int hrx_offs;
66 bus_size_t hrx_len;
67};
68
68};
69
70/* Lazily leave at least one burst size grace space. */
71#define HME_DESC_RXLEN(sc, d) \
72 ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst)
73
69struct hme_txdesc {
70 struct mbuf *htx_m;
71 bus_dmamap_t htx_dmamap;
74struct hme_txdesc {
75 struct mbuf *htx_m;
76 bus_dmamap_t htx_dmamap;
72 int htx_flags;
77 int htx_lastdesc;
78 STAILQ_ENTRY(hme_txdesc) htx_q;
73};
74
79};
80
81STAILQ_HEAD(hme_txdq, hme_txdesc);
82
75/* Value for htx_flags */
76#define HTXF_MAPPED 1
77
78struct hme_ring {
79 /* Ring Descriptors */
80 caddr_t rb_membase; /* Packet buffer: CPU address */
81 bus_addr_t rb_dmabase; /* Packet buffer: DMA address */
82 caddr_t rb_txd; /* Transmit descriptors */
83 bus_addr_t rb_txddma; /* DMA address of same */
84 caddr_t rb_rxd; /* Receive descriptors */
85 bus_addr_t rb_rxddma; /* DMA address of same */
86
87 /* Ring Descriptor state */
83/* Value for htx_flags */
84#define HTXF_MAPPED 1
85
86struct hme_ring {
87 /* Ring Descriptors */
88 caddr_t rb_membase; /* Packet buffer: CPU address */
89 bus_addr_t rb_dmabase; /* Packet buffer: DMA address */
90 caddr_t rb_txd; /* Transmit descriptors */
91 bus_addr_t rb_txddma; /* DMA address of same */
92 caddr_t rb_rxd; /* Receive descriptors */
93 bus_addr_t rb_rxddma; /* DMA address of same */
94
95 /* Ring Descriptor state */
88 int rb_tdhead, rb_tdtail;
89 int rb_rdtail;
90 int rb_td_nbusy;
96 int rb_tdhead, rb_tdtail;
97 int rb_rdtail;
98 int rb_td_nbusy;
91
92 /* Descriptors */
99
100 /* Descriptors */
93 struct hme_rxdesc rb_rxdesc[HME_NRXDESC];
94 struct hme_txdesc rb_txdesc[HME_NTXDESC];
101 struct hme_rxdesc rb_rxdesc[HME_NRXDESC];
102 struct hme_txdesc rb_txdesc[HME_NTXQ];
95
103
104 struct hme_txdq rb_txfreeq;
105 struct hme_txdq rb_txbusyq;
106
96 bus_dmamap_t rb_spare_dmamap;
97};
98
99struct hme_softc {
100 struct arpcom sc_arpcom;
101 struct ifmedia sc_ifmedia;
102 device_t sc_dev;
103 device_t sc_miibus;
104 struct mii_data *sc_mii; /* MII media control */
105 struct callout sc_tick_ch; /* tick callout */
106
107 /* The following bus handles are to be provided by the bus front-end */
108 bus_dma_tag_t sc_pdmatag; /* bus dma parent tag */
109 bus_dma_tag_t sc_cdmatag; /* control bus dma tag */
110 bus_dmamap_t sc_cdmamap; /* control bus dma handle */
111 bus_dma_tag_t sc_rdmatag; /* RX bus dma tag */
112 bus_dma_tag_t sc_tdmatag; /* RX bus dma tag */
113 bus_space_handle_t sc_sebh; /* HME Global registers */
114 bus_space_handle_t sc_erxh; /* HME ERX registers */
115 bus_space_handle_t sc_etxh; /* HME ETX registers */
116 bus_space_handle_t sc_mach; /* HME MAC registers */
117 bus_space_handle_t sc_mifh; /* HME MIF registers */
118 bus_space_tag_t sc_sebt; /* HME Global registers */
119 bus_space_tag_t sc_erxt; /* HME ERX registers */
120 bus_space_tag_t sc_etxt; /* HME ETX registers */
121 bus_space_tag_t sc_mact; /* HME MAC registers */
122 bus_space_tag_t sc_mift; /* HME MIF registers */
123 bus_addr_t sc_sebo; /* HME Global registers */
124 bus_addr_t sc_erxo; /* HME ERX registers */
125 bus_addr_t sc_etxo; /* HME ETX registers */
126 bus_addr_t sc_maco; /* HME MAC registers */
127 bus_addr_t sc_mifo; /* HME MIF registers */
128 int sc_burst; /* DVMA burst size in effect */
129 int sc_phys[2]; /* MII instance -> PHY map */
130
131 int sc_pci; /* XXXXX -- PCI buses are LE. */
132
133 /* Ring descriptor */
134 struct hme_ring sc_rb;
135
136 int sc_debug;
107 bus_dmamap_t rb_spare_dmamap;
108};
109
110struct hme_softc {
111 struct arpcom sc_arpcom;
112 struct ifmedia sc_ifmedia;
113 device_t sc_dev;
114 device_t sc_miibus;
115 struct mii_data *sc_mii; /* MII media control */
116 struct callout sc_tick_ch; /* tick callout */
117
118 /* The following bus handles are to be provided by the bus front-end */
119 bus_dma_tag_t sc_pdmatag; /* bus dma parent tag */
120 bus_dma_tag_t sc_cdmatag; /* control bus dma tag */
121 bus_dmamap_t sc_cdmamap; /* control bus dma handle */
122 bus_dma_tag_t sc_rdmatag; /* RX bus dma tag */
123 bus_dma_tag_t sc_tdmatag; /* RX bus dma tag */
124 bus_space_handle_t sc_sebh; /* HME Global registers */
125 bus_space_handle_t sc_erxh; /* HME ERX registers */
126 bus_space_handle_t sc_etxh; /* HME ETX registers */
127 bus_space_handle_t sc_mach; /* HME MAC registers */
128 bus_space_handle_t sc_mifh; /* HME MIF registers */
129 bus_space_tag_t sc_sebt; /* HME Global registers */
130 bus_space_tag_t sc_erxt; /* HME ERX registers */
131 bus_space_tag_t sc_etxt; /* HME ETX registers */
132 bus_space_tag_t sc_mact; /* HME MAC registers */
133 bus_space_tag_t sc_mift; /* HME MIF registers */
134 bus_addr_t sc_sebo; /* HME Global registers */
135 bus_addr_t sc_erxo; /* HME ERX registers */
136 bus_addr_t sc_etxo; /* HME ETX registers */
137 bus_addr_t sc_maco; /* HME MAC registers */
138 bus_addr_t sc_mifo; /* HME MIF registers */
139 int sc_burst; /* DVMA burst size in effect */
140 int sc_phys[2]; /* MII instance -> PHY map */
141
142 int sc_pci; /* XXXXX -- PCI buses are LE. */
143
144 /* Ring descriptor */
145 struct hme_ring sc_rb;
146
147 int sc_debug;
137
138 /* Special hardware hooks */
139 void (*sc_hwreset)(struct hme_softc *);
140 void (*sc_hwinit)(struct hme_softc *);
141};
142
143extern devclass_t hme_devclass;
144
145int hme_config(struct hme_softc *);
146void hme_intr(void *);
147
148/* MII methods & callbacks */
149int hme_mii_readreg(device_t, int, int);
150int hme_mii_writereg(device_t, int, int, int);
151void hme_mii_statchg(device_t);
148};
149
150extern devclass_t hme_devclass;
151
152int hme_config(struct hme_softc *);
153void hme_intr(void *);
154
155/* MII methods & callbacks */
156int hme_mii_readreg(device_t, int, int);
157int hme_mii_writereg(device_t, int, int, int);
158void hme_mii_statchg(device_t);