1/*-
2 * Copyright (C) 2001 Eduardo Horvath.
3 * All rights reserved.
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
28 *
29 */
30
31#include <sys/cdefs.h>
| 1/*-
2 * Copyright (C) 2001 Eduardo Horvath.
3 * All rights reserved.
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
28 *
29 */
30
31#include <sys/cdefs.h>
|
32__FBSDID("$FreeBSD: head/sys/dev/gem/if_gem_pci.c 147256 2005-06-10 16:49:24Z brooks $");
| 32__FBSDID("$FreeBSD: head/sys/dev/gem/if_gem_pci.c 148369 2005-07-24 18:45:15Z marius $");
|
33
34/*
35 * PCI bindings for Sun GEM ethernet controllers.
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/bus.h>
41#include <sys/malloc.h>
42#include <sys/kernel.h>
| 33
34/*
35 * PCI bindings for Sun GEM ethernet controllers.
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/bus.h>
41#include <sys/malloc.h>
42#include <sys/kernel.h>
|
| 43#include <sys/lock.h>
|
43#include <sys/module.h>
| 44#include <sys/module.h>
|
| 45#include <sys/mutex.h>
|
44#include <sys/resource.h>
45#include <sys/socket.h>
46
47#include <machine/endian.h>
48
49#include <net/ethernet.h>
50#include <net/if.h>
51#include <net/if_arp.h>
52#include <net/if_dl.h>
53#include <net/if_media.h>
54
55#include <machine/bus.h>
56#include <machine/resource.h>
57#include <dev/ofw/openfirm.h>
58#include <machine/ofw_machdep.h>
59
60#include <sys/rman.h>
61
62#include <dev/mii/mii.h>
63#include <dev/mii/miivar.h>
64
65#include <dev/gem/if_gemreg.h>
66#include <dev/gem/if_gemvar.h>
67
68#include <dev/pci/pcivar.h>
69#include <dev/pci/pcireg.h>
70
71#include "miibus_if.h"
72
73struct gem_pci_softc {
74 struct gem_softc gsc_gem; /* GEM device */
75 struct resource *gsc_sres;
76 int gsc_srid;
77 struct resource *gsc_ires;
78 int gsc_irid;
79 void *gsc_ih;
80};
81
82static int gem_pci_probe(device_t);
83static int gem_pci_attach(device_t);
84static int gem_pci_detach(device_t);
85static int gem_pci_suspend(device_t);
86static int gem_pci_resume(device_t);
87
88static device_method_t gem_pci_methods[] = {
89 /* Device interface */
90 DEVMETHOD(device_probe, gem_pci_probe),
91 DEVMETHOD(device_attach, gem_pci_attach),
92 DEVMETHOD(device_detach, gem_pci_detach),
93 DEVMETHOD(device_suspend, gem_pci_suspend),
94 DEVMETHOD(device_resume, gem_pci_resume),
95 /* Use the suspend handler here, it is all that is required. */
96 DEVMETHOD(device_shutdown, gem_pci_suspend),
97
98 /* bus interface */
99 DEVMETHOD(bus_print_child, bus_generic_print_child),
100 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
101
102 /* MII interface */
103 DEVMETHOD(miibus_readreg, gem_mii_readreg),
104 DEVMETHOD(miibus_writereg, gem_mii_writereg),
105 DEVMETHOD(miibus_statchg, gem_mii_statchg),
106
107 { 0, 0 }
108};
109
110static driver_t gem_pci_driver = {
111 "gem",
112 gem_pci_methods,
113 sizeof(struct gem_pci_softc)
114};
115
116
117DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
118MODULE_DEPEND(gem, pci, 1, 1, 1);
119MODULE_DEPEND(gem, ether, 1, 1, 1);
120
121struct gem_pci_dev {
122 u_int32_t gpd_devid;
123 int gpd_variant;
124 char *gpd_desc;
125} gem_pci_devlist[] = {
126 { 0x1101108e, GEM_SUN_GEM, "Sun ERI 10/100 Ethernet Adaptor" },
127 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet Adaptor" },
128 { 0x0021106b, GEM_APPLE_GMAC, "Apple GMAC Ethernet Adaptor" },
129 { 0x0024106b, GEM_APPLE_GMAC, "Apple GMAC2 Ethernet Adaptor" },
130 { 0x0032106b, GEM_APPLE_GMAC, "Apple GMAC3 Ethernet Adaptor" },
131 { 0, 0, NULL }
132};
133
134/*
135 * Attach routines need to be split out to different bus-specific files.
136 */
137static int
138gem_pci_probe(dev)
139 device_t dev;
140{
141 int i;
142 u_int32_t devid;
143 struct gem_pci_softc *gsc;
144
145 devid = pci_get_devid(dev);
146 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
147 if (devid == gem_pci_devlist[i].gpd_devid) {
148 device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
149 gsc = device_get_softc(dev);
150 gsc->gsc_gem.sc_variant =
151 gem_pci_devlist[i].gpd_variant;
152 return (BUS_PROBE_DEFAULT);
153 }
154 }
155
156 return (ENXIO);
157}
158
159static int
160gem_pci_attach(dev)
161 device_t dev;
162{
163 struct gem_pci_softc *gsc = device_get_softc(dev);
164 struct gem_softc *sc = &gsc->gsc_gem;
165
166 pci_enable_busmaster(dev);
167
168 /*
169 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
170 * although it should be 1. correct that.
171 */
172 if (pci_get_intpin(dev) == 0)
173 pci_set_intpin(dev, 1);
174
175 sc->sc_dev = dev;
176 sc->sc_pci = 1; /* XXX */
177
| 46#include <sys/resource.h>
47#include <sys/socket.h>
48
49#include <machine/endian.h>
50
51#include <net/ethernet.h>
52#include <net/if.h>
53#include <net/if_arp.h>
54#include <net/if_dl.h>
55#include <net/if_media.h>
56
57#include <machine/bus.h>
58#include <machine/resource.h>
59#include <dev/ofw/openfirm.h>
60#include <machine/ofw_machdep.h>
61
62#include <sys/rman.h>
63
64#include <dev/mii/mii.h>
65#include <dev/mii/miivar.h>
66
67#include <dev/gem/if_gemreg.h>
68#include <dev/gem/if_gemvar.h>
69
70#include <dev/pci/pcivar.h>
71#include <dev/pci/pcireg.h>
72
73#include "miibus_if.h"
74
75struct gem_pci_softc {
76 struct gem_softc gsc_gem; /* GEM device */
77 struct resource *gsc_sres;
78 int gsc_srid;
79 struct resource *gsc_ires;
80 int gsc_irid;
81 void *gsc_ih;
82};
83
84static int gem_pci_probe(device_t);
85static int gem_pci_attach(device_t);
86static int gem_pci_detach(device_t);
87static int gem_pci_suspend(device_t);
88static int gem_pci_resume(device_t);
89
90static device_method_t gem_pci_methods[] = {
91 /* Device interface */
92 DEVMETHOD(device_probe, gem_pci_probe),
93 DEVMETHOD(device_attach, gem_pci_attach),
94 DEVMETHOD(device_detach, gem_pci_detach),
95 DEVMETHOD(device_suspend, gem_pci_suspend),
96 DEVMETHOD(device_resume, gem_pci_resume),
97 /* Use the suspend handler here, it is all that is required. */
98 DEVMETHOD(device_shutdown, gem_pci_suspend),
99
100 /* bus interface */
101 DEVMETHOD(bus_print_child, bus_generic_print_child),
102 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
103
104 /* MII interface */
105 DEVMETHOD(miibus_readreg, gem_mii_readreg),
106 DEVMETHOD(miibus_writereg, gem_mii_writereg),
107 DEVMETHOD(miibus_statchg, gem_mii_statchg),
108
109 { 0, 0 }
110};
111
112static driver_t gem_pci_driver = {
113 "gem",
114 gem_pci_methods,
115 sizeof(struct gem_pci_softc)
116};
117
118
119DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
120MODULE_DEPEND(gem, pci, 1, 1, 1);
121MODULE_DEPEND(gem, ether, 1, 1, 1);
122
123struct gem_pci_dev {
124 u_int32_t gpd_devid;
125 int gpd_variant;
126 char *gpd_desc;
127} gem_pci_devlist[] = {
128 { 0x1101108e, GEM_SUN_GEM, "Sun ERI 10/100 Ethernet Adaptor" },
129 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet Adaptor" },
130 { 0x0021106b, GEM_APPLE_GMAC, "Apple GMAC Ethernet Adaptor" },
131 { 0x0024106b, GEM_APPLE_GMAC, "Apple GMAC2 Ethernet Adaptor" },
132 { 0x0032106b, GEM_APPLE_GMAC, "Apple GMAC3 Ethernet Adaptor" },
133 { 0, 0, NULL }
134};
135
136/*
137 * Attach routines need to be split out to different bus-specific files.
138 */
139static int
140gem_pci_probe(dev)
141 device_t dev;
142{
143 int i;
144 u_int32_t devid;
145 struct gem_pci_softc *gsc;
146
147 devid = pci_get_devid(dev);
148 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
149 if (devid == gem_pci_devlist[i].gpd_devid) {
150 device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
151 gsc = device_get_softc(dev);
152 gsc->gsc_gem.sc_variant =
153 gem_pci_devlist[i].gpd_variant;
154 return (BUS_PROBE_DEFAULT);
155 }
156 }
157
158 return (ENXIO);
159}
160
161static int
162gem_pci_attach(dev)
163 device_t dev;
164{
165 struct gem_pci_softc *gsc = device_get_softc(dev);
166 struct gem_softc *sc = &gsc->gsc_gem;
167
168 pci_enable_busmaster(dev);
169
170 /*
171 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
172 * although it should be 1. correct that.
173 */
174 if (pci_get_intpin(dev) == 0)
175 pci_set_intpin(dev, 1);
176
177 sc->sc_dev = dev;
178 sc->sc_pci = 1; /* XXX */
179
|
| 180 GEM_LOCK_INIT(sc, device_get_nameunit(dev));
181
|
178 gsc->gsc_srid = PCI_GEM_BASEADDR;
179 gsc->gsc_sres = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
180 &gsc->gsc_srid, RF_ACTIVE);
181 if (gsc->gsc_sres == NULL) {
182 device_printf(dev, "failed to allocate bus space resource\n");
| 182 gsc->gsc_srid = PCI_GEM_BASEADDR;
183 gsc->gsc_sres = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
184 &gsc->gsc_srid, RF_ACTIVE);
185 if (gsc->gsc_sres == NULL) {
186 device_printf(dev, "failed to allocate bus space resource\n");
|
183 return (ENXIO);
| 187 goto fail_mtx;
|
184 }
185
186 gsc->gsc_irid = 0;
187 gsc->gsc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
188 &gsc->gsc_irid, RF_SHAREABLE | RF_ACTIVE);
189 if (gsc->gsc_ires == NULL) {
190 device_printf(dev, "failed to allocate interrupt resource\n");
191 goto fail_sres;
192 }
193
194 sc->sc_bustag = rman_get_bustag(gsc->gsc_sres);
195 sc->sc_h = rman_get_bushandle(gsc->gsc_sres);
196
197 /* All platform that this driver is used on must provide this. */
198 OF_getetheraddr(dev, sc->sc_enaddr);
199
200 /*
201 * call the main configure
202 */
203 if (gem_attach(sc) != 0) {
204 device_printf(dev, "could not be configured\n");
205 goto fail_ires;
206 }
207
| 188 }
189
190 gsc->gsc_irid = 0;
191 gsc->gsc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
192 &gsc->gsc_irid, RF_SHAREABLE | RF_ACTIVE);
193 if (gsc->gsc_ires == NULL) {
194 device_printf(dev, "failed to allocate interrupt resource\n");
195 goto fail_sres;
196 }
197
198 sc->sc_bustag = rman_get_bustag(gsc->gsc_sres);
199 sc->sc_h = rman_get_bushandle(gsc->gsc_sres);
200
201 /* All platform that this driver is used on must provide this. */
202 OF_getetheraddr(dev, sc->sc_enaddr);
203
204 /*
205 * call the main configure
206 */
207 if (gem_attach(sc) != 0) {
208 device_printf(dev, "could not be configured\n");
209 goto fail_ires;
210 }
211
|
208 if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc,
209 &gsc->gsc_ih) != 0) {
| 212 if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET | INTR_MPSAFE,
213 gem_intr, sc, &gsc->gsc_ih) != 0) {
|
210 device_printf(dev, "failed to set up interrupt\n");
211 gem_detach(sc);
212 goto fail_ires;
213 }
214 return (0);
215
216fail_ires:
217 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
218fail_sres:
219 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
| 214 device_printf(dev, "failed to set up interrupt\n");
215 gem_detach(sc);
216 goto fail_ires;
217 }
218 return (0);
219
220fail_ires:
221 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
222fail_sres:
223 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
|
| 224fail_mtx:
225 GEM_LOCK_DESTROY(sc);
|
220 return (ENXIO);
221}
222
223static int
224gem_pci_detach(dev)
225 device_t dev;
226{
227 struct gem_pci_softc *gsc = device_get_softc(dev);
228 struct gem_softc *sc = &gsc->gsc_gem;
229
| 226 return (ENXIO);
227}
228
229static int
230gem_pci_detach(dev)
231 device_t dev;
232{
233 struct gem_pci_softc *gsc = device_get_softc(dev);
234 struct gem_softc *sc = &gsc->gsc_gem;
235
|
230 gem_detach(sc);
231
| |
232 bus_teardown_intr(dev, gsc->gsc_ires, gsc->gsc_ih);
| 236 bus_teardown_intr(dev, gsc->gsc_ires, gsc->gsc_ih);
|
| 237 gem_detach(sc);
|
233 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
234 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
| 238 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
239 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
|
| 240 GEM_LOCK_DESTROY(sc);
|
235 return (0);
236}
237
238static int
239gem_pci_suspend(dev)
240 device_t dev;
241{
242 struct gem_pci_softc *gsc = device_get_softc(dev);
243 struct gem_softc *sc = &gsc->gsc_gem;
244
245 gem_suspend(sc);
246 return (0);
247}
248
249static int
250gem_pci_resume(dev)
251 device_t dev;
252{
253 struct gem_pci_softc *gsc = device_get_softc(dev);
254 struct gem_softc *sc = &gsc->gsc_gem;
255
256 gem_resume(sc);
257 return (0);
258}
| 241 return (0);
242}
243
244static int
245gem_pci_suspend(dev)
246 device_t dev;
247{
248 struct gem_pci_softc *gsc = device_get_softc(dev);
249 struct gem_softc *sc = &gsc->gsc_gem;
250
251 gem_suspend(sc);
252 return (0);
253}
254
255static int
256gem_pci_resume(dev)
257 device_t dev;
258{
259 struct gem_pci_softc *gsc = device_get_softc(dev);
260 struct gem_softc *sc = &gsc->gsc_gem;
261
262 gem_resume(sc);
263 return (0);
264}
|