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1/*-
2 * Copyright (C) 2001 Eduardo Horvath.
3 * Copyright (c) 2001-2003 Thomas Moestl
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 14 unchanged lines hidden (view full) ---

23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: NetBSD: gem.c,v 1.21 2002/06/01 23:50:58 lukem Exp
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/gem/if_gem.c 148368 2005-07-24 18:12:31Z marius $");
31__FBSDID("$FreeBSD: head/sys/dev/gem/if_gem.c 148369 2005-07-24 18:45:15Z marius $");
32
33/*
34 * Driver for Sun GEM ethernet controllers.
35 */
36
37#if 0
38#define GEM_DEBUG
39#endif

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45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/bus.h>
48#include <sys/callout.h>
49#include <sys/endian.h>
50#include <sys/mbuf.h>
51#include <sys/malloc.h>
52#include <sys/kernel.h>
53#include <sys/lock.h>
54#include <sys/module.h>
55#include <sys/mutex.h>
56#include <sys/socket.h>
57#include <sys/sockio.h>
58
59#include <net/bpf.h>
60#include <net/ethernet.h>
61#include <net/if.h>
62#include <net/if_arp.h>
63#include <net/if_dl.h>

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70#include <dev/mii/miivar.h>
71
72#include <dev/gem/if_gemreg.h>
73#include <dev/gem/if_gemvar.h>
74
75#define TRIES 10000
76
77static void gem_start(struct ifnet *);
78static void gem_start_locked(struct ifnet *);
79static void gem_stop(struct ifnet *, int);
80static int gem_ioctl(struct ifnet *, u_long, caddr_t);
81static void gem_cddma_callback(void *, bus_dma_segment_t *, int, int);
82static void gem_txdma_callback(void *, bus_dma_segment_t *, int,
83 bus_size_t, int);
84static void gem_tick(void *);
85static void gem_watchdog(struct ifnet *);
86static void gem_init(void *);
87static void gem_init_locked(struct gem_softc *sc);
88static void gem_init_regs(struct gem_softc *sc);
89static int gem_ringsize(int sz);
90static int gem_meminit(struct gem_softc *);
91static int gem_load_txmbuf(struct gem_softc *, struct mbuf *);
92static void gem_mifinit(struct gem_softc *);
93static int gem_bitwait(struct gem_softc *sc, bus_addr_t r,
94 u_int32_t clr, u_int32_t set);
95static int gem_reset_rx(struct gem_softc *);

--- 35 unchanged lines hidden (view full) ---

131gem_attach(sc)
132 struct gem_softc *sc;
133{
134 struct ifnet *ifp;
135 struct mii_softc *child;
136 int i, error;
137 u_int32_t v;
138
139 GEM_LOCK_ASSERT(sc, MA_NOTOWNED);
140
141 ifp = sc->sc_ifp = if_alloc(IFT_ETHER);
142 if (ifp == NULL)
143 return (ENOSPC);
144
145 /* Make sure the chip is stopped. */
146 ifp->if_softc = sc;
147 GEM_LOCK(sc);
148 gem_reset(sc);
149 GEM_UNLOCK(sc);
150
151 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
152 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, GEM_NSEGS,
153 BUS_SPACE_MAXSIZE_32BIT, 0, NULL, NULL, &sc->sc_pdmatag);
154 if (error)
155 goto fail_ifnet;
156
157 error = bus_dma_tag_create(sc->sc_pdmatag, 1, 0,

--- 71 unchanged lines hidden (view full) ---

229 &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
230 device_printf(sc->sc_dev, "unable to create rx DMA map "
231 "%d, error = %d\n", i, error);
232 goto fail_rxd;
233 }
234 sc->sc_rxsoft[i].rxs_mbuf = NULL;
235 }
236
237 GEM_LOCK(sc);
238 gem_mifinit(sc);
239 GEM_UNLOCK(sc);
240
241 if ((error = mii_phy_probe(sc->sc_dev, &sc->sc_miibus, gem_mediachange,
242 gem_mediastatus)) != 0) {
243 device_printf(sc->sc_dev, "phy probe failed: %d\n", error);
244 goto fail_rxd;
245 }
246 sc->sc_mii = device_get_softc(sc->sc_miibus);
247

--- 12 unchanged lines hidden (view full) ---

260 device_printf(sc->sc_dev, "%ukB RX FIFO, %ukB TX FIFO\n",
261 sc->sc_rxfifosize / 1024, v / 16);
262
263 /* Initialize ifnet structure. */
264 ifp->if_softc = sc;
265 if_initname(ifp, device_get_name(sc->sc_dev),
266 device_get_unit(sc->sc_dev));
267 ifp->if_mtu = ETHERMTU;
258 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
259 IFF_NEEDSGIANT;
268 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
269 ifp->if_start = gem_start;
270 ifp->if_ioctl = gem_ioctl;
271 ifp->if_watchdog = gem_watchdog;
272 ifp->if_init = gem_init;
273 ifp->if_snd.ifq_maxlen = GEM_TXQUEUELEN;
274 /*
275 * Walk along the list of attached MII devices and
276 * establish an `MII instance' to `phy number'

--- 47 unchanged lines hidden (view full) ---

324 * resume.
325 */
326 sc->sc_powerhook = powerhook_establish(gem_power, sc);
327 if (sc->sc_powerhook == NULL)
328 device_printf(sc->sc_dev, "WARNING: unable to establish power "
329 "hook\n");
330#endif
331
323 callout_init(&sc->sc_tick_ch, 0);
332 callout_init(&sc->sc_tick_ch, CALLOUT_MPSAFE);
333#ifdef GEM_RINT_TIMEOUT
325 callout_init(&sc->sc_rx_ch, 0);
334 callout_init(&sc->sc_rx_ch, CALLOUT_MPSAFE);
335#endif
336 return (0);
337
338 /*
339 * Free any resources we've allocated during the failed attach
340 * attempt. Do this in reverse order and fall through.
341 */
342fail_rxd:

--- 27 unchanged lines hidden (view full) ---

370
371void
372gem_detach(sc)
373 struct gem_softc *sc;
374{
375 struct ifnet *ifp = sc->sc_ifp;
376 int i;
377
378 GEM_LOCK_ASSERT(sc, MA_NOTOWNED);
379
380 GEM_LOCK(sc);
381 gem_stop(ifp, 1);
382 GEM_UNLOCK(sc);
383 ether_ifdetach(ifp);
384 if_free(ifp);
385 device_delete_child(sc->sc_dev, sc->sc_miibus);
386
387 for (i = 0; i < GEM_NRXDESC; i++) {
388 if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
389 bus_dmamap_destroy(sc->sc_rdmatag,
390 sc->sc_rxsoft[i].rxs_dmamap);

--- 15 unchanged lines hidden (view full) ---

406}
407
408void
409gem_suspend(sc)
410 struct gem_softc *sc;
411{
412 struct ifnet *ifp = sc->sc_ifp;
413
414 GEM_LOCK(sc);
415 gem_stop(ifp, 0);
416 GEM_UNLOCK(sc);
417}
418
419void
420gem_resume(sc)
421 struct gem_softc *sc;
422{
423 struct ifnet *ifp = sc->sc_ifp;
424
425 GEM_LOCK(sc);
426 if (ifp->if_flags & IFF_UP)
411 gem_init(ifp);
427 gem_init_locked(sc);
428 GEM_UNLOCK(sc);
429}
430
431static void
432gem_cddma_callback(xsc, segs, nsegs, error)
433 void *xsc;
434 bus_dma_segment_t *segs;
435 int nsegs;
436 int error;

--- 84 unchanged lines hidden (view full) ---

521 ("gem_txdma_callback: missed end of packet!"));
522}
523
524static void
525gem_tick(arg)
526 void *arg;
527{
528 struct gem_softc *sc = arg;
512 int s;
529
514 s = splnet();
530 mii_tick(sc->sc_mii);
516 splx(s);
531
532 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc);
533}
534
535static int
536gem_bitwait(sc, r, clr, set)
537 struct gem_softc *sc;
538 bus_addr_t r;

--- 12 unchanged lines hidden (view full) ---

551}
552
553void
554gem_reset(sc)
555 struct gem_softc *sc;
556{
557 bus_space_tag_t t = sc->sc_bustag;
558 bus_space_handle_t h = sc->sc_h;
545 int s;
559
547 s = splnet();
560#ifdef GEM_DEBUG
561 CTR1(KTR_GEM, "%s: gem_reset", device_get_name(sc->sc_dev));
562#endif
563 gem_reset_rx(sc);
564 gem_reset_tx(sc);
565
566 /* Do a full reset */
567 bus_space_write_4(t, h, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX);
568 if (!gem_bitwait(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0))
569 device_printf(sc->sc_dev, "cannot reset device\n");
558 splx(s);
570}
571
572
573/*
574 * gem_rxdrain:
575 *
576 * Drain the receive queue.
577 */

--- 261 unchanged lines hidden (view full) ---

839 break;
840 default:
841 printf("gem: invalid Receive Descriptor ring size\n");
842 break;
843 }
844 return (v);
845}
846
847static void
848gem_init(xsc)
849 void *xsc;
850{
851 struct gem_softc *sc = (struct gem_softc *)xsc;
852
853 GEM_LOCK(sc);
854 gem_init_locked(sc);
855 GEM_UNLOCK(sc);
856}
857
858/*
859 * Initialization of interface; set up initialization block
860 * and transmit/receive descriptor rings.
861 */
862static void
841gem_init(xsc)
842 void *xsc;
863gem_init_locked(sc)
864 struct gem_softc *sc;
865{
844 struct gem_softc *sc = (struct gem_softc *)xsc;
866 struct ifnet *ifp = sc->sc_ifp;
867 bus_space_tag_t t = sc->sc_bustag;
868 bus_space_handle_t h = sc->sc_h;
848 int s;
869 u_int32_t v;
870
851 s = splnet();
871 GEM_LOCK_ASSERT(sc, MA_OWNED);
872
873#ifdef GEM_DEBUG
874 CTR1(KTR_GEM, "%s: gem_init: calling stop", device_get_name(sc->sc_dev));
875#endif
876 /*
877 * Initialization sequence. The numbered steps below correspond
878 * to the sequence outlined in section 6.3.5.1 in the Ethernet
879 * Channel Engine manual (part of the PCIO manual).

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950 * and an ON Threshold of 1/4 full.
951 */
952 bus_space_write_4(t, h, GEM_RX_PAUSE_THRESH,
953 (3 * sc->sc_rxfifosize / 256) |
954 ( (sc->sc_rxfifosize / 256) << 12));
955 bus_space_write_4(t, h, GEM_RX_BLANKING, (6<<12)|6);
956
957 /* step 11. Configure Media */
958 GEM_UNLOCK(sc);
959 mii_mediachg(sc->sc_mii);
960 GEM_LOCK(sc);
961
962 /* step 12. RX_MAC Configuration Register */
963 v = bus_space_read_4(t, h, GEM_MAC_RX_CONFIG);
964 v |= GEM_MAC_RX_ENABLE;
965 bus_space_write_4(t, h, GEM_MAC_RX_CONFIG, v);
966
967 /* step 14. Issue Transmit Pending command */
968
969 /* step 15. Give the reciever a swift kick */
970 bus_space_write_4(t, h, GEM_RX_KICK, GEM_NRXDESC-4);
971
972 /* Start the one second timer. */
973 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc);
974
975 ifp->if_flags |= IFF_RUNNING;
976 ifp->if_flags &= ~IFF_OACTIVE;
977 ifp->if_timer = 0;
978 sc->sc_ifflags = ifp->if_flags;
957 splx(s);
979}
980
981static int
982gem_load_txmbuf(sc, m0)
983 struct gem_softc *sc;
984 struct mbuf *m0;
985{
986 struct gem_txdma txd;

--- 133 unchanged lines hidden (view full) ---

1120 bus_space_write_4(t, h, GEM_MAC_XIF_CONFIG, v);
1121}
1122
1123static void
1124gem_start(ifp)
1125 struct ifnet *ifp;
1126{
1127 struct gem_softc *sc = (struct gem_softc *)ifp->if_softc;
1128
1129 GEM_LOCK(sc);
1130 gem_start_locked(ifp);
1131 GEM_UNLOCK(sc);
1132}
1133
1134static void
1135gem_start_locked(ifp)
1136 struct ifnet *ifp;
1137{
1138 struct gem_softc *sc = (struct gem_softc *)ifp->if_softc;
1139 struct mbuf *m0 = NULL;
1140 int firsttx, ntx = 0, ofree, txmfail;
1141
1142 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1143 return;
1144
1145 /*
1146 * Remember the previous number of free descriptors and

--- 188 unchanged lines hidden (view full) ---

1335#endif
1336
1337 if (progress) {
1338 if (sc->sc_txfree == GEM_NTXDESC - 1)
1339 sc->sc_txwin = 0;
1340
1341 /* Freed some descriptors, so reset IFF_OACTIVE and restart. */
1342 ifp->if_flags &= ~IFF_OACTIVE;
1311 gem_start(ifp);
1343 gem_start_locked(ifp);
1344
1345 if (STAILQ_EMPTY(&sc->sc_txdirtyq))
1346 ifp->if_timer = 0;
1347 }
1348
1349#ifdef GEM_DEBUG
1350 CTR2(KTR_GEM, "%s: gem_tint: watchdog %d",
1351 device_get_name(sc->sc_dev), ifp->if_timer);
1352#endif
1353}
1354
1355#ifdef GEM_RINT_TIMEOUT
1356static void
1357gem_rint_timeout(arg)
1358 void *arg;
1359{
1360 struct gem_softc *sc = (struct gem_softc *)arg;
1361
1329 gem_rint((struct gem_softc *)arg);
1362 GEM_LOCK(sc);
1363 gem_rint(sc);
1364 GEM_UNLOCK(sc);
1365}
1366#endif
1367
1368/*
1369 * Receive interrupt.
1370 */
1371static void
1372gem_rint(sc)

--- 86 unchanged lines hidden (view full) ---

1459 continue;
1460 }
1461 m->m_data += 2; /* We're already off by two */
1462
1463 m->m_pkthdr.rcvif = ifp;
1464 m->m_pkthdr.len = m->m_len = len - ETHER_CRC_LEN;
1465
1466 /* Pass it on. */
1467 GEM_UNLOCK(sc);
1468 (*ifp->if_input)(ifp, m);
1469 GEM_LOCK(sc);
1470 }
1471
1472 if (progress) {
1473 GEM_CDSYNC(sc, BUS_DMASYNC_PREWRITE);
1474 /* Update the receive pointer. */
1475 if (i == sc->sc_rxptr) {
1476 device_printf(sc->sc_dev, "rint: ring wrap\n");
1477 }

--- 80 unchanged lines hidden (view full) ---

1558gem_intr(v)
1559 void *v;
1560{
1561 struct gem_softc *sc = (struct gem_softc *)v;
1562 bus_space_tag_t t = sc->sc_bustag;
1563 bus_space_handle_t seb = sc->sc_h;
1564 u_int32_t status;
1565
1566 GEM_LOCK(sc);
1567 status = bus_space_read_4(t, seb, GEM_STATUS);
1568#ifdef GEM_DEBUG
1569 CTR3(KTR_GEM, "%s: gem_intr: cplt %x, status %x",
1570 device_get_name(sc->sc_dev), (status>>19),
1571 (u_int)status);
1572#endif
1573
1574 if ((status & (GEM_INTR_RX_TAG_ERR | GEM_INTR_BERR)) != 0)

--- 7 unchanged lines hidden (view full) ---

1582
1583 /* We should eventually do more than just print out error stats. */
1584 if (status & GEM_INTR_TX_MAC) {
1585 int txstat = bus_space_read_4(t, seb, GEM_MAC_TX_STATUS);
1586 if (txstat & ~GEM_MAC_TX_XMIT_DONE)
1587 device_printf(sc->sc_dev, "MAC tx fault, status %x\n",
1588 txstat);
1589 if (txstat & (GEM_MAC_TX_UNDERRUN | GEM_MAC_TX_PKT_TOO_LONG))
1552 gem_init(sc);
1590 gem_init_locked(sc);
1591 }
1592 if (status & GEM_INTR_RX_MAC) {
1593 int rxstat = bus_space_read_4(t, seb, GEM_MAC_RX_STATUS);
1594 if (rxstat & ~(GEM_MAC_RX_DONE | GEM_MAC_RX_FRAME_CNT))
1595 device_printf(sc->sc_dev, "MAC rx fault, status %x\n",
1596 rxstat);
1597 if ((rxstat & GEM_MAC_RX_OVERFLOW) != 0)
1560 gem_init(sc);
1598 gem_init_locked(sc);
1599 }
1600 GEM_UNLOCK(sc);
1601}
1602
1603
1604static void
1605gem_watchdog(ifp)
1606 struct ifnet *ifp;
1607{
1608 struct gem_softc *sc = ifp->if_softc;
1609
1610 GEM_LOCK(sc);
1611#ifdef GEM_DEBUG
1612 CTR3(KTR_GEM, "gem_watchdog: GEM_RX_CONFIG %x GEM_MAC_RX_STATUS %x "
1613 "GEM_MAC_RX_CONFIG %x",
1614 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_RX_CONFIG),
1615 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_MAC_RX_STATUS),
1616 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_MAC_RX_CONFIG));
1617 CTR3(KTR_GEM, "gem_watchdog: GEM_TX_CONFIG %x GEM_MAC_TX_STATUS %x "
1618 "GEM_MAC_TX_CONFIG %x",
1619 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_CONFIG),
1620 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_MAC_TX_STATUS),
1621 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_MAC_TX_CONFIG));
1622#endif
1623
1624 device_printf(sc->sc_dev, "device timeout\n");
1625 ++ifp->if_oerrors;
1626
1627 /* Try to get more packets going. */
1588 gem_init(ifp);
1628 gem_init_locked(sc);
1629 GEM_UNLOCK(sc);
1630}
1631
1632/*
1633 * Initialize the MII Management Interface
1634 */
1635static void
1636gem_mifinit(sc)
1637 struct gem_softc *sc;
1638{
1639 bus_space_tag_t t = sc->sc_bustag;
1640 bus_space_handle_t mif = sc->sc_h;
1641
1642 GEM_LOCK_ASSERT(sc, MA_OWNED);
1643
1644 /* Configure the MIF in frame mode */
1645 sc->sc_mif_config = bus_space_read_4(t, mif, GEM_MIF_CONFIG);
1646 sc->sc_mif_config &= ~GEM_MIF_CONFIG_BB_ENA;
1647 bus_space_write_4(t, mif, GEM_MIF_CONFIG, sc->sc_mif_config);
1648}
1649
1650/*
1651 * MII interface

--- 15 unchanged lines hidden (view full) ---

1667 int phy, reg;
1668{
1669 struct gem_softc *sc = device_get_softc(dev);
1670 bus_space_tag_t t = sc->sc_bustag;
1671 bus_space_handle_t mif = sc->sc_h;
1672 int n;
1673 u_int32_t v;
1674
1675 GEM_LOCK(sc);
1676#ifdef GEM_DEBUG_PHY
1677 printf("gem_mii_readreg: phy %d reg %d\n", phy, reg);
1678#endif
1679
1680#if 0
1681 /* Select the desired PHY in the MIF configuration register */
1682 v = bus_space_read_4(t, mif, GEM_MIF_CONFIG);
1683 /* Clear PHY select bit */

--- 7 unchanged lines hidden (view full) ---

1691 /* Construct the frame command */
1692 v = (reg << GEM_MIF_REG_SHIFT) | (phy << GEM_MIF_PHY_SHIFT) |
1693 GEM_MIF_FRAME_READ;
1694
1695 bus_space_write_4(t, mif, GEM_MIF_FRAME, v);
1696 for (n = 0; n < 100; n++) {
1697 DELAY(1);
1698 v = bus_space_read_4(t, mif, GEM_MIF_FRAME);
1655 if (v & GEM_MIF_FRAME_TA0)
1699 if (v & GEM_MIF_FRAME_TA0) {
1700 GEM_UNLOCK(sc);
1701 return (v & GEM_MIF_FRAME_DATA);
1702 }
1703 }
1704
1705 device_printf(sc->sc_dev, "mii_read timeout\n");
1706 GEM_UNLOCK(sc);
1707 return (0);
1708}
1709
1710int
1711gem_mii_writereg(dev, phy, reg, val)
1712 device_t dev;
1713 int phy, reg, val;
1714{
1715 struct gem_softc *sc = device_get_softc(dev);
1716 bus_space_tag_t t = sc->sc_bustag;
1717 bus_space_handle_t mif = sc->sc_h;
1718 int n;
1719 u_int32_t v;
1720
1721 GEM_LOCK(sc);
1722#ifdef GEM_DEBUG_PHY
1723 printf("gem_mii_writereg: phy %d reg %d val %x\n", phy, reg, val);
1724#endif
1725
1726#if 0
1727 /* Select the desired PHY in the MIF configuration register */
1728 v = bus_space_read_4(t, mif, GEM_MIF_CONFIG);
1729 /* Clear PHY select bit */

--- 8 unchanged lines hidden (view full) ---

1738 (phy << GEM_MIF_PHY_SHIFT) |
1739 (reg << GEM_MIF_REG_SHIFT) |
1740 (val & GEM_MIF_FRAME_DATA);
1741
1742 bus_space_write_4(t, mif, GEM_MIF_FRAME, v);
1743 for (n = 0; n < 100; n++) {
1744 DELAY(1);
1745 v = bus_space_read_4(t, mif, GEM_MIF_FRAME);
1698 if (v & GEM_MIF_FRAME_TA0)
1746 if (v & GEM_MIF_FRAME_TA0) {
1747 GEM_UNLOCK(sc);
1748 return (1);
1749 }
1750 }
1751
1752 device_printf(sc->sc_dev, "mii_write timeout\n");
1753 GEM_UNLOCK(sc);
1754 return (0);
1755}
1756
1757void
1758gem_mii_statchg(dev)
1759 device_t dev;
1760{
1761 struct gem_softc *sc = device_get_softc(dev);
1762#ifdef GEM_DEBUG
1712 int instance = IFM_INST(sc->sc_mii->mii_media.ifm_cur->ifm_media);
1763 int instance;
1764#endif
1765 bus_space_tag_t t = sc->sc_bustag;
1766 bus_space_handle_t mac = sc->sc_h;
1767 u_int32_t v;
1768
1769 GEM_LOCK(sc);
1770#ifdef GEM_DEBUG
1771 instance = IFM_INST(sc->sc_mii->mii_media.ifm_cur->ifm_media);
1772 if (sc->sc_debug)
1773 printf("gem_mii_statchg: status change: phy = %d\n",
1774 sc->sc_phys[instance]);
1775#endif
1776
1777 /* Set tx full duplex options */
1778 bus_space_write_4(t, mac, GEM_MAC_TX_CONFIG, 0);
1779 DELAY(10000); /* reg must be cleared and delay before changing. */

--- 23 unchanged lines hidden (view full) ---

1803 v |= GEM_MAC_XIF_GMII_MODE;
1804 else
1805 v &= ~GEM_MAC_XIF_GMII_MODE;
1806 } else {
1807 /* Internal MII needs buf enable */
1808 v |= GEM_MAC_XIF_MII_BUF_ENA;
1809 }
1810 bus_space_write_4(t, mac, GEM_MAC_XIF_CONFIG, v);
1811 GEM_UNLOCK(sc);
1812}
1813
1814int
1815gem_mediachange(ifp)
1816 struct ifnet *ifp;
1817{
1818 struct gem_softc *sc = ifp->if_softc;
1819

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1824
1825void
1826gem_mediastatus(ifp, ifmr)
1827 struct ifnet *ifp;
1828 struct ifmediareq *ifmr;
1829{
1830 struct gem_softc *sc = ifp->if_softc;
1831
1778 if ((ifp->if_flags & IFF_UP) == 0)
1832 GEM_LOCK(sc);
1833 if ((ifp->if_flags & IFF_UP) == 0) {
1834 GEM_UNLOCK(sc);
1835 return;
1836 }
1837
1838 GEM_UNLOCK(sc);
1839 mii_pollstat(sc->sc_mii);
1840 GEM_LOCK(sc);
1841 ifmr->ifm_active = sc->sc_mii->mii_media_active;
1842 ifmr->ifm_status = sc->sc_mii->mii_media_status;
1843 GEM_UNLOCK(sc);
1844}
1845
1846/*
1847 * Process an ioctl request.
1848 */
1849static int
1850gem_ioctl(ifp, cmd, data)
1851 struct ifnet *ifp;
1852 u_long cmd;
1853 caddr_t data;
1854{
1855 struct gem_softc *sc = ifp->if_softc;
1856 struct ifreq *ifr = (struct ifreq *)data;
1797 int s, error = 0;
1857 int error = 0;
1858
1859 GEM_LOCK(sc);
1860
1861 switch (cmd) {
1862 case SIOCSIFADDR:
1863 case SIOCGIFADDR:
1864 case SIOCSIFMTU:
1865 GEM_UNLOCK(sc);
1866 error = ether_ioctl(ifp, cmd, data);
1867 GEM_LOCK(sc);
1868 break;
1869 case SIOCSIFFLAGS:
1870 if (ifp->if_flags & IFF_UP) {
1871 if ((sc->sc_ifflags ^ ifp->if_flags) == IFF_PROMISC)
1872 gem_setladrf(sc);
1873 else
1810 gem_init(sc);
1874 gem_init_locked(sc);
1875 } else {
1876 if (ifp->if_flags & IFF_RUNNING)
1877 gem_stop(ifp, 0);
1878 }
1879 sc->sc_ifflags = ifp->if_flags;
1880 error = 0;
1881 break;
1882 case SIOCADDMULTI:
1883 case SIOCDELMULTI:
1884 gem_setladrf(sc);
1885 error = 0;
1886 break;
1887 case SIOCGIFMEDIA:
1888 case SIOCSIFMEDIA:
1889 GEM_UNLOCK(sc);
1890 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii->mii_media, cmd);
1891 GEM_LOCK(sc);
1892 break;
1893 default:
1894 error = ENOTTY;
1895 break;
1896 }
1897
1898 /* Try to get things going again */
1899 if (ifp->if_flags & IFF_UP)
1834 gem_start(ifp);
1835 splx(s);
1900 gem_start_locked(ifp);
1901 GEM_UNLOCK(sc);
1902 return (error);
1903}
1904
1905/*
1906 * Set up the logical address filter.
1907 */
1908static void
1909gem_setladrf(sc)
1910 struct gem_softc *sc;
1911{
1912 struct ifnet *ifp = sc->sc_ifp;
1913 struct ifmultiaddr *inm;
1914 bus_space_tag_t t = sc->sc_bustag;
1915 bus_space_handle_t h = sc->sc_h;
1916 u_int32_t crc;
1917 u_int32_t hash[16];
1918 u_int32_t v;
1919 int i;
1920
1921 GEM_LOCK_ASSERT(sc, MA_OWNED);
1922
1923 /* Get current RX configuration */
1924 v = bus_space_read_4(t, h, GEM_MAC_RX_CONFIG);
1925
1926 /*
1927 * Turn off promiscuous mode, promiscuous group mode (all multicast),
1928 * and hash filter. Depending on the case, the right bit will be
1929 * enabled.
1930 */

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