31 */
32
33/*
34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
35 */
36
37#include "bpfilter.h"
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/malloc.h>
43#include <sys/kernel.h>
44#include <sys/socket.h>
45
46#include <net/if.h>
47#include <net/if_dl.h>
48#include <net/if_media.h>
49
50#ifdef NS
51#include <netns/ns.h>
52#include <netns/ns_if.h>
53#endif
54
55#if NBPFILTER > 0
56#include <net/bpf.h>
57#endif
58
59#if defined(__NetBSD__)
60
61#include <sys/ioctl.h>
62#include <sys/errno.h>
63#include <sys/device.h>
64
65#include <net/if_dl.h>
66#include <net/if_ether.h>
67
68#include <netinet/if_inarp.h>
69
70#include <vm/vm.h>
71
72#include <machine/cpu.h>
73#include <machine/bus.h>
74#include <machine/intr.h>
75
76#include <dev/pci/if_fxpreg.h>
77#include <dev/pci/if_fxpvar.h>
78
79#include <dev/pci/pcivar.h>
80#include <dev/pci/pcireg.h>
81#include <dev/pci/pcidevs.h>
82
83#ifdef __alpha__ /* XXX */
84/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
85#undef vtophys
86#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
87#endif /* __alpha__ */
88
89#else /* __FreeBSD__ */
90
91#include <sys/sockio.h>
92
93#include <net/ethernet.h>
94#include <net/if_arp.h>
95
96#include <vm/vm.h> /* for vtophys */
97#include <vm/pmap.h> /* for vtophys */
98#include <machine/clock.h> /* for DELAY */
99
100#include <pci/pcivar.h>
101#include <pci/if_fxpreg.h>
102#include <pci/if_fxpvar.h>
103
104#endif /* __NetBSD__ */
105
106/*
107 * NOTE! On the Alpha, we have an alignment constraint. The
108 * card DMAs the packet immediately following the RFA. However,
109 * the first thing in the packet is a 14-byte Ethernet header.
110 * This means that the packet is misaligned. To compensate,
111 * we actually offset the RFA 2 bytes into the cluster. This
112 * alignes the packet after the Ethernet header at a 32-bit
113 * boundary. HOWEVER! This means that the RFA is misaligned!
114 */
115#define RFA_ALIGNMENT_FUDGE 2
116
117/*
118 * Inline function to copy a 16-bit aligned 32-bit quantity.
119 */
120static __inline void fxp_lwcopy __P((volatile u_int32_t *,
121 volatile u_int32_t *));
122static __inline void
123fxp_lwcopy(src, dst)
124 volatile u_int32_t *src, *dst;
125{
126 volatile u_int16_t *a = (u_int16_t *)src;
127 volatile u_int16_t *b = (u_int16_t *)dst;
128
129 b[0] = a[0];
130 b[1] = a[1];
131}
132
133/*
134 * Template for default configuration parameters.
135 * See struct fxp_cb_config for the bit definitions.
136 */
137static u_char fxp_cb_config_template[] = {
138 0x0, 0x0, /* cb_status */
139 0x80, 0x2, /* cb_command */
140 0xff, 0xff, 0xff, 0xff, /* link_addr */
141 0x16, /* 0 */
142 0x8, /* 1 */
143 0x0, /* 2 */
144 0x0, /* 3 */
145 0x0, /* 4 */
146 0x80, /* 5 */
147 0xb2, /* 6 */
148 0x3, /* 7 */
149 0x1, /* 8 */
150 0x0, /* 9 */
151 0x26, /* 10 */
152 0x0, /* 11 */
153 0x60, /* 12 */
154 0x0, /* 13 */
155 0xf2, /* 14 */
156 0x48, /* 15 */
157 0x0, /* 16 */
158 0x40, /* 17 */
159 0xf3, /* 18 */
160 0x0, /* 19 */
161 0x3f, /* 20 */
162 0x5 /* 21 */
163};
164
165/* Supported media types. */
166struct fxp_supported_media {
167 const int fsm_phy; /* PHY type */
168 const int *fsm_media; /* the media array */
169 const int fsm_nmedia; /* the number of supported media */
170 const int fsm_defmedia; /* default media for this PHY */
171};
172
173static const int fxp_media_standard[] = {
174 IFM_ETHER|IFM_10_T,
175 IFM_ETHER|IFM_10_T|IFM_FDX,
176 IFM_ETHER|IFM_100_TX,
177 IFM_ETHER|IFM_100_TX|IFM_FDX,
178 IFM_ETHER|IFM_AUTO,
179};
180#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO)
181
182static const int fxp_media_default[] = {
183 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */
184};
185#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL)
186
187static const struct fxp_supported_media fxp_media[] = {
188 { FXP_PHY_DP83840, fxp_media_standard,
189 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
190 FXP_MEDIA_STANDARD_DEFMEDIA },
191 { FXP_PHY_DP83840A, fxp_media_standard,
192 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
193 FXP_MEDIA_STANDARD_DEFMEDIA },
194 { FXP_PHY_82553A, fxp_media_standard,
195 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
196 FXP_MEDIA_STANDARD_DEFMEDIA },
197 { FXP_PHY_82553C, fxp_media_standard,
198 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
199 FXP_MEDIA_STANDARD_DEFMEDIA },
200 { FXP_PHY_82555, fxp_media_standard,
201 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
202 FXP_MEDIA_STANDARD_DEFMEDIA },
203 { FXP_PHY_82555B, fxp_media_standard,
204 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
205 FXP_MEDIA_STANDARD_DEFMEDIA },
206 { FXP_PHY_80C24, fxp_media_default,
207 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]),
208 FXP_MEDIA_DEFAULT_DEFMEDIA },
209};
210#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0]))
211
212static int fxp_mediachange __P((struct ifnet *));
213static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *));
214static void fxp_set_media __P((struct fxp_softc *, int));
215static __inline void fxp_scb_wait __P((struct fxp_softc *));
216static FXP_INTR_TYPE fxp_intr __P((void *));
217static void fxp_start __P((struct ifnet *));
218static int fxp_ioctl __P((struct ifnet *,
219 FXP_IOCTLCMD_TYPE, caddr_t));
220static void fxp_init __P((void *));
221static void fxp_stop __P((struct fxp_softc *));
222static void fxp_watchdog __P((struct ifnet *));
223static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
224static int fxp_mdi_read __P((struct fxp_softc *, int, int));
225static void fxp_mdi_write __P((struct fxp_softc *, int, int, int));
226static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *,
227 int, int));
228static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *));
229static void fxp_stats_update __P((void *));
230static void fxp_mc_setup __P((struct fxp_softc *));
231
232/*
233 * Set initial transmit threshold at 64 (512 bytes). This is
234 * increased by 64 (512 bytes) at a time, to maximum of 192
235 * (1536 bytes), if an underrun occurs.
236 */
237static int tx_threshold = 64;
238
239/*
240 * Number of transmit control blocks. This determines the number
241 * of transmit buffers that can be chained in the CB list.
242 * This must be a power of two.
243 */
244#define FXP_NTXCB 128
245
246/*
247 * TxCB list index mask. This is used to do list wrap-around.
248 */
249#define FXP_TXCB_MASK (FXP_NTXCB - 1)
250
251/*
252 * Number of receive frame area buffers. These are large so chose
253 * wisely.
254 */
255#define FXP_NRFABUFS 64
256
257/*
258 * Maximum number of seconds that the receiver can be idle before we
259 * assume it's dead and attempt to reset it by reprogramming the
260 * multicast filter. This is part of a work-around for a bug in the
261 * NIC. See fxp_stats_update().
262 */
263#define FXP_MAX_RX_IDLE 15
264
265/*
266 * Wait for the previous command to be accepted (but not necessarily
267 * completed).
268 */
269static __inline void
270fxp_scb_wait(sc)
271 struct fxp_softc *sc;
272{
273 int i = 10000;
274
275 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i);
276}
277
278/*************************************************************
279 * Operating system-specific autoconfiguration glue
280 *************************************************************/
281
282#if defined(__NetBSD__)
283
284#ifdef __BROKEN_INDIRECT_CONFIG
285static int fxp_match __P((struct device *, void *, void *));
286#else
287static int fxp_match __P((struct device *, struct cfdata *, void *));
288#endif
289static void fxp_attach __P((struct device *, struct device *, void *));
290
291static void fxp_shutdown __P((void *));
292
293/* Compensate for lack of a generic ether_ioctl() */
294static int fxp_ether_ioctl __P((struct ifnet *,
295 FXP_IOCTLCMD_TYPE, caddr_t));
296#define ether_ioctl fxp_ether_ioctl
297
298struct cfattach fxp_ca = {
299 sizeof(struct fxp_softc), fxp_match, fxp_attach
300};
301
302struct cfdriver fxp_cd = {
303 NULL, "fxp", DV_IFNET
304};
305
306/*
307 * Check if a device is an 82557.
308 */
309static int
310fxp_match(parent, match, aux)
311 struct device *parent;
312#ifdef __BROKEN_INDIRECT_CONFIG
313 void *match;
314#else
315 struct cfdata *match;
316#endif
317 void *aux;
318{
319 struct pci_attach_args *pa = aux;
320
321 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
322 return (0);
323
324 switch (PCI_PRODUCT(pa->pa_id)) {
325 case PCI_PRODUCT_INTEL_82557:
326 return (1);
327 }
328
329 return (0);
330}
331
332static void
333fxp_attach(parent, self, aux)
334 struct device *parent, *self;
335 void *aux;
336{
337 struct fxp_softc *sc = (struct fxp_softc *)self;
338 struct pci_attach_args *pa = aux;
339 pci_chipset_tag_t pc = pa->pa_pc;
340 pci_intr_handle_t ih;
341 const char *intrstr = NULL;
342 u_int8_t enaddr[6];
343 struct ifnet *ifp;
344
345 /*
346 * Map control/status registers.
347 */
348 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
349 &sc->sc_st, &sc->sc_sh, NULL, NULL)) {
350 printf(": can't map registers\n");
351 return;
352 }
353 printf(": Intel EtherExpress Pro 10/100B Ethernet\n");
354
355 /*
356 * Allocate our interrupt.
357 */
358 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
359 pa->pa_intrline, &ih)) {
360 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
361 return;
362 }
363 intrstr = pci_intr_string(pc, ih);
364 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc);
365 if (sc->sc_ih == NULL) {
366 printf("%s: couldn't establish interrupt",
367 sc->sc_dev.dv_xname);
368 if (intrstr != NULL)
369 printf(" at %s", intrstr);
370 printf("\n");
371 return;
372 }
373 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
374
375 /* Do generic parts of attach. */
376 if (fxp_attach_common(sc, enaddr)) {
377 /* Failed! */
378 return;
379 }
380
381 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname,
382 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : "");
383
384 ifp = &sc->sc_ethercom.ec_if;
385 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
386 ifp->if_softc = sc;
387 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
388 ifp->if_ioctl = fxp_ioctl;
389 ifp->if_start = fxp_start;
390 ifp->if_watchdog = fxp_watchdog;
391
392 /*
393 * Attach the interface.
394 */
395 if_attach(ifp);
396 /*
397 * Let the system queue as many packets as we have TX descriptors.
398 */
399 ifp->if_snd.ifq_maxlen = FXP_NTXCB;
400 ether_ifattach(ifp, enaddr);
401#if NBPFILTER > 0
402 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
403 sizeof(struct ether_header));
404#endif
405
406 /*
407 * Add shutdown hook so that DMA is disabled prior to reboot. Not
408 * doing do could allow DMA to corrupt kernel memory during the
409 * reboot before the driver initializes.
410 */
411 shutdownhook_establish(fxp_shutdown, sc);
412}
413
414/*
415 * Device shutdown routine. Called at system shutdown after sync. The
416 * main purpose of this routine is to shut off receiver DMA so that
417 * kernel memory doesn't get clobbered during warmboot.
418 */
419static void
420fxp_shutdown(sc)
421 void *sc;
422{
423 fxp_stop((struct fxp_softc *) sc);
424}
425
426static int
427fxp_ether_ioctl(ifp, cmd, data)
428 struct ifnet *ifp;
429 FXP_IOCTLCMD_TYPE cmd;
430 caddr_t data;
431{
432 struct ifaddr *ifa = (struct ifaddr *) data;
433 struct fxp_softc *sc = ifp->if_softc;
434
435 switch (cmd) {
436 case SIOCSIFADDR:
437 ifp->if_flags |= IFF_UP;
438
439 switch (ifa->ifa_addr->sa_family) {
440#ifdef INET
441 case AF_INET:
442 fxp_init(sc);
443 arp_ifinit(ifp, ifa);
444 break;
445#endif
446#ifdef NS
447 case AF_NS:
448 {
449 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
450
451 if (ns_nullhost(*ina))
452 ina->x_host = *(union ns_host *)
453 LLADDR(ifp->if_sadl);
454 else
455 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
456 ifp->if_addrlen);
457 /* Set new address. */
458 fxp_init(sc);
459 break;
460 }
461#endif
462 default:
463 fxp_init(sc);
464 break;
465 }
466 break;
467
468 default:
469 return (EINVAL);
470 }
471
472 return (0);
473}
474
475#else /* __FreeBSD__ */
476
477static u_long fxp_count;
478static char *fxp_probe __P((pcici_t, pcidi_t));
479static void fxp_attach __P((pcici_t, int));
480
481static void fxp_shutdown __P((int, void *));
482
483static struct pci_device fxp_device = {
484 "fxp",
485 fxp_probe,
486 fxp_attach,
487 &fxp_count,
488 NULL
489};
490DATA_SET(pcidevice_set, fxp_device);
491
492/*
493 * Return identification string if this is device is ours.
494 */
495static char *
496fxp_probe(config_id, device_id)
497 pcici_t config_id;
498 pcidi_t device_id;
499{
500 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
501 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
502 return ("Intel EtherExpress Pro 10/100B Ethernet");
503
504 return NULL;
505}
506
507static void
508fxp_attach(config_id, unit)
509 pcici_t config_id;
510 int unit;
511{
512 struct fxp_softc *sc;
513 vm_offset_t pbase;
514 struct ifnet *ifp;
515 int s;
516
517 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
518 if (sc == NULL)
519 return;
520 bzero(sc, sizeof(struct fxp_softc));
521 callout_handle_init(&sc->stat_ch);
522
523 s = splimp();
524
525 /*
526 * Map control/status registers.
527 */
528 if (!pci_map_mem(config_id, FXP_PCI_MMBA,
529 (vm_offset_t *)&sc->csr, &pbase)) {
530 printf("fxp%d: couldn't map memory\n", unit);
531 goto fail;
532 }
533
534 /*
535 * Allocate our interrupt.
536 */
537 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
538 printf("fxp%d: couldn't map interrupt\n", unit);
539 goto fail;
540 }
541
542 /* Do generic parts of attach. */
543 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) {
544 /* Failed! */
545 (void) pci_unmap_int(config_id);
546 goto fail;
547 }
548
549 printf("fxp%d: Ethernet address %6D%s\n", unit,
550 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : "");
551
552 ifp = &sc->arpcom.ac_if;
553 ifp->if_unit = unit;
554 ifp->if_name = "fxp";
555 ifp->if_output = ether_output;
556 ifp->if_baudrate = 100000000;
557 ifp->if_init = fxp_init;
558 ifp->if_softc = sc;
559 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
560 ifp->if_ioctl = fxp_ioctl;
561 ifp->if_start = fxp_start;
562 ifp->if_watchdog = fxp_watchdog;
563
564 /*
565 * Attach the interface.
566 */
567 if_attach(ifp);
568 /*
569 * Let the system queue as many packets as we have TX descriptors.
570 */
571 ifp->if_snd.ifq_maxlen = FXP_NTXCB;
572 ether_ifattach(ifp);
573#if NBPFILTER > 0
574 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
575#endif
576
577 /*
578 * Add shutdown hook so that DMA is disabled prior to reboot. Not
579 * doing do could allow DMA to corrupt kernel memory during the
580 * reboot before the driver initializes.
581 */
582 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
583
584 splx(s);
585 return;
586
587 fail:
588 free(sc, M_DEVBUF);
589 splx(s);
590}
591
592/*
593 * Device shutdown routine. Called at system shutdown after sync. The
594 * main purpose of this routine is to shut off receiver DMA so that
595 * kernel memory doesn't get clobbered during warmboot.
596 */
597static void
598fxp_shutdown(howto, sc)
599 int howto;
600 void *sc;
601{
602 fxp_stop((struct fxp_softc *) sc);
603}
604
605#endif /* __NetBSD__ */
606
607/*************************************************************
608 * End of operating system-specific autoconfiguration glue
609 *************************************************************/
610
611/*
612 * Do generic parts of attach.
613 */
614static int
615fxp_attach_common(sc, enaddr)
616 struct fxp_softc *sc;
617 u_int8_t *enaddr;
618{
619 u_int16_t data;
620 int i, nmedia, defmedia;
621 const int *media;
622
623 /*
624 * Reset to a stable state.
625 */
626 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
627 DELAY(10);
628
629 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
630 M_DEVBUF, M_NOWAIT);
631 if (sc->cbl_base == NULL)
632 goto fail;
633
634 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
635 if (sc->fxp_stats == NULL)
636 goto fail;
637 bzero(sc->fxp_stats, sizeof(struct fxp_stats));
638
639 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT);
640 if (sc->mcsp == NULL)
641 goto fail;
642
643 /*
644 * Pre-allocate our receive buffers.
645 */
646 for (i = 0; i < FXP_NRFABUFS; i++) {
647 if (fxp_add_rfabuf(sc, NULL) != 0) {
648 goto fail;
649 }
650 }
651
652 /*
653 * Get info about the primary PHY
654 */
655 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1);
656 sc->phy_primary_addr = data & 0xff;
657 sc->phy_primary_device = (data >> 8) & 0x3f;
658 sc->phy_10Mbps_only = data >> 15;
659
660 /*
661 * Read MAC address.
662 */
663 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3);
664
665 /*
666 * Initialize the media structures.
667 */
668
669 media = fxp_media_default;
670 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]);
671 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA;
672
673 for (i = 0; i < NFXPMEDIA; i++) {
674 if (sc->phy_primary_device == fxp_media[i].fsm_phy) {
675 media = fxp_media[i].fsm_media;
676 nmedia = fxp_media[i].fsm_nmedia;
677 defmedia = fxp_media[i].fsm_defmedia;
678 }
679 }
680
681 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus);
682 for (i = 0; i < nmedia; i++) {
683 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only)
684 continue;
685 ifmedia_add(&sc->sc_media, media[i], 0, NULL);
686 }
687 ifmedia_set(&sc->sc_media, defmedia);
688
689 return (0);
690
691 fail:
692 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc));
693 if (sc->cbl_base)
694 free(sc->cbl_base, M_DEVBUF);
695 if (sc->fxp_stats)
696 free(sc->fxp_stats, M_DEVBUF);
697 if (sc->mcsp)
698 free(sc->mcsp, M_DEVBUF);
699 /* frees entire chain */
700 if (sc->rfa_headm)
701 m_freem(sc->rfa_headm);
702
703 return (ENOMEM);
704}
705
706/*
707 * Read from the serial EEPROM. Basically, you manually shift in
708 * the read opcode (one bit at a time) and then shift in the address,
709 * and then you shift out the data (all of this one bit at a time).
710 * The word size is 16 bits, so you have to provide the address for
711 * every 16 bits of data.
712 */
713static void
714fxp_read_eeprom(sc, data, offset, words)
715 struct fxp_softc *sc;
716 u_short *data;
717 int offset;
718 int words;
719{
720 u_int16_t reg;
721 int i, x;
722
723 for (i = 0; i < words; i++) {
724 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
725 /*
726 * Shift in read opcode.
727 */
728 for (x = 3; x > 0; x--) {
729 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
730 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
731 } else {
732 reg = FXP_EEPROM_EECS;
733 }
734 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
735 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
736 reg | FXP_EEPROM_EESK);
737 DELAY(1);
738 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
739 DELAY(1);
740 }
741 /*
742 * Shift in address.
743 */
744 for (x = 6; x > 0; x--) {
745 if ((i + offset) & (1 << (x - 1))) {
746 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
747 } else {
748 reg = FXP_EEPROM_EECS;
749 }
750 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
751 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
752 reg | FXP_EEPROM_EESK);
753 DELAY(1);
754 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
755 DELAY(1);
756 }
757 reg = FXP_EEPROM_EECS;
758 data[i] = 0;
759 /*
760 * Shift out data.
761 */
762 for (x = 16; x > 0; x--) {
763 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
764 reg | FXP_EEPROM_EESK);
765 DELAY(1);
766 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
767 FXP_EEPROM_EEDO)
768 data[i] |= (1 << (x - 1));
769 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
770 DELAY(1);
771 }
772 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
773 DELAY(1);
774 }
775}
776
777/*
778 * Start packet transmission on the interface.
779 */
780static void
781fxp_start(ifp)
782 struct ifnet *ifp;
783{
784 struct fxp_softc *sc = ifp->if_softc;
785 struct fxp_cb_tx *txp;
786
787 /*
788 * See if we need to suspend xmit until the multicast filter
789 * has been reprogrammed (which can only be done at the head
790 * of the command chain).
791 */
792 if (sc->need_mcsetup)
793 return;
794
795 txp = NULL;
796
797 /*
798 * We're finished if there is nothing more to add to the list or if
799 * we're all filled up with buffers to transmit.
800 */
801 while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB) {
802 struct mbuf *m, *mb_head;
803 int segment;
804
805 /*
806 * Grab a packet to transmit.
807 */
808 IF_DEQUEUE(&ifp->if_snd, mb_head);
809
810 /*
811 * Get pointer to next available tx desc.
812 */
813 txp = sc->cbl_last->next;
814
815 /*
816 * Go through each of the mbufs in the chain and initialize
817 * the transmit buffer descriptors with the physical address
818 * and size of the mbuf.
819 */
820tbdinit:
821 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
822 if (m->m_len != 0) {
823 if (segment == FXP_NTXSEG)
824 break;
825 txp->tbd[segment].tb_addr =
826 vtophys(mtod(m, vm_offset_t));
827 txp->tbd[segment].tb_size = m->m_len;
828 segment++;
829 }
830 }
831 if (m != NULL) {
832 struct mbuf *mn;
833
834 /*
835 * We ran out of segments. We have to recopy this mbuf
836 * chain first. Bail out if we can't get the new buffers.
837 */
838 MGETHDR(mn, M_DONTWAIT, MT_DATA);
839 if (mn == NULL) {
840 m_freem(mb_head);
841 break;
842 }
843 if (mb_head->m_pkthdr.len > MHLEN) {
844 MCLGET(mn, M_DONTWAIT);
845 if ((mn->m_flags & M_EXT) == 0) {
846 m_freem(mn);
847 m_freem(mb_head);
848 break;
849 }
850 }
851 m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
852 mtod(mn, caddr_t));
853 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
854 m_freem(mb_head);
855 mb_head = mn;
856 goto tbdinit;
857 }
858
859 txp->tbd_number = segment;
860 txp->mb_head = mb_head;
861 txp->cb_status = 0;
862 txp->cb_command =
863 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
864 txp->tx_threshold = tx_threshold;
865
866 /*
867 * Advance the end of list forward.
868 */
869 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
870 sc->cbl_last = txp;
871
872 /*
873 * Advance the beginning of the list forward if there are
874 * no other packets queued (when nothing is queued, cbl_first
875 * sits on the last TxCB that was sent out).
876 */
877 if (sc->tx_queued == 0)
878 sc->cbl_first = txp;
879
880 sc->tx_queued++;
881
882#if NBPFILTER > 0
883 /*
884 * Pass packet to bpf if there is a listener.
885 */
886 if (ifp->if_bpf)
887 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head);
888#endif
889 }
890
891 /*
892 * We're finished. If we added to the list, issue a RESUME to get DMA
893 * going again if suspended.
894 */
895 if (txp != NULL) {
896 fxp_scb_wait(sc);
897 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME);
898
899 /*
900 * Set a 5 second timer just in case we don't hear from the
901 * card again.
902 */
903 ifp->if_timer = 5;
904 }
905}
906
907/*
908 * Process interface interrupts.
909 */
910static FXP_INTR_TYPE
911fxp_intr(arg)
912 void *arg;
913{
914 struct fxp_softc *sc = arg;
915 struct ifnet *ifp = &sc->sc_if;
916 u_int8_t statack;
917#if defined(__NetBSD__)
918 int claimed = 0;
919#endif
920
921 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
922#if defined(__NetBSD__)
923 claimed = 1;
924#endif
925 /*
926 * First ACK all the interrupts in this pass.
927 */
928 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
929
930 /*
931 * Process receiver interrupts. If a no-resource (RNR)
932 * condition exists, get whatever packets we can and
933 * re-start the receiver.
934 */
935 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
936 struct mbuf *m;
937 struct fxp_rfa *rfa;
938rcvloop:
939 m = sc->rfa_headm;
940 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
941 RFA_ALIGNMENT_FUDGE);
942
943 if (rfa->rfa_status & FXP_RFA_STATUS_C) {
944 /*
945 * Remove first packet from the chain.
946 */
947 sc->rfa_headm = m->m_next;
948 m->m_next = NULL;
949
950 /*
951 * Add a new buffer to the receive chain.
952 * If this fails, the old buffer is recycled
953 * instead.
954 */
955 if (fxp_add_rfabuf(sc, m) == 0) {
956 struct ether_header *eh;
957 u_int16_t total_len;
958
959 total_len = rfa->actual_size &
960 (MCLBYTES - 1);
961 if (total_len <
962 sizeof(struct ether_header)) {
963 m_freem(m);
964 goto rcvloop;
965 }
966 m->m_pkthdr.rcvif = ifp;
967 m->m_pkthdr.len = m->m_len =
968 total_len -
969 sizeof(struct ether_header);
970 eh = mtod(m, struct ether_header *);
971#if NBPFILTER > 0
972 if (ifp->if_bpf) {
973 bpf_tap(FXP_BPFTAP_ARG(ifp),
974 mtod(m, caddr_t),
975 total_len);
976 /*
977 * Only pass this packet up
978 * if it is for us.
979 */
980 if ((ifp->if_flags &
981 IFF_PROMISC) &&
982 (rfa->rfa_status &
983 FXP_RFA_STATUS_IAMATCH) &&
984 (eh->ether_dhost[0] & 1)
985 == 0) {
986 m_freem(m);
987 goto rcvloop;
988 }
989 }
990#endif /* NBPFILTER > 0 */
991 m->m_data +=
992 sizeof(struct ether_header);
993 ether_input(ifp, eh, m);
994 }
995 goto rcvloop;
996 }
997 if (statack & FXP_SCB_STATACK_RNR) {
998 fxp_scb_wait(sc);
999 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1000 vtophys(sc->rfa_headm->m_ext.ext_buf) +
1001 RFA_ALIGNMENT_FUDGE);
1002 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
1003 FXP_SCB_COMMAND_RU_START);
1004 }
1005 }
1006 /*
1007 * Free any finished transmit mbuf chains.
1008 */
1009 if (statack & FXP_SCB_STATACK_CNA) {
1010 struct fxp_cb_tx *txp;
1011
1012 for (txp = sc->cbl_first; sc->tx_queued &&
1013 (txp->cb_status & FXP_CB_STATUS_C) != 0;
1014 txp = txp->next) {
1015 if (txp->mb_head != NULL) {
1016 m_freem(txp->mb_head);
1017 txp->mb_head = NULL;
1018 }
1019 sc->tx_queued--;
1020 }
1021 sc->cbl_first = txp;
1022 if (sc->tx_queued == 0) {
1023 ifp->if_timer = 0;
1024 if (sc->need_mcsetup)
1025 fxp_mc_setup(sc);
1026 }
1027 /*
1028 * Try to start more packets transmitting.
1029 */
1030 if (ifp->if_snd.ifq_head != NULL)
1031 fxp_start(ifp);
1032 }
1033 }
1034#if defined(__NetBSD__)
1035 return (claimed);
1036#endif
1037}
1038
1039/*
1040 * Update packet in/out/collision statistics. The i82557 doesn't
1041 * allow you to access these counters without doing a fairly
1042 * expensive DMA to get _all_ of the statistics it maintains, so
1043 * we do this operation here only once per second. The statistics
1044 * counters in the kernel are updated from the previous dump-stats
1045 * DMA and then a new dump-stats DMA is started. The on-chip
1046 * counters are zeroed when the DMA completes. If we can't start
1047 * the DMA immediately, we don't wait - we just prepare to read
1048 * them again next time.
1049 */
1050static void
1051fxp_stats_update(arg)
1052 void *arg;
1053{
1054 struct fxp_softc *sc = arg;
1055 struct ifnet *ifp = &sc->sc_if;
1056 struct fxp_stats *sp = sc->fxp_stats;
1057 int s;
1058
1059 ifp->if_opackets += sp->tx_good;
1060 ifp->if_collisions += sp->tx_total_collisions;
1061 if (sp->rx_good) {
1062 ifp->if_ipackets += sp->rx_good;
1063 sc->rx_idle_secs = 0;
1064 } else {
1065 sc->rx_idle_secs++;
1066 }
1067 ifp->if_ierrors +=
1068 sp->rx_crc_errors +
1069 sp->rx_alignment_errors +
1070 sp->rx_rnr_errors +
1071 sp->rx_overrun_errors;
1072 /*
1073 * If any transmit underruns occured, bump up the transmit
1074 * threshold by another 512 bytes (64 * 8).
1075 */
1076 if (sp->tx_underruns) {
1077 ifp->if_oerrors += sp->tx_underruns;
1078 if (tx_threshold < 192)
1079 tx_threshold += 64;
1080 }
1081 s = splimp();
1082 /*
1083 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds,
1084 * then assume the receiver has locked up and attempt to clear
1085 * the condition by reprogramming the multicast filter. This is
1086 * a work-around for a bug in the 82557 where the receiver locks
1087 * up if it gets certain types of garbage in the syncronization
1088 * bits prior to the packet header. This bug is supposed to only
1089 * occur in 10Mbps mode, but has been seen to occur in 100Mbps
1090 * mode as well (perhaps due to a 10/100 speed transition).
1091 */
1092 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) {
1093 sc->rx_idle_secs = 0;
1094 fxp_mc_setup(sc);
1095 }
1096 /*
1097 * If there is no pending command, start another stats
1098 * dump. Otherwise punt for now.
1099 */
1100 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) {
1101 /*
1102 * Start another stats dump.
1103 */
1104 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
1105 FXP_SCB_COMMAND_CU_DUMPRESET);
1106 } else {
1107 /*
1108 * A previous command is still waiting to be accepted.
1109 * Just zero our copy of the stats and wait for the
1110 * next timer event to update them.
1111 */
1112 sp->tx_good = 0;
1113 sp->tx_underruns = 0;
1114 sp->tx_total_collisions = 0;
1115
1116 sp->rx_good = 0;
1117 sp->rx_crc_errors = 0;
1118 sp->rx_alignment_errors = 0;
1119 sp->rx_rnr_errors = 0;
1120 sp->rx_overrun_errors = 0;
1121 }
1122 splx(s);
1123 /*
1124 * Schedule another timeout one second from now.
1125 */
1126 sc->stat_ch = timeout(fxp_stats_update, sc, hz);
1127}
1128
1129/*
1130 * Stop the interface. Cancels the statistics updater and resets
1131 * the interface.
1132 */
1133static void
1134fxp_stop(sc)
1135 struct fxp_softc *sc;
1136{
1137 struct ifnet *ifp = &sc->sc_if;
1138 struct fxp_cb_tx *txp;
1139 int i;
1140
1141 /*
1142 * Cancel stats updater.
1143 */
1144 untimeout(fxp_stats_update, sc, sc->stat_ch);
1145
1146 /*
1147 * Issue software reset
1148 */
1149 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
1150 DELAY(10);
1151
1152 /*
1153 * Release any xmit buffers.
1154 */
1155 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
1156 txp = txp->next) {
1157 m_freem(txp->mb_head);
1158 txp->mb_head = NULL;
1159 }
1160 sc->tx_queued = 0;
1161
1162 /*
1163 * Free all the receive buffers then reallocate/reinitialize
1164 */
1165 if (sc->rfa_headm != NULL)
1166 m_freem(sc->rfa_headm);
1167 sc->rfa_headm = NULL;
1168 sc->rfa_tailm = NULL;
1169 for (i = 0; i < FXP_NRFABUFS; i++) {
1170 if (fxp_add_rfabuf(sc, NULL) != 0) {
1171 /*
1172 * This "can't happen" - we're at splimp()
1173 * and we just freed all the buffers we need
1174 * above.
1175 */
1176 panic("fxp_stop: no buffers!");
1177 }
1178 }
1179
1180 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1181 ifp->if_timer = 0;
1182}
1183
1184/*
1185 * Watchdog/transmission transmit timeout handler. Called when a
1186 * transmission is started on the interface, but no interrupt is
1187 * received before the timeout. This usually indicates that the
1188 * card has wedged for some reason.
1189 */
1190static void
1191fxp_watchdog(ifp)
1192 struct ifnet *ifp;
1193{
1194 struct fxp_softc *sc = ifp->if_softc;
1195
1196 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc));
1197 ifp->if_oerrors++;
1198
1199 fxp_init(sc);
1200}
1201
1202static void
1203fxp_init(xsc)
1204 void *xsc;
1205{
1206 struct fxp_softc *sc = xsc;
1207 struct ifnet *ifp = &sc->sc_if;
1208 struct fxp_cb_config *cbp;
1209 struct fxp_cb_ias *cb_ias;
1210 struct fxp_cb_tx *txp;
1211 int i, s, prm;
1212
1213 s = splimp();
1214 /*
1215 * Cancel any pending I/O
1216 */
1217 fxp_stop(sc);
1218
1219 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
1220 sc->promisc_mode = prm;
1221
1222 /*
1223 * Initialize base of CBL and RFA memory. Loading with zero
1224 * sets it up for regular linear addressing.
1225 */
1226 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
1227 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE);
1228
1229 fxp_scb_wait(sc);
1230 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE);
1231
1232 /*
1233 * Initialize base of dump-stats buffer.
1234 */
1235 fxp_scb_wait(sc);
1236 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats));
1237 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR);
1238
1239 /*
1240 * We temporarily use memory that contains the TxCB list to
1241 * construct the config CB. The TxCB list memory is rebuilt
1242 * later.
1243 */
1244 cbp = (struct fxp_cb_config *) sc->cbl_base;
1245
1246 /*
1247 * This bcopy is kind of disgusting, but there are a bunch of must be
1248 * zero and must be one bits in this structure and this is the easiest
1249 * way to initialize them all to proper values.
1250 */
1251 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status,
1252 sizeof(fxp_cb_config_template));
1253
1254 cbp->cb_status = 0;
1255 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
1256 cbp->link_addr = -1; /* (no) next command */
1257 cbp->byte_count = 22; /* (22) bytes to config */
1258 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */
1259 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */
1260 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
1261 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
1262 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
1263 cbp->dma_bce = 0; /* (disable) dma max counters */
1264 cbp->late_scb = 0; /* (don't) defer SCB update */
1265 cbp->tno_int = 0; /* (disable) tx not okay interrupt */
1266 cbp->ci_int = 0; /* interrupt on CU not active */
1267 cbp->save_bf = prm; /* save bad frames */
1268 cbp->disc_short_rx = !prm; /* discard short packets */
1269 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
1270 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
1271 cbp->nsai = 1; /* (don't) disable source addr insert */
1272 cbp->preamble_length = 2; /* (7 byte) preamble */
1273 cbp->loopback = 0; /* (don't) loopback */
1274 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
1275 cbp->linear_pri_mode = 0; /* (wait after xmit only) */
1276 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
1277 cbp->promiscuous = prm; /* promiscuous mode */
1278 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
1279 cbp->crscdt = 0; /* (CRS only) */
1280 cbp->stripping = !prm; /* truncate rx packet to byte count */
1281 cbp->padding = 1; /* (do) pad short tx packets */
1282 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
1283 cbp->force_fdx = 0; /* (don't) force full duplex */
1284 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
1285 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
1286 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */
1287
1288 /*
1289 * Start the config command/DMA.
1290 */
1291 fxp_scb_wait(sc);
1292 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1293 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1294 /* ...and wait for it to complete. */
1295 while (!(cbp->cb_status & FXP_CB_STATUS_C));
1296
1297 /*
1298 * Now initialize the station address. Temporarily use the TxCB
1299 * memory area like we did above for the config CB.
1300 */
1301 cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
1302 cb_ias->cb_status = 0;
1303 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
1304 cb_ias->link_addr = -1;
1305#if defined(__NetBSD__)
1306 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6);
1307#else
1308 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
1309 sizeof(sc->arpcom.ac_enaddr));
1310#endif /* __NetBSD__ */
1311
1312 /*
1313 * Start the IAS (Individual Address Setup) command/DMA.
1314 */
1315 fxp_scb_wait(sc);
1316 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1317 /* ...and wait for it to complete. */
1318 while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
1319
1320 /*
1321 * Initialize transmit control block (TxCB) list.
1322 */
1323
1324 txp = sc->cbl_base;
1325 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1326 for (i = 0; i < FXP_NTXCB; i++) {
1327 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1328 txp[i].cb_command = FXP_CB_COMMAND_NOP;
1329 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1330 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1331 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1332 }
1333 /*
1334 * Set the suspend flag on the first TxCB and start the control
1335 * unit. It will execute the NOP and then suspend.
1336 */
1337 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1338 sc->cbl_first = sc->cbl_last = txp;
1339 sc->tx_queued = 1;
1340
1341 fxp_scb_wait(sc);
1342 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1343
1344 /*
1345 * Initialize receiver buffer area - RFA.
1346 */
1347 fxp_scb_wait(sc);
1348 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1349 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE);
1350 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START);
1351
1352 /*
1353 * Set current media.
1354 */
1355 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
1356
1357 ifp->if_flags |= IFF_RUNNING;
1358 ifp->if_flags &= ~IFF_OACTIVE;
1359 splx(s);
1360
1361 /*
1362 * Start stats updater.
1363 */
1364 sc->stat_ch = timeout(fxp_stats_update, sc, hz);
1365}
1366
1367static void
1368fxp_set_media(sc, media)
1369 struct fxp_softc *sc;
1370 int media;
1371{
1372
1373 switch (sc->phy_primary_device) {
1374 case FXP_PHY_DP83840:
1375 case FXP_PHY_DP83840A:
1376 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR,
1377 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) |
1378 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */
1379 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */
1380 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */
1381 /* fall through */
1382 case FXP_PHY_82553A:
1383 case FXP_PHY_82553C: /* untested */
1384 case FXP_PHY_82555:
1385 case FXP_PHY_82555B:
1386 if (IFM_SUBTYPE(media) != IFM_AUTO) {
1387 int flags;
1388
1389 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ?
1390 FXP_PHY_BMCR_SPEED_100M : 0;
1391 flags |= (media & IFM_FDX) ?
1392 FXP_PHY_BMCR_FULLDUPLEX : 0;
1393 fxp_mdi_write(sc, sc->phy_primary_addr,
1394 FXP_PHY_BMCR,
1395 (fxp_mdi_read(sc, sc->phy_primary_addr,
1396 FXP_PHY_BMCR) &
1397 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
1398 FXP_PHY_BMCR_FULLDUPLEX)) | flags);
1399 } else {
1400 fxp_mdi_write(sc, sc->phy_primary_addr,
1401 FXP_PHY_BMCR,
1402 (fxp_mdi_read(sc, sc->phy_primary_addr,
1403 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN));
1404 }
1405 break;
1406 /*
1407 * The Seeq 80c24 doesn't have a PHY programming interface, so do
1408 * nothing.
1409 */
1410 case FXP_PHY_80C24:
1411 break;
1412 default:
1413 printf(FXP_FORMAT
1414 ": warning: unsupported PHY, type = %d, addr = %d\n",
1415 FXP_ARGS(sc), sc->phy_primary_device,
1416 sc->phy_primary_addr);
1417 }
1418}
1419
1420/*
1421 * Change media according to request.
1422 */
1423int
1424fxp_mediachange(ifp)
1425 struct ifnet *ifp;
1426{
1427 struct fxp_softc *sc = ifp->if_softc;
1428 struct ifmedia *ifm = &sc->sc_media;
1429
1430 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1431 return (EINVAL);
1432
1433 fxp_set_media(sc, ifm->ifm_media);
1434 return (0);
1435}
1436
1437/*
1438 * Notify the world which media we're using.
1439 */
1440void
1441fxp_mediastatus(ifp, ifmr)
1442 struct ifnet *ifp;
1443 struct ifmediareq *ifmr;
1444{
1445 struct fxp_softc *sc = ifp->if_softc;
1446 int flags;
1447
1448 switch (sc->phy_primary_device) {
1449 case FXP_PHY_DP83840:
1450 case FXP_PHY_DP83840A:
1451 case FXP_PHY_82555:
1452 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR);
1453 ifmr->ifm_active = IFM_ETHER;
1454 if (flags & FXP_PHY_BMCR_AUTOEN)
1455 ifmr->ifm_active |= IFM_AUTO;
1456 else {
1457 if (flags & FXP_PHY_BMCR_SPEED_100M)
1458 ifmr->ifm_active |= IFM_100_TX;
1459 else
1460 ifmr->ifm_active |= IFM_10_T;
1461
1462 if (flags & FXP_PHY_BMCR_FULLDUPLEX)
1463 ifmr->ifm_active |= IFM_FDX;
1464 }
1465 break;
1466
1467 case FXP_PHY_80C24:
1468 default:
1469 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */
1470 }
1471}
1472
1473/*
1474 * Add a buffer to the end of the RFA buffer list.
1475 * Return 0 if successful, 1 for failure. A failure results in
1476 * adding the 'oldm' (if non-NULL) on to the end of the list -
| 31 */
32
33/*
34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
35 */
36
37#include "bpfilter.h"
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/malloc.h>
43#include <sys/kernel.h>
44#include <sys/socket.h>
45
46#include <net/if.h>
47#include <net/if_dl.h>
48#include <net/if_media.h>
49
50#ifdef NS
51#include <netns/ns.h>
52#include <netns/ns_if.h>
53#endif
54
55#if NBPFILTER > 0
56#include <net/bpf.h>
57#endif
58
59#if defined(__NetBSD__)
60
61#include <sys/ioctl.h>
62#include <sys/errno.h>
63#include <sys/device.h>
64
65#include <net/if_dl.h>
66#include <net/if_ether.h>
67
68#include <netinet/if_inarp.h>
69
70#include <vm/vm.h>
71
72#include <machine/cpu.h>
73#include <machine/bus.h>
74#include <machine/intr.h>
75
76#include <dev/pci/if_fxpreg.h>
77#include <dev/pci/if_fxpvar.h>
78
79#include <dev/pci/pcivar.h>
80#include <dev/pci/pcireg.h>
81#include <dev/pci/pcidevs.h>
82
83#ifdef __alpha__ /* XXX */
84/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
85#undef vtophys
86#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
87#endif /* __alpha__ */
88
89#else /* __FreeBSD__ */
90
91#include <sys/sockio.h>
92
93#include <net/ethernet.h>
94#include <net/if_arp.h>
95
96#include <vm/vm.h> /* for vtophys */
97#include <vm/pmap.h> /* for vtophys */
98#include <machine/clock.h> /* for DELAY */
99
100#include <pci/pcivar.h>
101#include <pci/if_fxpreg.h>
102#include <pci/if_fxpvar.h>
103
104#endif /* __NetBSD__ */
105
106/*
107 * NOTE! On the Alpha, we have an alignment constraint. The
108 * card DMAs the packet immediately following the RFA. However,
109 * the first thing in the packet is a 14-byte Ethernet header.
110 * This means that the packet is misaligned. To compensate,
111 * we actually offset the RFA 2 bytes into the cluster. This
112 * alignes the packet after the Ethernet header at a 32-bit
113 * boundary. HOWEVER! This means that the RFA is misaligned!
114 */
115#define RFA_ALIGNMENT_FUDGE 2
116
117/*
118 * Inline function to copy a 16-bit aligned 32-bit quantity.
119 */
120static __inline void fxp_lwcopy __P((volatile u_int32_t *,
121 volatile u_int32_t *));
122static __inline void
123fxp_lwcopy(src, dst)
124 volatile u_int32_t *src, *dst;
125{
126 volatile u_int16_t *a = (u_int16_t *)src;
127 volatile u_int16_t *b = (u_int16_t *)dst;
128
129 b[0] = a[0];
130 b[1] = a[1];
131}
132
133/*
134 * Template for default configuration parameters.
135 * See struct fxp_cb_config for the bit definitions.
136 */
137static u_char fxp_cb_config_template[] = {
138 0x0, 0x0, /* cb_status */
139 0x80, 0x2, /* cb_command */
140 0xff, 0xff, 0xff, 0xff, /* link_addr */
141 0x16, /* 0 */
142 0x8, /* 1 */
143 0x0, /* 2 */
144 0x0, /* 3 */
145 0x0, /* 4 */
146 0x80, /* 5 */
147 0xb2, /* 6 */
148 0x3, /* 7 */
149 0x1, /* 8 */
150 0x0, /* 9 */
151 0x26, /* 10 */
152 0x0, /* 11 */
153 0x60, /* 12 */
154 0x0, /* 13 */
155 0xf2, /* 14 */
156 0x48, /* 15 */
157 0x0, /* 16 */
158 0x40, /* 17 */
159 0xf3, /* 18 */
160 0x0, /* 19 */
161 0x3f, /* 20 */
162 0x5 /* 21 */
163};
164
165/* Supported media types. */
166struct fxp_supported_media {
167 const int fsm_phy; /* PHY type */
168 const int *fsm_media; /* the media array */
169 const int fsm_nmedia; /* the number of supported media */
170 const int fsm_defmedia; /* default media for this PHY */
171};
172
173static const int fxp_media_standard[] = {
174 IFM_ETHER|IFM_10_T,
175 IFM_ETHER|IFM_10_T|IFM_FDX,
176 IFM_ETHER|IFM_100_TX,
177 IFM_ETHER|IFM_100_TX|IFM_FDX,
178 IFM_ETHER|IFM_AUTO,
179};
180#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO)
181
182static const int fxp_media_default[] = {
183 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */
184};
185#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL)
186
187static const struct fxp_supported_media fxp_media[] = {
188 { FXP_PHY_DP83840, fxp_media_standard,
189 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
190 FXP_MEDIA_STANDARD_DEFMEDIA },
191 { FXP_PHY_DP83840A, fxp_media_standard,
192 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
193 FXP_MEDIA_STANDARD_DEFMEDIA },
194 { FXP_PHY_82553A, fxp_media_standard,
195 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
196 FXP_MEDIA_STANDARD_DEFMEDIA },
197 { FXP_PHY_82553C, fxp_media_standard,
198 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
199 FXP_MEDIA_STANDARD_DEFMEDIA },
200 { FXP_PHY_82555, fxp_media_standard,
201 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
202 FXP_MEDIA_STANDARD_DEFMEDIA },
203 { FXP_PHY_82555B, fxp_media_standard,
204 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
205 FXP_MEDIA_STANDARD_DEFMEDIA },
206 { FXP_PHY_80C24, fxp_media_default,
207 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]),
208 FXP_MEDIA_DEFAULT_DEFMEDIA },
209};
210#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0]))
211
212static int fxp_mediachange __P((struct ifnet *));
213static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *));
214static void fxp_set_media __P((struct fxp_softc *, int));
215static __inline void fxp_scb_wait __P((struct fxp_softc *));
216static FXP_INTR_TYPE fxp_intr __P((void *));
217static void fxp_start __P((struct ifnet *));
218static int fxp_ioctl __P((struct ifnet *,
219 FXP_IOCTLCMD_TYPE, caddr_t));
220static void fxp_init __P((void *));
221static void fxp_stop __P((struct fxp_softc *));
222static void fxp_watchdog __P((struct ifnet *));
223static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
224static int fxp_mdi_read __P((struct fxp_softc *, int, int));
225static void fxp_mdi_write __P((struct fxp_softc *, int, int, int));
226static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *,
227 int, int));
228static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *));
229static void fxp_stats_update __P((void *));
230static void fxp_mc_setup __P((struct fxp_softc *));
231
232/*
233 * Set initial transmit threshold at 64 (512 bytes). This is
234 * increased by 64 (512 bytes) at a time, to maximum of 192
235 * (1536 bytes), if an underrun occurs.
236 */
237static int tx_threshold = 64;
238
239/*
240 * Number of transmit control blocks. This determines the number
241 * of transmit buffers that can be chained in the CB list.
242 * This must be a power of two.
243 */
244#define FXP_NTXCB 128
245
246/*
247 * TxCB list index mask. This is used to do list wrap-around.
248 */
249#define FXP_TXCB_MASK (FXP_NTXCB - 1)
250
251/*
252 * Number of receive frame area buffers. These are large so chose
253 * wisely.
254 */
255#define FXP_NRFABUFS 64
256
257/*
258 * Maximum number of seconds that the receiver can be idle before we
259 * assume it's dead and attempt to reset it by reprogramming the
260 * multicast filter. This is part of a work-around for a bug in the
261 * NIC. See fxp_stats_update().
262 */
263#define FXP_MAX_RX_IDLE 15
264
265/*
266 * Wait for the previous command to be accepted (but not necessarily
267 * completed).
268 */
269static __inline void
270fxp_scb_wait(sc)
271 struct fxp_softc *sc;
272{
273 int i = 10000;
274
275 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i);
276}
277
278/*************************************************************
279 * Operating system-specific autoconfiguration glue
280 *************************************************************/
281
282#if defined(__NetBSD__)
283
284#ifdef __BROKEN_INDIRECT_CONFIG
285static int fxp_match __P((struct device *, void *, void *));
286#else
287static int fxp_match __P((struct device *, struct cfdata *, void *));
288#endif
289static void fxp_attach __P((struct device *, struct device *, void *));
290
291static void fxp_shutdown __P((void *));
292
293/* Compensate for lack of a generic ether_ioctl() */
294static int fxp_ether_ioctl __P((struct ifnet *,
295 FXP_IOCTLCMD_TYPE, caddr_t));
296#define ether_ioctl fxp_ether_ioctl
297
298struct cfattach fxp_ca = {
299 sizeof(struct fxp_softc), fxp_match, fxp_attach
300};
301
302struct cfdriver fxp_cd = {
303 NULL, "fxp", DV_IFNET
304};
305
306/*
307 * Check if a device is an 82557.
308 */
309static int
310fxp_match(parent, match, aux)
311 struct device *parent;
312#ifdef __BROKEN_INDIRECT_CONFIG
313 void *match;
314#else
315 struct cfdata *match;
316#endif
317 void *aux;
318{
319 struct pci_attach_args *pa = aux;
320
321 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
322 return (0);
323
324 switch (PCI_PRODUCT(pa->pa_id)) {
325 case PCI_PRODUCT_INTEL_82557:
326 return (1);
327 }
328
329 return (0);
330}
331
332static void
333fxp_attach(parent, self, aux)
334 struct device *parent, *self;
335 void *aux;
336{
337 struct fxp_softc *sc = (struct fxp_softc *)self;
338 struct pci_attach_args *pa = aux;
339 pci_chipset_tag_t pc = pa->pa_pc;
340 pci_intr_handle_t ih;
341 const char *intrstr = NULL;
342 u_int8_t enaddr[6];
343 struct ifnet *ifp;
344
345 /*
346 * Map control/status registers.
347 */
348 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
349 &sc->sc_st, &sc->sc_sh, NULL, NULL)) {
350 printf(": can't map registers\n");
351 return;
352 }
353 printf(": Intel EtherExpress Pro 10/100B Ethernet\n");
354
355 /*
356 * Allocate our interrupt.
357 */
358 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
359 pa->pa_intrline, &ih)) {
360 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
361 return;
362 }
363 intrstr = pci_intr_string(pc, ih);
364 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc);
365 if (sc->sc_ih == NULL) {
366 printf("%s: couldn't establish interrupt",
367 sc->sc_dev.dv_xname);
368 if (intrstr != NULL)
369 printf(" at %s", intrstr);
370 printf("\n");
371 return;
372 }
373 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
374
375 /* Do generic parts of attach. */
376 if (fxp_attach_common(sc, enaddr)) {
377 /* Failed! */
378 return;
379 }
380
381 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname,
382 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : "");
383
384 ifp = &sc->sc_ethercom.ec_if;
385 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
386 ifp->if_softc = sc;
387 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
388 ifp->if_ioctl = fxp_ioctl;
389 ifp->if_start = fxp_start;
390 ifp->if_watchdog = fxp_watchdog;
391
392 /*
393 * Attach the interface.
394 */
395 if_attach(ifp);
396 /*
397 * Let the system queue as many packets as we have TX descriptors.
398 */
399 ifp->if_snd.ifq_maxlen = FXP_NTXCB;
400 ether_ifattach(ifp, enaddr);
401#if NBPFILTER > 0
402 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
403 sizeof(struct ether_header));
404#endif
405
406 /*
407 * Add shutdown hook so that DMA is disabled prior to reboot. Not
408 * doing do could allow DMA to corrupt kernel memory during the
409 * reboot before the driver initializes.
410 */
411 shutdownhook_establish(fxp_shutdown, sc);
412}
413
414/*
415 * Device shutdown routine. Called at system shutdown after sync. The
416 * main purpose of this routine is to shut off receiver DMA so that
417 * kernel memory doesn't get clobbered during warmboot.
418 */
419static void
420fxp_shutdown(sc)
421 void *sc;
422{
423 fxp_stop((struct fxp_softc *) sc);
424}
425
426static int
427fxp_ether_ioctl(ifp, cmd, data)
428 struct ifnet *ifp;
429 FXP_IOCTLCMD_TYPE cmd;
430 caddr_t data;
431{
432 struct ifaddr *ifa = (struct ifaddr *) data;
433 struct fxp_softc *sc = ifp->if_softc;
434
435 switch (cmd) {
436 case SIOCSIFADDR:
437 ifp->if_flags |= IFF_UP;
438
439 switch (ifa->ifa_addr->sa_family) {
440#ifdef INET
441 case AF_INET:
442 fxp_init(sc);
443 arp_ifinit(ifp, ifa);
444 break;
445#endif
446#ifdef NS
447 case AF_NS:
448 {
449 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
450
451 if (ns_nullhost(*ina))
452 ina->x_host = *(union ns_host *)
453 LLADDR(ifp->if_sadl);
454 else
455 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
456 ifp->if_addrlen);
457 /* Set new address. */
458 fxp_init(sc);
459 break;
460 }
461#endif
462 default:
463 fxp_init(sc);
464 break;
465 }
466 break;
467
468 default:
469 return (EINVAL);
470 }
471
472 return (0);
473}
474
475#else /* __FreeBSD__ */
476
477static u_long fxp_count;
478static char *fxp_probe __P((pcici_t, pcidi_t));
479static void fxp_attach __P((pcici_t, int));
480
481static void fxp_shutdown __P((int, void *));
482
483static struct pci_device fxp_device = {
484 "fxp",
485 fxp_probe,
486 fxp_attach,
487 &fxp_count,
488 NULL
489};
490DATA_SET(pcidevice_set, fxp_device);
491
492/*
493 * Return identification string if this is device is ours.
494 */
495static char *
496fxp_probe(config_id, device_id)
497 pcici_t config_id;
498 pcidi_t device_id;
499{
500 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
501 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
502 return ("Intel EtherExpress Pro 10/100B Ethernet");
503
504 return NULL;
505}
506
507static void
508fxp_attach(config_id, unit)
509 pcici_t config_id;
510 int unit;
511{
512 struct fxp_softc *sc;
513 vm_offset_t pbase;
514 struct ifnet *ifp;
515 int s;
516
517 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
518 if (sc == NULL)
519 return;
520 bzero(sc, sizeof(struct fxp_softc));
521 callout_handle_init(&sc->stat_ch);
522
523 s = splimp();
524
525 /*
526 * Map control/status registers.
527 */
528 if (!pci_map_mem(config_id, FXP_PCI_MMBA,
529 (vm_offset_t *)&sc->csr, &pbase)) {
530 printf("fxp%d: couldn't map memory\n", unit);
531 goto fail;
532 }
533
534 /*
535 * Allocate our interrupt.
536 */
537 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
538 printf("fxp%d: couldn't map interrupt\n", unit);
539 goto fail;
540 }
541
542 /* Do generic parts of attach. */
543 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) {
544 /* Failed! */
545 (void) pci_unmap_int(config_id);
546 goto fail;
547 }
548
549 printf("fxp%d: Ethernet address %6D%s\n", unit,
550 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : "");
551
552 ifp = &sc->arpcom.ac_if;
553 ifp->if_unit = unit;
554 ifp->if_name = "fxp";
555 ifp->if_output = ether_output;
556 ifp->if_baudrate = 100000000;
557 ifp->if_init = fxp_init;
558 ifp->if_softc = sc;
559 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
560 ifp->if_ioctl = fxp_ioctl;
561 ifp->if_start = fxp_start;
562 ifp->if_watchdog = fxp_watchdog;
563
564 /*
565 * Attach the interface.
566 */
567 if_attach(ifp);
568 /*
569 * Let the system queue as many packets as we have TX descriptors.
570 */
571 ifp->if_snd.ifq_maxlen = FXP_NTXCB;
572 ether_ifattach(ifp);
573#if NBPFILTER > 0
574 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
575#endif
576
577 /*
578 * Add shutdown hook so that DMA is disabled prior to reboot. Not
579 * doing do could allow DMA to corrupt kernel memory during the
580 * reboot before the driver initializes.
581 */
582 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
583
584 splx(s);
585 return;
586
587 fail:
588 free(sc, M_DEVBUF);
589 splx(s);
590}
591
592/*
593 * Device shutdown routine. Called at system shutdown after sync. The
594 * main purpose of this routine is to shut off receiver DMA so that
595 * kernel memory doesn't get clobbered during warmboot.
596 */
597static void
598fxp_shutdown(howto, sc)
599 int howto;
600 void *sc;
601{
602 fxp_stop((struct fxp_softc *) sc);
603}
604
605#endif /* __NetBSD__ */
606
607/*************************************************************
608 * End of operating system-specific autoconfiguration glue
609 *************************************************************/
610
611/*
612 * Do generic parts of attach.
613 */
614static int
615fxp_attach_common(sc, enaddr)
616 struct fxp_softc *sc;
617 u_int8_t *enaddr;
618{
619 u_int16_t data;
620 int i, nmedia, defmedia;
621 const int *media;
622
623 /*
624 * Reset to a stable state.
625 */
626 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
627 DELAY(10);
628
629 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
630 M_DEVBUF, M_NOWAIT);
631 if (sc->cbl_base == NULL)
632 goto fail;
633
634 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
635 if (sc->fxp_stats == NULL)
636 goto fail;
637 bzero(sc->fxp_stats, sizeof(struct fxp_stats));
638
639 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT);
640 if (sc->mcsp == NULL)
641 goto fail;
642
643 /*
644 * Pre-allocate our receive buffers.
645 */
646 for (i = 0; i < FXP_NRFABUFS; i++) {
647 if (fxp_add_rfabuf(sc, NULL) != 0) {
648 goto fail;
649 }
650 }
651
652 /*
653 * Get info about the primary PHY
654 */
655 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1);
656 sc->phy_primary_addr = data & 0xff;
657 sc->phy_primary_device = (data >> 8) & 0x3f;
658 sc->phy_10Mbps_only = data >> 15;
659
660 /*
661 * Read MAC address.
662 */
663 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3);
664
665 /*
666 * Initialize the media structures.
667 */
668
669 media = fxp_media_default;
670 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]);
671 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA;
672
673 for (i = 0; i < NFXPMEDIA; i++) {
674 if (sc->phy_primary_device == fxp_media[i].fsm_phy) {
675 media = fxp_media[i].fsm_media;
676 nmedia = fxp_media[i].fsm_nmedia;
677 defmedia = fxp_media[i].fsm_defmedia;
678 }
679 }
680
681 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus);
682 for (i = 0; i < nmedia; i++) {
683 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only)
684 continue;
685 ifmedia_add(&sc->sc_media, media[i], 0, NULL);
686 }
687 ifmedia_set(&sc->sc_media, defmedia);
688
689 return (0);
690
691 fail:
692 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc));
693 if (sc->cbl_base)
694 free(sc->cbl_base, M_DEVBUF);
695 if (sc->fxp_stats)
696 free(sc->fxp_stats, M_DEVBUF);
697 if (sc->mcsp)
698 free(sc->mcsp, M_DEVBUF);
699 /* frees entire chain */
700 if (sc->rfa_headm)
701 m_freem(sc->rfa_headm);
702
703 return (ENOMEM);
704}
705
706/*
707 * Read from the serial EEPROM. Basically, you manually shift in
708 * the read opcode (one bit at a time) and then shift in the address,
709 * and then you shift out the data (all of this one bit at a time).
710 * The word size is 16 bits, so you have to provide the address for
711 * every 16 bits of data.
712 */
713static void
714fxp_read_eeprom(sc, data, offset, words)
715 struct fxp_softc *sc;
716 u_short *data;
717 int offset;
718 int words;
719{
720 u_int16_t reg;
721 int i, x;
722
723 for (i = 0; i < words; i++) {
724 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
725 /*
726 * Shift in read opcode.
727 */
728 for (x = 3; x > 0; x--) {
729 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
730 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
731 } else {
732 reg = FXP_EEPROM_EECS;
733 }
734 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
735 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
736 reg | FXP_EEPROM_EESK);
737 DELAY(1);
738 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
739 DELAY(1);
740 }
741 /*
742 * Shift in address.
743 */
744 for (x = 6; x > 0; x--) {
745 if ((i + offset) & (1 << (x - 1))) {
746 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
747 } else {
748 reg = FXP_EEPROM_EECS;
749 }
750 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
751 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
752 reg | FXP_EEPROM_EESK);
753 DELAY(1);
754 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
755 DELAY(1);
756 }
757 reg = FXP_EEPROM_EECS;
758 data[i] = 0;
759 /*
760 * Shift out data.
761 */
762 for (x = 16; x > 0; x--) {
763 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
764 reg | FXP_EEPROM_EESK);
765 DELAY(1);
766 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
767 FXP_EEPROM_EEDO)
768 data[i] |= (1 << (x - 1));
769 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
770 DELAY(1);
771 }
772 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
773 DELAY(1);
774 }
775}
776
777/*
778 * Start packet transmission on the interface.
779 */
780static void
781fxp_start(ifp)
782 struct ifnet *ifp;
783{
784 struct fxp_softc *sc = ifp->if_softc;
785 struct fxp_cb_tx *txp;
786
787 /*
788 * See if we need to suspend xmit until the multicast filter
789 * has been reprogrammed (which can only be done at the head
790 * of the command chain).
791 */
792 if (sc->need_mcsetup)
793 return;
794
795 txp = NULL;
796
797 /*
798 * We're finished if there is nothing more to add to the list or if
799 * we're all filled up with buffers to transmit.
800 */
801 while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB) {
802 struct mbuf *m, *mb_head;
803 int segment;
804
805 /*
806 * Grab a packet to transmit.
807 */
808 IF_DEQUEUE(&ifp->if_snd, mb_head);
809
810 /*
811 * Get pointer to next available tx desc.
812 */
813 txp = sc->cbl_last->next;
814
815 /*
816 * Go through each of the mbufs in the chain and initialize
817 * the transmit buffer descriptors with the physical address
818 * and size of the mbuf.
819 */
820tbdinit:
821 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
822 if (m->m_len != 0) {
823 if (segment == FXP_NTXSEG)
824 break;
825 txp->tbd[segment].tb_addr =
826 vtophys(mtod(m, vm_offset_t));
827 txp->tbd[segment].tb_size = m->m_len;
828 segment++;
829 }
830 }
831 if (m != NULL) {
832 struct mbuf *mn;
833
834 /*
835 * We ran out of segments. We have to recopy this mbuf
836 * chain first. Bail out if we can't get the new buffers.
837 */
838 MGETHDR(mn, M_DONTWAIT, MT_DATA);
839 if (mn == NULL) {
840 m_freem(mb_head);
841 break;
842 }
843 if (mb_head->m_pkthdr.len > MHLEN) {
844 MCLGET(mn, M_DONTWAIT);
845 if ((mn->m_flags & M_EXT) == 0) {
846 m_freem(mn);
847 m_freem(mb_head);
848 break;
849 }
850 }
851 m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
852 mtod(mn, caddr_t));
853 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
854 m_freem(mb_head);
855 mb_head = mn;
856 goto tbdinit;
857 }
858
859 txp->tbd_number = segment;
860 txp->mb_head = mb_head;
861 txp->cb_status = 0;
862 txp->cb_command =
863 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
864 txp->tx_threshold = tx_threshold;
865
866 /*
867 * Advance the end of list forward.
868 */
869 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
870 sc->cbl_last = txp;
871
872 /*
873 * Advance the beginning of the list forward if there are
874 * no other packets queued (when nothing is queued, cbl_first
875 * sits on the last TxCB that was sent out).
876 */
877 if (sc->tx_queued == 0)
878 sc->cbl_first = txp;
879
880 sc->tx_queued++;
881
882#if NBPFILTER > 0
883 /*
884 * Pass packet to bpf if there is a listener.
885 */
886 if (ifp->if_bpf)
887 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head);
888#endif
889 }
890
891 /*
892 * We're finished. If we added to the list, issue a RESUME to get DMA
893 * going again if suspended.
894 */
895 if (txp != NULL) {
896 fxp_scb_wait(sc);
897 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME);
898
899 /*
900 * Set a 5 second timer just in case we don't hear from the
901 * card again.
902 */
903 ifp->if_timer = 5;
904 }
905}
906
907/*
908 * Process interface interrupts.
909 */
910static FXP_INTR_TYPE
911fxp_intr(arg)
912 void *arg;
913{
914 struct fxp_softc *sc = arg;
915 struct ifnet *ifp = &sc->sc_if;
916 u_int8_t statack;
917#if defined(__NetBSD__)
918 int claimed = 0;
919#endif
920
921 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
922#if defined(__NetBSD__)
923 claimed = 1;
924#endif
925 /*
926 * First ACK all the interrupts in this pass.
927 */
928 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
929
930 /*
931 * Process receiver interrupts. If a no-resource (RNR)
932 * condition exists, get whatever packets we can and
933 * re-start the receiver.
934 */
935 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
936 struct mbuf *m;
937 struct fxp_rfa *rfa;
938rcvloop:
939 m = sc->rfa_headm;
940 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
941 RFA_ALIGNMENT_FUDGE);
942
943 if (rfa->rfa_status & FXP_RFA_STATUS_C) {
944 /*
945 * Remove first packet from the chain.
946 */
947 sc->rfa_headm = m->m_next;
948 m->m_next = NULL;
949
950 /*
951 * Add a new buffer to the receive chain.
952 * If this fails, the old buffer is recycled
953 * instead.
954 */
955 if (fxp_add_rfabuf(sc, m) == 0) {
956 struct ether_header *eh;
957 u_int16_t total_len;
958
959 total_len = rfa->actual_size &
960 (MCLBYTES - 1);
961 if (total_len <
962 sizeof(struct ether_header)) {
963 m_freem(m);
964 goto rcvloop;
965 }
966 m->m_pkthdr.rcvif = ifp;
967 m->m_pkthdr.len = m->m_len =
968 total_len -
969 sizeof(struct ether_header);
970 eh = mtod(m, struct ether_header *);
971#if NBPFILTER > 0
972 if (ifp->if_bpf) {
973 bpf_tap(FXP_BPFTAP_ARG(ifp),
974 mtod(m, caddr_t),
975 total_len);
976 /*
977 * Only pass this packet up
978 * if it is for us.
979 */
980 if ((ifp->if_flags &
981 IFF_PROMISC) &&
982 (rfa->rfa_status &
983 FXP_RFA_STATUS_IAMATCH) &&
984 (eh->ether_dhost[0] & 1)
985 == 0) {
986 m_freem(m);
987 goto rcvloop;
988 }
989 }
990#endif /* NBPFILTER > 0 */
991 m->m_data +=
992 sizeof(struct ether_header);
993 ether_input(ifp, eh, m);
994 }
995 goto rcvloop;
996 }
997 if (statack & FXP_SCB_STATACK_RNR) {
998 fxp_scb_wait(sc);
999 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1000 vtophys(sc->rfa_headm->m_ext.ext_buf) +
1001 RFA_ALIGNMENT_FUDGE);
1002 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
1003 FXP_SCB_COMMAND_RU_START);
1004 }
1005 }
1006 /*
1007 * Free any finished transmit mbuf chains.
1008 */
1009 if (statack & FXP_SCB_STATACK_CNA) {
1010 struct fxp_cb_tx *txp;
1011
1012 for (txp = sc->cbl_first; sc->tx_queued &&
1013 (txp->cb_status & FXP_CB_STATUS_C) != 0;
1014 txp = txp->next) {
1015 if (txp->mb_head != NULL) {
1016 m_freem(txp->mb_head);
1017 txp->mb_head = NULL;
1018 }
1019 sc->tx_queued--;
1020 }
1021 sc->cbl_first = txp;
1022 if (sc->tx_queued == 0) {
1023 ifp->if_timer = 0;
1024 if (sc->need_mcsetup)
1025 fxp_mc_setup(sc);
1026 }
1027 /*
1028 * Try to start more packets transmitting.
1029 */
1030 if (ifp->if_snd.ifq_head != NULL)
1031 fxp_start(ifp);
1032 }
1033 }
1034#if defined(__NetBSD__)
1035 return (claimed);
1036#endif
1037}
1038
1039/*
1040 * Update packet in/out/collision statistics. The i82557 doesn't
1041 * allow you to access these counters without doing a fairly
1042 * expensive DMA to get _all_ of the statistics it maintains, so
1043 * we do this operation here only once per second. The statistics
1044 * counters in the kernel are updated from the previous dump-stats
1045 * DMA and then a new dump-stats DMA is started. The on-chip
1046 * counters are zeroed when the DMA completes. If we can't start
1047 * the DMA immediately, we don't wait - we just prepare to read
1048 * them again next time.
1049 */
1050static void
1051fxp_stats_update(arg)
1052 void *arg;
1053{
1054 struct fxp_softc *sc = arg;
1055 struct ifnet *ifp = &sc->sc_if;
1056 struct fxp_stats *sp = sc->fxp_stats;
1057 int s;
1058
1059 ifp->if_opackets += sp->tx_good;
1060 ifp->if_collisions += sp->tx_total_collisions;
1061 if (sp->rx_good) {
1062 ifp->if_ipackets += sp->rx_good;
1063 sc->rx_idle_secs = 0;
1064 } else {
1065 sc->rx_idle_secs++;
1066 }
1067 ifp->if_ierrors +=
1068 sp->rx_crc_errors +
1069 sp->rx_alignment_errors +
1070 sp->rx_rnr_errors +
1071 sp->rx_overrun_errors;
1072 /*
1073 * If any transmit underruns occured, bump up the transmit
1074 * threshold by another 512 bytes (64 * 8).
1075 */
1076 if (sp->tx_underruns) {
1077 ifp->if_oerrors += sp->tx_underruns;
1078 if (tx_threshold < 192)
1079 tx_threshold += 64;
1080 }
1081 s = splimp();
1082 /*
1083 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds,
1084 * then assume the receiver has locked up and attempt to clear
1085 * the condition by reprogramming the multicast filter. This is
1086 * a work-around for a bug in the 82557 where the receiver locks
1087 * up if it gets certain types of garbage in the syncronization
1088 * bits prior to the packet header. This bug is supposed to only
1089 * occur in 10Mbps mode, but has been seen to occur in 100Mbps
1090 * mode as well (perhaps due to a 10/100 speed transition).
1091 */
1092 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) {
1093 sc->rx_idle_secs = 0;
1094 fxp_mc_setup(sc);
1095 }
1096 /*
1097 * If there is no pending command, start another stats
1098 * dump. Otherwise punt for now.
1099 */
1100 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) {
1101 /*
1102 * Start another stats dump.
1103 */
1104 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
1105 FXP_SCB_COMMAND_CU_DUMPRESET);
1106 } else {
1107 /*
1108 * A previous command is still waiting to be accepted.
1109 * Just zero our copy of the stats and wait for the
1110 * next timer event to update them.
1111 */
1112 sp->tx_good = 0;
1113 sp->tx_underruns = 0;
1114 sp->tx_total_collisions = 0;
1115
1116 sp->rx_good = 0;
1117 sp->rx_crc_errors = 0;
1118 sp->rx_alignment_errors = 0;
1119 sp->rx_rnr_errors = 0;
1120 sp->rx_overrun_errors = 0;
1121 }
1122 splx(s);
1123 /*
1124 * Schedule another timeout one second from now.
1125 */
1126 sc->stat_ch = timeout(fxp_stats_update, sc, hz);
1127}
1128
1129/*
1130 * Stop the interface. Cancels the statistics updater and resets
1131 * the interface.
1132 */
1133static void
1134fxp_stop(sc)
1135 struct fxp_softc *sc;
1136{
1137 struct ifnet *ifp = &sc->sc_if;
1138 struct fxp_cb_tx *txp;
1139 int i;
1140
1141 /*
1142 * Cancel stats updater.
1143 */
1144 untimeout(fxp_stats_update, sc, sc->stat_ch);
1145
1146 /*
1147 * Issue software reset
1148 */
1149 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
1150 DELAY(10);
1151
1152 /*
1153 * Release any xmit buffers.
1154 */
1155 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
1156 txp = txp->next) {
1157 m_freem(txp->mb_head);
1158 txp->mb_head = NULL;
1159 }
1160 sc->tx_queued = 0;
1161
1162 /*
1163 * Free all the receive buffers then reallocate/reinitialize
1164 */
1165 if (sc->rfa_headm != NULL)
1166 m_freem(sc->rfa_headm);
1167 sc->rfa_headm = NULL;
1168 sc->rfa_tailm = NULL;
1169 for (i = 0; i < FXP_NRFABUFS; i++) {
1170 if (fxp_add_rfabuf(sc, NULL) != 0) {
1171 /*
1172 * This "can't happen" - we're at splimp()
1173 * and we just freed all the buffers we need
1174 * above.
1175 */
1176 panic("fxp_stop: no buffers!");
1177 }
1178 }
1179
1180 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1181 ifp->if_timer = 0;
1182}
1183
1184/*
1185 * Watchdog/transmission transmit timeout handler. Called when a
1186 * transmission is started on the interface, but no interrupt is
1187 * received before the timeout. This usually indicates that the
1188 * card has wedged for some reason.
1189 */
1190static void
1191fxp_watchdog(ifp)
1192 struct ifnet *ifp;
1193{
1194 struct fxp_softc *sc = ifp->if_softc;
1195
1196 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc));
1197 ifp->if_oerrors++;
1198
1199 fxp_init(sc);
1200}
1201
1202static void
1203fxp_init(xsc)
1204 void *xsc;
1205{
1206 struct fxp_softc *sc = xsc;
1207 struct ifnet *ifp = &sc->sc_if;
1208 struct fxp_cb_config *cbp;
1209 struct fxp_cb_ias *cb_ias;
1210 struct fxp_cb_tx *txp;
1211 int i, s, prm;
1212
1213 s = splimp();
1214 /*
1215 * Cancel any pending I/O
1216 */
1217 fxp_stop(sc);
1218
1219 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
1220 sc->promisc_mode = prm;
1221
1222 /*
1223 * Initialize base of CBL and RFA memory. Loading with zero
1224 * sets it up for regular linear addressing.
1225 */
1226 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
1227 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE);
1228
1229 fxp_scb_wait(sc);
1230 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE);
1231
1232 /*
1233 * Initialize base of dump-stats buffer.
1234 */
1235 fxp_scb_wait(sc);
1236 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats));
1237 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR);
1238
1239 /*
1240 * We temporarily use memory that contains the TxCB list to
1241 * construct the config CB. The TxCB list memory is rebuilt
1242 * later.
1243 */
1244 cbp = (struct fxp_cb_config *) sc->cbl_base;
1245
1246 /*
1247 * This bcopy is kind of disgusting, but there are a bunch of must be
1248 * zero and must be one bits in this structure and this is the easiest
1249 * way to initialize them all to proper values.
1250 */
1251 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status,
1252 sizeof(fxp_cb_config_template));
1253
1254 cbp->cb_status = 0;
1255 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
1256 cbp->link_addr = -1; /* (no) next command */
1257 cbp->byte_count = 22; /* (22) bytes to config */
1258 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */
1259 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */
1260 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
1261 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
1262 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
1263 cbp->dma_bce = 0; /* (disable) dma max counters */
1264 cbp->late_scb = 0; /* (don't) defer SCB update */
1265 cbp->tno_int = 0; /* (disable) tx not okay interrupt */
1266 cbp->ci_int = 0; /* interrupt on CU not active */
1267 cbp->save_bf = prm; /* save bad frames */
1268 cbp->disc_short_rx = !prm; /* discard short packets */
1269 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
1270 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
1271 cbp->nsai = 1; /* (don't) disable source addr insert */
1272 cbp->preamble_length = 2; /* (7 byte) preamble */
1273 cbp->loopback = 0; /* (don't) loopback */
1274 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
1275 cbp->linear_pri_mode = 0; /* (wait after xmit only) */
1276 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
1277 cbp->promiscuous = prm; /* promiscuous mode */
1278 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
1279 cbp->crscdt = 0; /* (CRS only) */
1280 cbp->stripping = !prm; /* truncate rx packet to byte count */
1281 cbp->padding = 1; /* (do) pad short tx packets */
1282 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
1283 cbp->force_fdx = 0; /* (don't) force full duplex */
1284 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
1285 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
1286 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */
1287
1288 /*
1289 * Start the config command/DMA.
1290 */
1291 fxp_scb_wait(sc);
1292 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1293 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1294 /* ...and wait for it to complete. */
1295 while (!(cbp->cb_status & FXP_CB_STATUS_C));
1296
1297 /*
1298 * Now initialize the station address. Temporarily use the TxCB
1299 * memory area like we did above for the config CB.
1300 */
1301 cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
1302 cb_ias->cb_status = 0;
1303 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
1304 cb_ias->link_addr = -1;
1305#if defined(__NetBSD__)
1306 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6);
1307#else
1308 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
1309 sizeof(sc->arpcom.ac_enaddr));
1310#endif /* __NetBSD__ */
1311
1312 /*
1313 * Start the IAS (Individual Address Setup) command/DMA.
1314 */
1315 fxp_scb_wait(sc);
1316 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1317 /* ...and wait for it to complete. */
1318 while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
1319
1320 /*
1321 * Initialize transmit control block (TxCB) list.
1322 */
1323
1324 txp = sc->cbl_base;
1325 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1326 for (i = 0; i < FXP_NTXCB; i++) {
1327 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1328 txp[i].cb_command = FXP_CB_COMMAND_NOP;
1329 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1330 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1331 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1332 }
1333 /*
1334 * Set the suspend flag on the first TxCB and start the control
1335 * unit. It will execute the NOP and then suspend.
1336 */
1337 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1338 sc->cbl_first = sc->cbl_last = txp;
1339 sc->tx_queued = 1;
1340
1341 fxp_scb_wait(sc);
1342 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1343
1344 /*
1345 * Initialize receiver buffer area - RFA.
1346 */
1347 fxp_scb_wait(sc);
1348 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1349 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE);
1350 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START);
1351
1352 /*
1353 * Set current media.
1354 */
1355 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
1356
1357 ifp->if_flags |= IFF_RUNNING;
1358 ifp->if_flags &= ~IFF_OACTIVE;
1359 splx(s);
1360
1361 /*
1362 * Start stats updater.
1363 */
1364 sc->stat_ch = timeout(fxp_stats_update, sc, hz);
1365}
1366
1367static void
1368fxp_set_media(sc, media)
1369 struct fxp_softc *sc;
1370 int media;
1371{
1372
1373 switch (sc->phy_primary_device) {
1374 case FXP_PHY_DP83840:
1375 case FXP_PHY_DP83840A:
1376 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR,
1377 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) |
1378 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */
1379 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */
1380 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */
1381 /* fall through */
1382 case FXP_PHY_82553A:
1383 case FXP_PHY_82553C: /* untested */
1384 case FXP_PHY_82555:
1385 case FXP_PHY_82555B:
1386 if (IFM_SUBTYPE(media) != IFM_AUTO) {
1387 int flags;
1388
1389 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ?
1390 FXP_PHY_BMCR_SPEED_100M : 0;
1391 flags |= (media & IFM_FDX) ?
1392 FXP_PHY_BMCR_FULLDUPLEX : 0;
1393 fxp_mdi_write(sc, sc->phy_primary_addr,
1394 FXP_PHY_BMCR,
1395 (fxp_mdi_read(sc, sc->phy_primary_addr,
1396 FXP_PHY_BMCR) &
1397 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
1398 FXP_PHY_BMCR_FULLDUPLEX)) | flags);
1399 } else {
1400 fxp_mdi_write(sc, sc->phy_primary_addr,
1401 FXP_PHY_BMCR,
1402 (fxp_mdi_read(sc, sc->phy_primary_addr,
1403 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN));
1404 }
1405 break;
1406 /*
1407 * The Seeq 80c24 doesn't have a PHY programming interface, so do
1408 * nothing.
1409 */
1410 case FXP_PHY_80C24:
1411 break;
1412 default:
1413 printf(FXP_FORMAT
1414 ": warning: unsupported PHY, type = %d, addr = %d\n",
1415 FXP_ARGS(sc), sc->phy_primary_device,
1416 sc->phy_primary_addr);
1417 }
1418}
1419
1420/*
1421 * Change media according to request.
1422 */
1423int
1424fxp_mediachange(ifp)
1425 struct ifnet *ifp;
1426{
1427 struct fxp_softc *sc = ifp->if_softc;
1428 struct ifmedia *ifm = &sc->sc_media;
1429
1430 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1431 return (EINVAL);
1432
1433 fxp_set_media(sc, ifm->ifm_media);
1434 return (0);
1435}
1436
1437/*
1438 * Notify the world which media we're using.
1439 */
1440void
1441fxp_mediastatus(ifp, ifmr)
1442 struct ifnet *ifp;
1443 struct ifmediareq *ifmr;
1444{
1445 struct fxp_softc *sc = ifp->if_softc;
1446 int flags;
1447
1448 switch (sc->phy_primary_device) {
1449 case FXP_PHY_DP83840:
1450 case FXP_PHY_DP83840A:
1451 case FXP_PHY_82555:
1452 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR);
1453 ifmr->ifm_active = IFM_ETHER;
1454 if (flags & FXP_PHY_BMCR_AUTOEN)
1455 ifmr->ifm_active |= IFM_AUTO;
1456 else {
1457 if (flags & FXP_PHY_BMCR_SPEED_100M)
1458 ifmr->ifm_active |= IFM_100_TX;
1459 else
1460 ifmr->ifm_active |= IFM_10_T;
1461
1462 if (flags & FXP_PHY_BMCR_FULLDUPLEX)
1463 ifmr->ifm_active |= IFM_FDX;
1464 }
1465 break;
1466
1467 case FXP_PHY_80C24:
1468 default:
1469 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */
1470 }
1471}
1472
1473/*
1474 * Add a buffer to the end of the RFA buffer list.
1475 * Return 0 if successful, 1 for failure. A failure results in
1476 * adding the 'oldm' (if non-NULL) on to the end of the list -
|