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if_ffec.c (256806) if_ffec.c (259317)
1/*-
2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/ffec/if_ffec.c 256806 2013-10-20 21:07:38Z ian $");
29__FBSDID("$FreeBSD: stable/10/sys/dev/ffec/if_ffec.c 259317 2013-12-13 17:28:08Z ian $");
30
31/*
32 * Driver for Freescale Fast Ethernet Controller, found on imx-series SoCs among
33 * others. Also works for the ENET Gigibit controller found on imx6 and imx28,
34 * but the driver doesn't currently use any of the ENET advanced features other
35 * than enabling gigabit.
36 *
37 * The interface name 'fec' is already taken by netgraph's Fast Etherchannel

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81#include <dev/ffec/if_ffecreg.h>
82#include <dev/ofw/ofw_bus.h>
83#include <dev/ofw/ofw_bus_subr.h>
84#include <dev/mii/mii.h>
85#include <dev/mii/miivar.h>
86#include "miibus_if.h"
87
88/*
30
31/*
32 * Driver for Freescale Fast Ethernet Controller, found on imx-series SoCs among
33 * others. Also works for the ENET Gigibit controller found on imx6 and imx28,
34 * but the driver doesn't currently use any of the ENET advanced features other
35 * than enabling gigabit.
36 *
37 * The interface name 'fec' is already taken by netgraph's Fast Etherchannel

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81#include <dev/ffec/if_ffecreg.h>
82#include <dev/ofw/ofw_bus.h>
83#include <dev/ofw/ofw_bus_subr.h>
84#include <dev/mii/mii.h>
85#include <dev/mii/miivar.h>
86#include "miibus_if.h"
87
88/*
89 * There are small differences in the hardware on various SoCs. Not every SoC
90 * we support has its own FECTYPE; most work as GENERIC and only the ones that
91 * need different handling get their own entry. In addition to the types in
92 * this list, there are some flags below that can be ORed into the upper bits.
93 */
94enum {
95 FECTYPE_NONE,
96 FECTYPE_GENERIC,
97 FECTYPE_IMX53,
98 FECTYPE_IMX6,
99};
100
101/*
102 * Flags that describe general differences between the FEC hardware in various
103 * SoCs. These are ORed into the FECTYPE enum values.
104 */
105#define FECTYPE_MASK 0x0000ffff
106#define FECFLAG_GBE (0x0001 << 16)
107
108/*
109 * Table of supported FDT compat strings and their associated FECTYPE values.
110 */
111static struct ofw_compat_data compat_data[] = {
112 {"fsl,imx51-fec", FECTYPE_GENERIC},
113 {"fsl,imx53-fec", FECTYPE_IMX53},
114 {"fsl,imx6q-fec", FECTYPE_IMX6 | FECFLAG_GBE},
115 {"fsl,mvf600-fec", FECTYPE_GENERIC},
116 {"fsl,vf-fec", FECTYPE_GENERIC},
117 {NULL, FECTYPE_NONE},
118};
119
120/*
89 * Driver data and defines.
90 */
91#define RX_DESC_COUNT 64
92#define RX_DESC_SIZE (sizeof(struct ffec_hwdesc) * RX_DESC_COUNT)
93#define TX_DESC_COUNT 64
94#define TX_DESC_SIZE (sizeof(struct ffec_hwdesc) * TX_DESC_COUNT)
95
96#define WATCHDOG_TIMEOUT_SECS 5

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103
104enum {
105 PHY_CONN_UNKNOWN,
106 PHY_CONN_MII,
107 PHY_CONN_RMII,
108 PHY_CONN_RGMII
109};
110
121 * Driver data and defines.
122 */
123#define RX_DESC_COUNT 64
124#define RX_DESC_SIZE (sizeof(struct ffec_hwdesc) * RX_DESC_COUNT)
125#define TX_DESC_COUNT 64
126#define TX_DESC_SIZE (sizeof(struct ffec_hwdesc) * TX_DESC_COUNT)
127
128#define WATCHDOG_TIMEOUT_SECS 5

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135
136enum {
137 PHY_CONN_UNKNOWN,
138 PHY_CONN_MII,
139 PHY_CONN_RMII,
140 PHY_CONN_RGMII
141};
142
111enum {
112 FECTYPE_GENERIC,
113 FECTYPE_IMX51,
114 FECTYPE_IMX53,
115 FECTYPE_IMX6,
116};
117
118struct ffec_softc {
119 device_t dev;
120 device_t miibus;
121 struct mii_data * mii_softc;
122 struct ifnet *ifp;
123 int if_flags;
124 struct mtx mtx;
125 struct resource *irq_res;

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221ffec_miigasket_setup(struct ffec_softc *sc)
222{
223 uint32_t ifmode;
224
225 /*
226 * We only need the gasket for MII and RMII connections on certain SoCs.
227 */
228
143struct ffec_softc {
144 device_t dev;
145 device_t miibus;
146 struct mii_data * mii_softc;
147 struct ifnet *ifp;
148 int if_flags;
149 struct mtx mtx;
150 struct resource *irq_res;

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246ffec_miigasket_setup(struct ffec_softc *sc)
247{
248 uint32_t ifmode;
249
250 /*
251 * We only need the gasket for MII and RMII connections on certain SoCs.
252 */
253
229 switch (sc->fectype)
254 switch (sc->fectype & FECTYPE_MASK)
230 {
231 case FECTYPE_IMX53:
232 break;
233 default:
234 return;
235 }
236
237 switch (sc->phy_conn_type)

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878 * something non-zero there, assume the bootloader did the right thing
879 * and just use it.
880 *
881 * Otherwise, set the address to a convenient locally assigned address,
882 * 'bsd' + random 24 low-order bits. 'b' is 0x62, which has the locally
883 * assigned bit set, and the broadcast/multicast bit clear.
884 */
885 palr = RD4(sc, FEC_PALR_REG);
255 {
256 case FECTYPE_IMX53:
257 break;
258 default:
259 return;
260 }
261
262 switch (sc->phy_conn_type)

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903 * something non-zero there, assume the bootloader did the right thing
904 * and just use it.
905 *
906 * Otherwise, set the address to a convenient locally assigned address,
907 * 'bsd' + random 24 low-order bits. 'b' is 0x62, which has the locally
908 * assigned bit set, and the broadcast/multicast bit clear.
909 */
910 palr = RD4(sc, FEC_PALR_REG);
886 paur = RD4(sc, FEC_PAUR_REG);
911 paur = RD4(sc, FEC_PAUR_REG) & FEC_PAUR_PADDR2_MASK;
887 if ((palr | paur) != 0) {
888 hwaddr[0] = palr >> 24;
889 hwaddr[1] = palr >> 16;
890 hwaddr[2] = palr >> 8;
891 hwaddr[3] = palr >> 0;
892 hwaddr[4] = paur >> 24;
893 hwaddr[5] = paur >> 16;
912 if ((palr | paur) != 0) {
913 hwaddr[0] = palr >> 24;
914 hwaddr[1] = palr >> 16;
915 hwaddr[2] = palr >> 8;
916 hwaddr[3] = palr >> 0;
917 hwaddr[4] = paur >> 24;
918 hwaddr[5] = paur >> 16;
894 return;
895 } else {
896 rnd = arc4random() & 0x00ffffff;
897 hwaddr[0] = 'b';
898 hwaddr[1] = 's';
899 hwaddr[2] = 'd';
900 hwaddr[3] = rnd >> 16;
901 hwaddr[4] = rnd >> 8;
902 hwaddr[5] = rnd >> 0;

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1400 sc->dev = dev;
1401
1402 FFEC_LOCK_INIT(sc);
1403
1404 /*
1405 * There are differences in the implementation and features of the FEC
1406 * hardware on different SoCs, so figure out what type we are.
1407 */
919 } else {
920 rnd = arc4random() & 0x00ffffff;
921 hwaddr[0] = 'b';
922 hwaddr[1] = 's';
923 hwaddr[2] = 'd';
924 hwaddr[3] = rnd >> 16;
925 hwaddr[4] = rnd >> 8;
926 hwaddr[5] = rnd >> 0;

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1424 sc->dev = dev;
1425
1426 FFEC_LOCK_INIT(sc);
1427
1428 /*
1429 * There are differences in the implementation and features of the FEC
1430 * hardware on different SoCs, so figure out what type we are.
1431 */
1408 if (ofw_bus_is_compatible(dev, "fsl,imx51-fec"))
1409 sc->fectype = FECTYPE_IMX51;
1410 else if (ofw_bus_is_compatible(dev, "fsl,imx53-fec"))
1411 sc->fectype = FECTYPE_IMX53;
1412 else if (ofw_bus_is_compatible(dev, "fsl,imx6q-fec"))
1413 sc->fectype = FECTYPE_IMX6;
1414 else
1415 sc->fectype = FECTYPE_GENERIC;
1432 sc->fectype = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1416
1417 /*
1418 * We have to be told what kind of electrical connection exists between
1419 * the MAC and PHY or we can't operate correctly.
1420 */
1421 if ((ofw_node = ofw_bus_get_node(dev)) == -1) {
1422 device_printf(dev, "Impossible: Can't find ofw bus node\n");
1423 error = ENXIO;

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1687 ffec_detach(dev);
1688
1689 return (error);
1690}
1691
1692static int
1693ffec_probe(device_t dev)
1694{
1433
1434 /*
1435 * We have to be told what kind of electrical connection exists between
1436 * the MAC and PHY or we can't operate correctly.
1437 */
1438 if ((ofw_node = ofw_bus_get_node(dev)) == -1) {
1439 device_printf(dev, "Impossible: Can't find ofw bus node\n");
1440 error = ENXIO;

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1704 ffec_detach(dev);
1705
1706 return (error);
1707}
1708
1709static int
1710ffec_probe(device_t dev)
1711{
1712 uintptr_t fectype;
1695
1713
1696 if (ofw_bus_is_compatible(dev, "fsl,imx51-fec") ||
1697 ofw_bus_is_compatible(dev, "fsl,imx53-fec")) {
1698 device_set_desc(dev, "Freescale Fast Ethernet Controller");
1699 } else if (ofw_bus_is_compatible(dev, "fsl,imx6q-fec")) {
1700 device_set_desc(dev, "Freescale Gigabit Ethernet Controller");
1701 } else {
1714 fectype = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1715 if (fectype == FECTYPE_NONE)
1702 return (ENXIO);
1716 return (ENXIO);
1703 }
1717
1718 device_set_desc(dev, (fectype & FECFLAG_GBE) ?
1719 "Freescale Gigabit Ethernet Controller" :
1720 "Freescale Fast Ethernet Controller");
1721
1704 return (BUS_PROBE_DEFAULT);
1705}
1706
1707
1708static device_method_t ffec_methods[] = {
1709 /* Device interface. */
1710 DEVMETHOD(device_probe, ffec_probe),
1711 DEVMETHOD(device_attach, ffec_attach),

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1722 return (BUS_PROBE_DEFAULT);
1723}
1724
1725
1726static device_method_t ffec_methods[] = {
1727 /* Device interface. */
1728 DEVMETHOD(device_probe, ffec_probe),
1729 DEVMETHOD(device_attach, ffec_attach),

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