1/* $NetBSD: ncr53c9xvar.h,v 1.46 2005/02/04 02:10:36 perry Exp $ */
2
3/*-
4 * Copyright (c) 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
--- 52 unchanged lines hidden (view full) ---
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69/* $FreeBSD: head/sys/dev/esp/ncr53c9xvar.h 180692 2008-07-22 13:51:21Z marius $ */
70
71#ifndef _DEV_IC_NCR53C9XVAR_H_
72#define _DEV_IC_NCR53C9XVAR_H_
73
74#include <sys/lock.h>
75
76/* Set this to 1 for normal debug, or 2 for per-target tracing. */
77/* #define NCR53C9X_DEBUG 2 */
--- 27 unchanged lines hidden (view full) ---
105
106/* XXX Max tag depth. Should this be defined in the register header? */
107#define NCR_TAG_DEPTH 256
108
109/*
110 * ECB. Holds additional information for each SCSI command Comments: We
111 * need a separate scsi command block because we may need to overwrite it
112 * with a request sense command. Basicly, we refrain from fiddling with
113 * the scsipi_xfer struct (except do the expected updating of return values).
114 * We'll generally update: xs->{flags,resid,error,sense,status} and
115 * occasionally xs->retries.
116 */
117struct ncr53c9x_ecb {
118 /* These fields are preserved between alloc and free */
119 struct ncr53c9x_softc *sc;
120 int tag_id;
121 int flags;
122
123 union ccb *ccb; /* SCSI xfer ctrl block from above */
124 TAILQ_ENTRY(ncr53c9x_ecb) free_links;
125 TAILQ_ENTRY(ncr53c9x_ecb) chain;
126#define ECB_ALLOC 0x01
127#define ECB_READY 0x02
128#define ECB_SENSE 0x04
129#define ECB_ABORT 0x40
130#define ECB_RESET 0x80
131#define ECB_TENTATIVE_DONE 0x100
132 int timeout;
133
134 struct {
135 u_char msg[3]; /* Selection Id msg and tags */
136 struct scsi_generic cmd; /* SCSI command block */
137 } cmd;
138 char *daddr; /* Saved data pointer */
139 int clen; /* Size of command in cmd.cmd */
140 int dleft; /* Residue */
--- 34 unchanged lines hidden (view full) ---
175 time_t last_used;
176 u_char used; /* # slots in use */
177 u_char avail; /* where to start scanning */
178 u_char busy;
179 struct ncr53c9x_ecb *untagged;
180 struct ncr53c9x_ecb *queued[NCR_TAG_DEPTH];
181};
182
183struct ncr53c9x_tinfo {
184 int cmds; /* # of commands processed */
185 int dconns; /* # of disconnects */
186 int touts; /* # of timeouts */
187 int perrs; /* # of parity errors */
188 int senses; /* # of request sense commands sent */
189 u_char flags;
190#define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */
191#define T_SYNCMODE 0x08 /* SYNC mode has been negotiated */
192#define T_SYNCHOFF 0x10 /* SYNC mode for is permanently off */
193#define T_RSELECTOFF 0x20 /* RE-SELECT mode is off */
194#define T_TAG 0x40 /* Turn on TAG QUEUEs */
195#define T_WIDE 0x80 /* Negotiate wide options */
196#define T_WDTRSENT 0x04 /* WDTR message has been sent to */
197 u_char period; /* Period suggestion */
198 u_char offset; /* Offset suggestion */
199 u_char cfg3; /* per target config 3 */
200 u_char nextag; /* Next available tag */
201 u_char width; /* width suggesion */
202 LIST_HEAD(lun_list, ncr53c9x_linfo) luns;
203 struct ncr53c9x_linfo *lun[NCR_NLUN]; /* For speedy lookups */
204};
205
206/* Look up a lun in a tinfo */
207#define TINFO_LUN(t, l) ( \
208 (((l) < NCR_NLUN) && (((t)->lun[(l)]) != NULL)) \
209 ? ((t)->lun[(l)]) \
--- 137 unchanged lines hidden (view full) ---
347
348 /* Hardware attributes */
349 int sc_freq; /* SCSI bus frequency in MHz */
350 int sc_id; /* Our SCSI id */
351 int sc_rev; /* Chip revision */
352 int sc_features; /* Chip features */
353 int sc_minsync; /* Minimum sync period / 4 */
354 int sc_maxxfer; /* Maximum transfer size */
355 int sc_maxsync; /* Maximum sync period */
356 int sc_maxoffset; /* Maximum offset */
357 int sc_maxwidth; /* Maximum width */
358 int sc_extended_geom; /* Should we return extended geometry */
359
360 struct mtx sc_lock; /* driver mutex */
361
362 struct ncr53c9x_ecb *ecb_array;
363 TAILQ_HEAD(,ncr53c9x_ecb) free_list;
--- 8 unchanged lines hidden (view full) ---
372#define NCR_DISCONNECT 6 /* MSG_DISCONNECT received */
373#define NCR_CMDCOMPLETE 7 /* MSG_CMDCOMPLETE received */
374#define NCR_CLEANING 8
375#define NCR_SBR 9 /* Expect a SCSI RST because we commanded it */
376
377/* values for sc_flags */
378#define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */
379#define NCR_ABORTING 0x02 /* Bailing out */
380#define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */
381#define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */
382#define NCR_ICCS 0x10 /* Expect status phase results */
383#define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */
384#define NCR_ATN 0x40 /* ATN asserted */
385#define NCR_EXPECT_ILLCMD 0x80 /* Expect Illegal Command Interrupt */
386
387/* values for sc_features */
388#define NCR_F_HASCFG3 0x01 /* chip has CFG3 register */
389#define NCR_F_FASTSCSI 0x02 /* chip supports Fast mode */
390#define NCR_F_DMASELECT 0x04 /* can do dmaselect */
391#define NCR_F_SELATN3 0x08 /* chip supports SELATN3 command */
392
393/* values for sc_msgout */
394#define SEND_DEV_RESET 0x0001
395#define SEND_PARITY_ERROR 0x0002
396#define SEND_INIT_DET_ERR 0x0004
397#define SEND_REJECT 0x0008
398#define SEND_IDENTIFY 0x0010
399#define SEND_ABORT 0x0020
400#define SEND_WDTR 0x0040
401#define SEND_SDTR 0x0080
402#define SEND_TAG 0x0100
403
404/* SCSI Status codes */
405#define ST_MASK 0x3e /* bit 0,6,7 is reserved */
406
407/* phase bits */
408#define IOI 0x01
409#define CDI 0x02
410#define MSGI 0x04
--- 28 unchanged lines hidden (view full) ---
439 sc->sc_lastcmd = cmd; \
440 NCR_WRITE_REG(sc, NCR_CMD, cmd); \
441} while (0)
442#else
443#define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd)
444#endif
445
446/*
447 * DMA macros for NCR53c9x
448 */
449#define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc))
450#define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc))
451#define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc))
452#define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \
453 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize))
454#define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc))
455#define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc))
456
457/*
458 * Macro to convert the chip register Clock Per Byte value to
459 * Synchronous Transfer Period.
460 */
461#define ncr53c9x_cpb2stp(sc, cpb) \
462 ((250 * (cpb)) / (sc)->sc_freq)
463
464int ncr53c9x_attach(struct ncr53c9x_softc *sc);
465int ncr53c9x_detach(struct ncr53c9x_softc *sc);
466void ncr53c9x_action(struct cam_sim *sim, union ccb *ccb);
467void ncr53c9x_reset(struct ncr53c9x_softc *sc);
468void ncr53c9x_intr(void *arg);
469void ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset);
470
471#endif /* _DEV_IC_NCR53C9XVAR_H_ */
2
3/*-
4 * Copyright (c) 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
--- 52 unchanged lines hidden (view full) ---
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69/* $FreeBSD: head/sys/dev/esp/ncr53c9xvar.h 180692 2008-07-22 13:51:21Z marius $ */
70
71#ifndef _DEV_IC_NCR53C9XVAR_H_
72#define _DEV_IC_NCR53C9XVAR_H_
73
74#include <sys/lock.h>
75
76/* Set this to 1 for normal debug, or 2 for per-target tracing. */
77/* #define NCR53C9X_DEBUG 2 */
--- 27 unchanged lines hidden (view full) ---
105
106/* XXX Max tag depth. Should this be defined in the register header? */
107#define NCR_TAG_DEPTH 256
108
109/*
110 * ECB. Holds additional information for each SCSI command Comments: We
111 * need a separate scsi command block because we may need to overwrite it
112 * with a request sense command. Basicly, we refrain from fiddling with
113 * the scsipi_xfer struct (except do the expected updating of return values).
114 * We'll generally update: xs->{flags,resid,error,sense,status} and
115 * occasionally xs->retries.
116 */
117struct ncr53c9x_ecb {
118 /* These fields are preserved between alloc and free */
119 struct ncr53c9x_softc *sc;
120 int tag_id;
121 int flags;
122
123 union ccb *ccb; /* SCSI xfer ctrl block from above */
124 TAILQ_ENTRY(ncr53c9x_ecb) free_links;
125 TAILQ_ENTRY(ncr53c9x_ecb) chain;
126#define ECB_ALLOC 0x01
127#define ECB_READY 0x02
128#define ECB_SENSE 0x04
129#define ECB_ABORT 0x40
130#define ECB_RESET 0x80
131#define ECB_TENTATIVE_DONE 0x100
132 int timeout;
133
134 struct {
135 u_char msg[3]; /* Selection Id msg and tags */
136 struct scsi_generic cmd; /* SCSI command block */
137 } cmd;
138 char *daddr; /* Saved data pointer */
139 int clen; /* Size of command in cmd.cmd */
140 int dleft; /* Residue */
--- 34 unchanged lines hidden (view full) ---
175 time_t last_used;
176 u_char used; /* # slots in use */
177 u_char avail; /* where to start scanning */
178 u_char busy;
179 struct ncr53c9x_ecb *untagged;
180 struct ncr53c9x_ecb *queued[NCR_TAG_DEPTH];
181};
182
183struct ncr53c9x_tinfo {
184 int cmds; /* # of commands processed */
185 int dconns; /* # of disconnects */
186 int touts; /* # of timeouts */
187 int perrs; /* # of parity errors */
188 int senses; /* # of request sense commands sent */
189 u_char flags;
190#define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */
191#define T_SYNCMODE 0x08 /* SYNC mode has been negotiated */
192#define T_SYNCHOFF 0x10 /* SYNC mode for is permanently off */
193#define T_RSELECTOFF 0x20 /* RE-SELECT mode is off */
194#define T_TAG 0x40 /* Turn on TAG QUEUEs */
195#define T_WIDE 0x80 /* Negotiate wide options */
196#define T_WDTRSENT 0x04 /* WDTR message has been sent to */
197 u_char period; /* Period suggestion */
198 u_char offset; /* Offset suggestion */
199 u_char cfg3; /* per target config 3 */
200 u_char nextag; /* Next available tag */
201 u_char width; /* width suggesion */
202 LIST_HEAD(lun_list, ncr53c9x_linfo) luns;
203 struct ncr53c9x_linfo *lun[NCR_NLUN]; /* For speedy lookups */
204};
205
206/* Look up a lun in a tinfo */
207#define TINFO_LUN(t, l) ( \
208 (((l) < NCR_NLUN) && (((t)->lun[(l)]) != NULL)) \
209 ? ((t)->lun[(l)]) \
--- 137 unchanged lines hidden (view full) ---
347
348 /* Hardware attributes */
349 int sc_freq; /* SCSI bus frequency in MHz */
350 int sc_id; /* Our SCSI id */
351 int sc_rev; /* Chip revision */
352 int sc_features; /* Chip features */
353 int sc_minsync; /* Minimum sync period / 4 */
354 int sc_maxxfer; /* Maximum transfer size */
355 int sc_maxsync; /* Maximum sync period */
356 int sc_maxoffset; /* Maximum offset */
357 int sc_maxwidth; /* Maximum width */
358 int sc_extended_geom; /* Should we return extended geometry */
359
360 struct mtx sc_lock; /* driver mutex */
361
362 struct ncr53c9x_ecb *ecb_array;
363 TAILQ_HEAD(,ncr53c9x_ecb) free_list;
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372#define NCR_DISCONNECT 6 /* MSG_DISCONNECT received */
373#define NCR_CMDCOMPLETE 7 /* MSG_CMDCOMPLETE received */
374#define NCR_CLEANING 8
375#define NCR_SBR 9 /* Expect a SCSI RST because we commanded it */
376
377/* values for sc_flags */
378#define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */
379#define NCR_ABORTING 0x02 /* Bailing out */
380#define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */
381#define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */
382#define NCR_ICCS 0x10 /* Expect status phase results */
383#define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */
384#define NCR_ATN 0x40 /* ATN asserted */
385#define NCR_EXPECT_ILLCMD 0x80 /* Expect Illegal Command Interrupt */
386
387/* values for sc_features */
388#define NCR_F_HASCFG3 0x01 /* chip has CFG3 register */
389#define NCR_F_FASTSCSI 0x02 /* chip supports Fast mode */
390#define NCR_F_DMASELECT 0x04 /* can do dmaselect */
391#define NCR_F_SELATN3 0x08 /* chip supports SELATN3 command */
392
393/* values for sc_msgout */
394#define SEND_DEV_RESET 0x0001
395#define SEND_PARITY_ERROR 0x0002
396#define SEND_INIT_DET_ERR 0x0004
397#define SEND_REJECT 0x0008
398#define SEND_IDENTIFY 0x0010
399#define SEND_ABORT 0x0020
400#define SEND_WDTR 0x0040
401#define SEND_SDTR 0x0080
402#define SEND_TAG 0x0100
403
404/* SCSI Status codes */
405#define ST_MASK 0x3e /* bit 0,6,7 is reserved */
406
407/* phase bits */
408#define IOI 0x01
409#define CDI 0x02
410#define MSGI 0x04
--- 28 unchanged lines hidden (view full) ---
439 sc->sc_lastcmd = cmd; \
440 NCR_WRITE_REG(sc, NCR_CMD, cmd); \
441} while (0)
442#else
443#define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd)
444#endif
445
446/*
447 * DMA macros for NCR53c9x
448 */
449#define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc))
450#define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc))
451#define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc))
452#define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \
453 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize))
454#define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc))
455#define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc))
456
457/*
458 * Macro to convert the chip register Clock Per Byte value to
459 * Synchronous Transfer Period.
460 */
461#define ncr53c9x_cpb2stp(sc, cpb) \
462 ((250 * (cpb)) / (sc)->sc_freq)
463
464int ncr53c9x_attach(struct ncr53c9x_softc *sc);
465int ncr53c9x_detach(struct ncr53c9x_softc *sc);
466void ncr53c9x_action(struct cam_sim *sim, union ccb *ccb);
467void ncr53c9x_reset(struct ncr53c9x_softc *sc);
468void ncr53c9x_intr(void *arg);
469void ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset);
470
471#endif /* _DEV_IC_NCR53C9XVAR_H_ */