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ncr53c9x.c (226095) ncr53c9x.c (226381)
1/*-
2 * Copyright (c) 2004 Scott Long
3 * Copyright (c) 2005, 2008 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
1/*-
2 * Copyright (c) 2004 Scott Long
3 * Copyright (c) 2005, 2008 Marius Strobl <marius@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29/* $NetBSD: ncr53c9x.c,v 1.125 2007/01/09 12:53:12 itohy Exp $ */
29/* $NetBSD: ncr53c9x.c,v 1.143 2011/07/31 18:39:00 jakllsch Exp $ */
30
31/*-
32 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
33 * All rights reserved.
34 *
35 * This code is derived from software contributed to The NetBSD Foundation
36 * by Charles M. Hannum.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
30
31/*-
32 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
33 * All rights reserved.
34 *
35 * This code is derived from software contributed to The NetBSD Foundation
36 * by Charles M. Hannum.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. All advertising materials mentioning features or use of this software
47 * must display the following acknowledgement:
48 * This product includes software developed by the NetBSD
49 * Foundation, Inc. and its contributors.
50 * 4. Neither the name of The NetBSD Foundation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
55 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

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100 * Based on aic6360 by Jarle Greipsland
101 *
102 * Acknowledgements: Many of the algorithms used in this driver are
103 * inspired by the work of Julian Elischer (julian@FreeBSD.org) and
104 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
105 */
106
107#include <sys/cdefs.h>
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
48 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
51 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

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93 * Based on aic6360 by Jarle Greipsland
94 *
95 * Acknowledgements: Many of the algorithms used in this driver are
96 * inspired by the work of Julian Elischer (julian@FreeBSD.org) and
97 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
98 */
99
100#include <sys/cdefs.h>
108__FBSDID("$FreeBSD: head/sys/dev/esp/ncr53c9x.c 226095 2011-10-07 08:59:54Z marius $");
101__FBSDID("$FreeBSD: head/sys/dev/esp/ncr53c9x.c 226381 2011-10-15 09:29:43Z marius $");
109
110#include <sys/param.h>
111#include <sys/systm.h>
112#include <sys/bus.h>
113#include <sys/kernel.h>
114#include <sys/malloc.h>
115#include <sys/lock.h>
116#include <sys/module.h>

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128#include <cam/scsi/scsi_message.h>
129
130#include <dev/esp/ncr53c9xreg.h>
131#include <dev/esp/ncr53c9xvar.h>
132
133MODULE_DEPEND(esp, cam, 1, 1, 1);
134
135#ifdef NCR53C9X_DEBUG
102
103#include <sys/param.h>
104#include <sys/systm.h>
105#include <sys/bus.h>
106#include <sys/kernel.h>
107#include <sys/malloc.h>
108#include <sys/lock.h>
109#include <sys/module.h>

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121#include <cam/scsi/scsi_message.h>
122
123#include <dev/esp/ncr53c9xreg.h>
124#include <dev/esp/ncr53c9xvar.h>
125
126MODULE_DEPEND(esp, cam, 1, 1, 1);
127
128#ifdef NCR53C9X_DEBUG
136static int ncr53c9x_debug =
129int ncr53c9x_debug =
137 NCR_SHOWMISC /* | NCR_SHOWPHASE | NCR_SHOWTRAC | NCR_SHOWCMDS */;
138#endif
139
140static void ncr53c9x_abort(struct ncr53c9x_softc *sc,
141 struct ncr53c9x_ecb *ecb);
142static void ncr53c9x_action(struct cam_sim *sim, union ccb *ccb);
143static void ncr53c9x_async(void *cbarg, uint32_t code,
144 struct cam_path *path, void *arg);

--- 17 unchanged lines hidden (view full) ---

162 int tagtype, int tagid);
163static void ncr53c9x_reset(struct ncr53c9x_softc *sc);
164static void ncr53c9x_sense(struct ncr53c9x_softc *sc,
165 struct ncr53c9x_ecb *ecb);
166static void ncr53c9x_sched(struct ncr53c9x_softc *sc);
167static void ncr53c9x_select(struct ncr53c9x_softc *sc,
168 struct ncr53c9x_ecb *ecb);
169static void ncr53c9x_watch(void *arg);
130 NCR_SHOWMISC /* | NCR_SHOWPHASE | NCR_SHOWTRAC | NCR_SHOWCMDS */;
131#endif
132
133static void ncr53c9x_abort(struct ncr53c9x_softc *sc,
134 struct ncr53c9x_ecb *ecb);
135static void ncr53c9x_action(struct cam_sim *sim, union ccb *ccb);
136static void ncr53c9x_async(void *cbarg, uint32_t code,
137 struct cam_path *path, void *arg);

--- 17 unchanged lines hidden (view full) ---

155 int tagtype, int tagid);
156static void ncr53c9x_reset(struct ncr53c9x_softc *sc);
157static void ncr53c9x_sense(struct ncr53c9x_softc *sc,
158 struct ncr53c9x_ecb *ecb);
159static void ncr53c9x_sched(struct ncr53c9x_softc *sc);
160static void ncr53c9x_select(struct ncr53c9x_softc *sc,
161 struct ncr53c9x_ecb *ecb);
162static void ncr53c9x_watch(void *arg);
170static void ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p,
163static void ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, uint8_t *p,
171 int len);
172
173static struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *sc);
174static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *sc,
175 int64_t lun);
176
177static inline void ncr53c9x_readregs(struct ncr53c9x_softc *sc);
178static inline void ncr53c9x_setsync(struct ncr53c9x_softc *sc,
179 struct ncr53c9x_tinfo *ti);
180static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc,
181 int period);
182
183#define NCR_RDFIFO_START 0
184#define NCR_RDFIFO_CONTINUE 1
185
186#define NCR_SET_COUNT(sc, size) do { \
187 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
188 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
189 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
164 int len);
165
166static struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *sc);
167static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *sc,
168 int64_t lun);
169
170static inline void ncr53c9x_readregs(struct ncr53c9x_softc *sc);
171static inline void ncr53c9x_setsync(struct ncr53c9x_softc *sc,
172 struct ncr53c9x_tinfo *ti);
173static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc,
174 int period);
175
176#define NCR_RDFIFO_START 0
177#define NCR_RDFIFO_CONTINUE 1
178
179#define NCR_SET_COUNT(sc, size) do { \
180 NCR_WRITE_REG((sc), NCR_TCL, (size)); \
181 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
182 if ((sc->sc_cfg2 & NCRCFG2_FE) || \
190 (sc->sc_rev == NCR_VARIANT_FAS366)) { \
183 (sc->sc_rev == NCR_VARIANT_FAS366)) \
191 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
184 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
192 } \
193 if (sc->sc_rev == NCR_VARIANT_FAS366) { \
185 if (sc->sc_rev == NCR_VARIANT_FAS366) \
194 NCR_WRITE_REG(sc, NCR_RCH, 0); \
186 NCR_WRITE_REG(sc, NCR_RCH, 0); \
195 } \
196} while (0)
187} while (/* CONSTCOND */0)
197
198#ifndef mstohz
199#define mstohz(ms) \
200 (((ms) < 0x20000) ? \
201 ((ms +0u) / 1000u) * hz : \
202 ((ms +0u) * hz) /1000u)
203#endif
204

--- 341 unchanged lines hidden (view full) ---

546 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
547 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
548 }
549
550 if (sc->sc_rev == NCR_VARIANT_AM53C974)
551 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
552
553#if 0
188
189#ifndef mstohz
190#define mstohz(ms) \
191 (((ms) < 0x20000) ? \
192 ((ms +0u) / 1000u) * hz : \
193 ((ms +0u) * hz) /1000u)
194#endif
195

--- 341 unchanged lines hidden (view full) ---

537 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
538 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
539 }
540
541 if (sc->sc_rev == NCR_VARIANT_AM53C974)
542 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
543
544#if 0
554 device_printf(sc->sc_dev, "ncr53c9x_reset: revision %d\n",
555 sc->sc_rev);
556 device_printf(sc->sc_dev, "ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, "
557 "cfg3 0x%x, ccf 0x%x, timeout 0x%x\n",
558 sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, sc->sc_ccf, sc->sc_timeout);
545 device_printf(sc->sc_dev, "%s: revision %d\n", __func__, sc->sc_rev);
546 device_printf(sc->sc_dev, "%s: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, ccf "
547 "0x%x, timeout 0x%x\n", __func__, sc->sc_cfg1, sc->sc_cfg2,
548 sc->sc_cfg3, sc->sc_ccf, sc->sc_timeout);
559#endif
560}
561
562/*
563 * Clear all commands.
564 */
565static void
566ncr53c9x_clear(struct ncr53c9x_softc *sc, cam_status result)
567{
568 struct ncr53c9x_ecb *ecb;
569 int r;
570
571 NCR_LOCK_ASSERT(sc, MA_OWNED);
572
573 /* Cancel any active commands. */
574 sc->sc_state = NCR_CLEANING;
575 sc->sc_msgify = 0;
549#endif
550}
551
552/*
553 * Clear all commands.
554 */
555static void
556ncr53c9x_clear(struct ncr53c9x_softc *sc, cam_status result)
557{
558 struct ncr53c9x_ecb *ecb;
559 int r;
560
561 NCR_LOCK_ASSERT(sc, MA_OWNED);
562
563 /* Cancel any active commands. */
564 sc->sc_state = NCR_CLEANING;
565 sc->sc_msgify = 0;
576 if ((ecb = sc->sc_nexus) != NULL) {
566 ecb = sc->sc_nexus;
567 if (ecb != NULL) {
577 ecb->ccb->ccb_h.status = result;
578 ncr53c9x_done(sc, ecb);
579 }
580 /* Cancel outstanding disconnected commands. */
581 for (r = 0; r < sc->sc_ntarg; r++)
582 ncr53c9x_clear_target(sc, r, result);
583}
584

--- 7 unchanged lines hidden (view full) ---

592 struct ncr53c9x_ecb *ecb;
593 struct ncr53c9x_linfo *li;
594 int i;
595
596 NCR_LOCK_ASSERT(sc, MA_OWNED);
597
598 /* Cancel outstanding disconnected commands on each LUN. */
599 LIST_FOREACH(li, &sc->sc_tinfo[target].luns, link) {
568 ecb->ccb->ccb_h.status = result;
569 ncr53c9x_done(sc, ecb);
570 }
571 /* Cancel outstanding disconnected commands. */
572 for (r = 0; r < sc->sc_ntarg; r++)
573 ncr53c9x_clear_target(sc, r, result);
574}
575

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583 struct ncr53c9x_ecb *ecb;
584 struct ncr53c9x_linfo *li;
585 int i;
586
587 NCR_LOCK_ASSERT(sc, MA_OWNED);
588
589 /* Cancel outstanding disconnected commands on each LUN. */
590 LIST_FOREACH(li, &sc->sc_tinfo[target].luns, link) {
600 if ((ecb = li->untagged) != NULL) {
591 ecb = li->untagged;
592 if (ecb != NULL) {
601 li->untagged = NULL;
602 /*
603 * XXX should we terminate a command
604 * that never reached the disk?
605 */
606 li->busy = 0;
607 ecb->ccb->ccb_h.status = result;
608 ncr53c9x_done(sc, ecb);
609 }
593 li->untagged = NULL;
594 /*
595 * XXX should we terminate a command
596 * that never reached the disk?
597 */
598 li->busy = 0;
599 ecb->ccb->ccb_h.status = result;
600 ncr53c9x_done(sc, ecb);
601 }
610 for (i = 0; i < NCR_TAG_DEPTH; i++)
611 if ((ecb = li->queued[i])) {
602 for (i = 0; i < NCR_TAG_DEPTH; i++) {
603 ecb = li->queued[i];
604 if (ecb != NULL) {
612 li->queued[i] = NULL;
613 ecb->ccb->ccb_h.status = result;
614 ncr53c9x_done(sc, ecb);
615 }
605 li->queued[i] = NULL;
606 ecb->ccb->ccb_h.status = result;
607 ncr53c9x_done(sc, ecb);
608 }
609 }
616 li->used = 0;
617 }
618}
619
620/*
621 * Initialize ncr53c9x state machine.
622 */
623static void

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630
631 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
632
633 if (sc->sc_state == 0) {
634 /* First time through; initialize. */
635
636 TAILQ_INIT(&sc->ready_list);
637 sc->sc_nexus = NULL;
610 li->used = 0;
611 }
612}
613
614/*
615 * Initialize ncr53c9x state machine.
616 */
617static void

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624
625 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
626
627 if (sc->sc_state == 0) {
628 /* First time through; initialize. */
629
630 TAILQ_INIT(&sc->ready_list);
631 sc->sc_nexus = NULL;
638 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
632 memset(sc->sc_tinfo, 0, sizeof(*sc->sc_tinfo));
639 for (r = 0; r < sc->sc_ntarg; r++) {
640 LIST_INIT(&sc->sc_tinfo[r].luns);
641 }
642 } else
643 ncr53c9x_clear(sc, CAM_CMD_TIMEOUT);
644
645 /*
646 * Reset the chip to a known state.

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746 /* Correct round-down error. */
747 v++;
748 return (v);
749}
750
751static inline void
752ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti)
753{
633 for (r = 0; r < sc->sc_ntarg; r++) {
634 LIST_INIT(&sc->sc_tinfo[r].luns);
635 }
636 } else
637 ncr53c9x_clear(sc, CAM_CMD_TIMEOUT);
638
639 /*
640 * Reset the chip to a known state.

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740 /* Correct round-down error. */
741 v++;
742 return (v);
743}
744
745static inline void
746ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti)
747{
754 u_char cfg3, syncoff, synctp;
748 uint8_t cfg3, syncoff, synctp;
755
756 NCR_LOCK_ASSERT(sc, MA_OWNED);
757
758 cfg3 = sc->sc_cfg3;
759 if (ti->curr.offset != 0) {
760 syncoff = ti->curr.offset;
761 synctp = ncr53c9x_stp2cpb(sc, ti->curr.period);
762 if (sc->sc_features & NCR_F_FASTSCSI) {

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805 *
806 * Keeping this as a function allows me to say that this may be done
807 * by DMA instead of programmed I/O soon.
808 */
809static void
810ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
811{
812 struct ncr53c9x_tinfo *ti;
749
750 NCR_LOCK_ASSERT(sc, MA_OWNED);
751
752 cfg3 = sc->sc_cfg3;
753 if (ti->curr.offset != 0) {
754 syncoff = ti->curr.offset;
755 synctp = ncr53c9x_stp2cpb(sc, ti->curr.period);
756 if (sc->sc_features & NCR_F_FASTSCSI) {

--- 42 unchanged lines hidden (view full) ---

799 *
800 * Keeping this as a function allows me to say that this may be done
801 * by DMA instead of programmed I/O soon.
802 */
803static void
804ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
805{
806 struct ncr53c9x_tinfo *ti;
813 u_char *cmd;
807 uint8_t *cmd;
814 size_t dmasize;
815 int clen, selatn3, selatns;
816 int lun = ecb->ccb->ccb_h.target_lun;
817 int target = ecb->ccb->ccb_h.target_id;
818
819 NCR_LOCK_ASSERT(sc, MA_OWNED);
820
808 size_t dmasize;
809 int clen, selatn3, selatns;
810 int lun = ecb->ccb->ccb_h.target_lun;
811 int target = ecb->ccb->ccb_h.target_id;
812
813 NCR_LOCK_ASSERT(sc, MA_OWNED);
814
821 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
822 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
815 NCR_TRACE(("[%s(t%d,l%d,cmd:%x,tag:%x,%x)] ", __func__, target, lun,
816 ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
823
824 ti = &sc->sc_tinfo[target];
825 sc->sc_state = NCR_SELECTING;
826 /*
827 * Schedule the callout now, the first time we will go away
828 * expecting to come back due to an interrupt, because it is
829 * always possible that the interrupt may never happen.
830 */
831 callout_reset(&ecb->ch, mstohz(ecb->timeout), ncr53c9x_callout, ecb);
832
833 /*
834 * The docs say the target register is never reset, and I
835 * can't think of a better place to set it.
836 */
837 if (sc->sc_rev == NCR_VARIANT_FAS366) {
838 NCRCMD(sc, NCRCMD_FLUSH);
839 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HMEXC32 |
840 NCR_BUSID_HMEENCID);
817
818 ti = &sc->sc_tinfo[target];
819 sc->sc_state = NCR_SELECTING;
820 /*
821 * Schedule the callout now, the first time we will go away
822 * expecting to come back due to an interrupt, because it is
823 * always possible that the interrupt may never happen.
824 */
825 callout_reset(&ecb->ch, mstohz(ecb->timeout), ncr53c9x_callout, ecb);
826
827 /*
828 * The docs say the target register is never reset, and I
829 * can't think of a better place to set it.
830 */
831 if (sc->sc_rev == NCR_VARIANT_FAS366) {
832 NCRCMD(sc, NCRCMD_FLUSH);
833 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HMEXC32 |
834 NCR_BUSID_HMEENCID);
841 } else {
835 } else
842 NCR_WRITE_REG(sc, NCR_SELID, target);
836 NCR_WRITE_REG(sc, NCR_SELID, target);
843 }
844
845 /*
846 * If we are requesting sense, force a renegotiation if we are
847 * currently using anything different from asynchronous at 8 bit
848 * as the target might have lost our transfer negotiations.
849 */
850 if ((ecb->flags & ECB_SENSE) != 0 && (ti->curr.offset != 0 ||
851 ti->curr.width != MSG_EXT_WDTR_BUS_8_BIT)) {

--- 16 unchanged lines hidden (view full) ---

868 if (ti->curr.period != ti->goal.period ||
869 ti->curr.offset != ti->goal.offset ||
870 ti->curr.width != ti->goal.width) {
871 /* We have to use SELATNS to send sync/wide messages. */
872 selatn3 = 0;
873 selatns = 1;
874 }
875
837
838 /*
839 * If we are requesting sense, force a renegotiation if we are
840 * currently using anything different from asynchronous at 8 bit
841 * as the target might have lost our transfer negotiations.
842 */
843 if ((ecb->flags & ECB_SENSE) != 0 && (ti->curr.offset != 0 ||
844 ti->curr.width != MSG_EXT_WDTR_BUS_8_BIT)) {

--- 16 unchanged lines hidden (view full) ---

861 if (ti->curr.period != ti->goal.period ||
862 ti->curr.offset != ti->goal.offset ||
863 ti->curr.width != ti->goal.width) {
864 /* We have to use SELATNS to send sync/wide messages. */
865 selatn3 = 0;
866 selatns = 1;
867 }
868
876 cmd = (u_char *)&ecb->cmd.cmd;
869 cmd = (uint8_t *)&ecb->cmd.cmd;
877
878 if (selatn3) {
879 /* We'll use tags with SELATN3. */
880 clen = ecb->clen + 3;
881 cmd -= 3;
882 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
883 cmd[1] = ecb->tag[0]; /* msg[1] */
884 cmd[2] = ecb->tag[1]; /* msg[2] */

--- 64 unchanged lines hidden (view full) ---

949{
950 struct ncr53c9x_ecb *ecb;
951
952 NCR_LOCK_ASSERT(sc, MA_OWNED);
953
954 ecb = TAILQ_FIRST(&sc->free_list);
955 if (ecb) {
956 if (ecb->flags != 0)
870
871 if (selatn3) {
872 /* We'll use tags with SELATN3. */
873 clen = ecb->clen + 3;
874 cmd -= 3;
875 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */
876 cmd[1] = ecb->tag[0]; /* msg[1] */
877 cmd[2] = ecb->tag[1]; /* msg[2] */

--- 64 unchanged lines hidden (view full) ---

942{
943 struct ncr53c9x_ecb *ecb;
944
945 NCR_LOCK_ASSERT(sc, MA_OWNED);
946
947 ecb = TAILQ_FIRST(&sc->free_list);
948 if (ecb) {
949 if (ecb->flags != 0)
957 panic("ecb flags not cleared\n");
950 panic("%s: ecb flags not cleared", __func__);
958 TAILQ_REMOVE(&sc->free_list, ecb, free_links);
959 ecb->flags = ECB_ALLOC;
960 bzero(&ecb->ccb, sizeof(struct ncr53c9x_ecb) -
961 offsetof(struct ncr53c9x_ecb, ccb));
962 }
963 return (ecb);
964}
965

--- 19 unchanged lines hidden (view full) ---

985 struct ncr53c9x_softc *sc;
986 struct ncr53c9x_tinfo *ti;
987 int target;
988
989 sc = cam_sim_softc(sim);
990
991 NCR_LOCK_ASSERT(sc, MA_OWNED);
992
951 TAILQ_REMOVE(&sc->free_list, ecb, free_links);
952 ecb->flags = ECB_ALLOC;
953 bzero(&ecb->ccb, sizeof(struct ncr53c9x_ecb) -
954 offsetof(struct ncr53c9x_ecb, ccb));
955 }
956 return (ecb);
957}
958

--- 19 unchanged lines hidden (view full) ---

978 struct ncr53c9x_softc *sc;
979 struct ncr53c9x_tinfo *ti;
980 int target;
981
982 sc = cam_sim_softc(sim);
983
984 NCR_LOCK_ASSERT(sc, MA_OWNED);
985
993 NCR_TRACE(("[ncr53c9x_action %d]", ccb->ccb_h.func_code));
986 NCR_TRACE(("[%s %d]", __func__, ccb->ccb_h.func_code));
994
995 switch (ccb->ccb_h.func_code) {
996 case XPT_RESET_BUS:
997 ncr53c9x_init(sc, 1);
998 ccb->ccb_h.status = CAM_REQ_CMP;
999 xpt_done(ccb);
1000 return;
1001

--- 189 unchanged lines hidden (view full) ---

1191ncr53c9x_poll(struct cam_sim *sim)
1192{
1193 struct ncr53c9x_softc *sc;
1194
1195 sc = cam_sim_softc(sim);
1196
1197 NCR_LOCK_ASSERT(sc, MA_OWNED);
1198
987
988 switch (ccb->ccb_h.func_code) {
989 case XPT_RESET_BUS:
990 ncr53c9x_init(sc, 1);
991 ccb->ccb_h.status = CAM_REQ_CMP;
992 xpt_done(ccb);
993 return;
994

--- 189 unchanged lines hidden (view full) ---

1184ncr53c9x_poll(struct cam_sim *sim)
1185{
1186 struct ncr53c9x_softc *sc;
1187
1188 sc = cam_sim_softc(sim);
1189
1190 NCR_LOCK_ASSERT(sc, MA_OWNED);
1191
1199 NCR_TRACE(("[ncr53c9x_poll] "));
1192 NCR_TRACE(("[%s] ", __func__));
1200
1201 if (NCRDMA_ISINTR(sc))
1202 ncr53c9x_intr1(sc);
1203}
1204
1205/*
1206 * Asynchronous notification handler
1207 */

--- 47 unchanged lines hidden (view full) ---

1255{
1256 struct ncr53c9x_ecb *ecb;
1257 struct ncr53c9x_linfo *li;
1258 struct ncr53c9x_tinfo *ti;
1259 int lun, tag;
1260
1261 NCR_LOCK_ASSERT(sc, MA_OWNED);
1262
1193
1194 if (NCRDMA_ISINTR(sc))
1195 ncr53c9x_intr1(sc);
1196}
1197
1198/*
1199 * Asynchronous notification handler
1200 */

--- 47 unchanged lines hidden (view full) ---

1248{
1249 struct ncr53c9x_ecb *ecb;
1250 struct ncr53c9x_linfo *li;
1251 struct ncr53c9x_tinfo *ti;
1252 int lun, tag;
1253
1254 NCR_LOCK_ASSERT(sc, MA_OWNED);
1255
1263 NCR_TRACE(("[ncr53c9x_sched] "));
1256 NCR_TRACE(("[%s] ", __func__));
1264
1265 if (sc->sc_state != NCR_IDLE)
1257
1258 if (sc->sc_state != NCR_IDLE)
1266 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
1259 panic("%s: not IDLE (state=%d)", __func__, sc->sc_state);
1267
1268 /*
1269 * Find first ecb in ready queue that is for a target/lunit
1270 * combinations that is not busy.
1271 */
1272 TAILQ_FOREACH(ecb, &sc->ready_list, chain) {
1273 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1274 lun = ecb->ccb->ccb_h.target_lun;

--- 8 unchanged lines hidden (view full) ---

1283 else if (ecb->ccb->csio.tag_action == CAM_TAG_ACTION_NONE)
1284 tag = 0;
1285 else
1286 tag = ecb->ccb->csio.tag_action;
1287
1288 li = TINFO_LUN(ti, lun);
1289 if (li == NULL) {
1290 /* Initialize LUN info and add to list. */
1260
1261 /*
1262 * Find first ecb in ready queue that is for a target/lunit
1263 * combinations that is not busy.
1264 */
1265 TAILQ_FOREACH(ecb, &sc->ready_list, chain) {
1266 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1267 lun = ecb->ccb->ccb_h.target_lun;

--- 8 unchanged lines hidden (view full) ---

1276 else if (ecb->ccb->csio.tag_action == CAM_TAG_ACTION_NONE)
1277 tag = 0;
1278 else
1279 tag = ecb->ccb->csio.tag_action;
1280
1281 li = TINFO_LUN(ti, lun);
1282 if (li == NULL) {
1283 /* Initialize LUN info and add to list. */
1291 if ((li = malloc(sizeof(*li),
1292 M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
1284 li = malloc(sizeof(*li), M_DEVBUF, M_NOWAIT | M_ZERO);
1285 if (li == NULL)
1293 continue;
1286 continue;
1294 }
1295 li->lun = lun;
1296
1297 LIST_INSERT_HEAD(&ti->luns, li, link);
1298 if (lun < NCR_NLUN)
1299 ti->lun[lun] = li;
1300 }
1301 li->last_used = time_second;
1302 if (tag == 0) {

--- 30 unchanged lines hidden (view full) ---

1333 }
1334 if (li->untagged == NULL && tag != 0) {
1335 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1336 ecb->flags &= ~ECB_READY;
1337 sc->sc_nexus = ecb;
1338 ncr53c9x_select(sc, ecb);
1339 break;
1340 } else {
1287 li->lun = lun;
1288
1289 LIST_INSERT_HEAD(&ti->luns, li, link);
1290 if (lun < NCR_NLUN)
1291 ti->lun[lun] = li;
1292 }
1293 li->last_used = time_second;
1294 if (tag == 0) {

--- 30 unchanged lines hidden (view full) ---

1325 }
1326 if (li->untagged == NULL && tag != 0) {
1327 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
1328 ecb->flags &= ~ECB_READY;
1329 sc->sc_nexus = ecb;
1330 ncr53c9x_select(sc, ecb);
1331 break;
1332 } else {
1341 NCR_TRACE(("%d:%d busy\n",
1333 NCR_TRACE(("[%s %d:%d busy] \n", __func__,
1342 ecb->ccb->ccb_h.target_id,
1343 ecb->ccb->ccb_h.target_lun));
1344 }
1345 }
1346}
1347
1348static void
1349ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1350{
1351 union ccb *ccb = ecb->ccb;
1352 struct ncr53c9x_linfo *li;
1353 struct ncr53c9x_tinfo *ti;
1354 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd;
1355 int lun;
1356
1357 NCR_LOCK_ASSERT(sc, MA_OWNED);
1358
1334 ecb->ccb->ccb_h.target_id,
1335 ecb->ccb->ccb_h.target_lun));
1336 }
1337 }
1338}
1339
1340static void
1341ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
1342{
1343 union ccb *ccb = ecb->ccb;
1344 struct ncr53c9x_linfo *li;
1345 struct ncr53c9x_tinfo *ti;
1346 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd;
1347 int lun;
1348
1349 NCR_LOCK_ASSERT(sc, MA_OWNED);
1350
1359 NCR_TRACE(("requesting sense "));
1351 NCR_TRACE(("[%s] ", __func__));
1360
1361 lun = ccb->ccb_h.target_lun;
1362 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1363
1364 /* Next, setup a REQUEST SENSE command block. */
1365 memset(ss, 0, sizeof(*ss));
1366 ss->opcode = REQUEST_SENSE;
1367 ss->byte2 = ccb->ccb_h.target_lun << SCSI_CMD_LUN_SHIFT;
1368 ss->length = sizeof(struct scsi_sense_data);
1369 ecb->clen = sizeof(*ss);
1370 memset(&ccb->csio.sense_data, 0, sizeof(ccb->csio.sense_data));
1352
1353 lun = ccb->ccb_h.target_lun;
1354 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1355
1356 /* Next, setup a REQUEST SENSE command block. */
1357 memset(ss, 0, sizeof(*ss));
1358 ss->opcode = REQUEST_SENSE;
1359 ss->byte2 = ccb->ccb_h.target_lun << SCSI_CMD_LUN_SHIFT;
1360 ss->length = sizeof(struct scsi_sense_data);
1361 ecb->clen = sizeof(*ss);
1362 memset(&ccb->csio.sense_data, 0, sizeof(ccb->csio.sense_data));
1371 ecb->daddr = (char *)&ccb->csio.sense_data;
1363 ecb->daddr = (uint8_t *)&ccb->csio.sense_data;
1372 ecb->dleft = sizeof(struct scsi_sense_data);
1373 ecb->flags |= ECB_SENSE;
1374 ecb->timeout = NCR_SENSE_TIMEOUT;
1375 ti->senses++;
1376 li = TINFO_LUN(ti, lun);
1377 if (li->busy)
1378 li->busy = 0;
1379 ncr53c9x_dequeue(sc, ecb);
1380 li->untagged = ecb; /* Must be executed first to fix C/A. */
1381 li->busy = 2;
1364 ecb->dleft = sizeof(struct scsi_sense_data);
1365 ecb->flags |= ECB_SENSE;
1366 ecb->timeout = NCR_SENSE_TIMEOUT;
1367 ti->senses++;
1368 li = TINFO_LUN(ti, lun);
1369 if (li->busy)
1370 li->busy = 0;
1371 ncr53c9x_dequeue(sc, ecb);
1372 li->untagged = ecb; /* Must be executed first to fix C/A. */
1373 li->busy = 2;
1382 if (ecb == sc->sc_nexus) {
1374 if (ecb == sc->sc_nexus)
1383 ncr53c9x_select(sc, ecb);
1375 ncr53c9x_select(sc, ecb);
1384 } else {
1376 else {
1385 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1386 ecb->flags |= ECB_READY;
1387 if (sc->sc_state == NCR_IDLE)
1388 ncr53c9x_sched(sc);
1389 }
1390}
1391
1392/*

--- 4 unchanged lines hidden (view full) ---

1397{
1398 union ccb *ccb = ecb->ccb;
1399 struct ncr53c9x_linfo *li;
1400 struct ncr53c9x_tinfo *ti;
1401 int lun, sense_returned;
1402
1403 NCR_LOCK_ASSERT(sc, MA_OWNED);
1404
1377 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
1378 ecb->flags |= ECB_READY;
1379 if (sc->sc_state == NCR_IDLE)
1380 ncr53c9x_sched(sc);
1381 }
1382}
1383
1384/*

--- 4 unchanged lines hidden (view full) ---

1389{
1390 union ccb *ccb = ecb->ccb;
1391 struct ncr53c9x_linfo *li;
1392 struct ncr53c9x_tinfo *ti;
1393 int lun, sense_returned;
1394
1395 NCR_LOCK_ASSERT(sc, MA_OWNED);
1396
1405 NCR_TRACE(("[ncr53c9x_done(status:%x)] ", ccb->ccb_h.status));
1397 NCR_TRACE(("[%s(status:%x)] ", __func__, ccb->ccb_h.status));
1406
1407 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1408 lun = ccb->ccb_h.target_lun;
1409 li = TINFO_LUN(ti, lun);
1410
1411 callout_stop(&ecb->ch);
1412
1413 /*

--- 38 unchanged lines hidden (view full) ---

1452 }
1453 if (ecb->stat == SCSI_STATUS_QUEUE_FULL)
1454 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
1455 else if (ecb->stat == SCSI_STATUS_BUSY)
1456 ccb->ccb_h.status = CAM_SCSI_BUSY;
1457 }
1458
1459#ifdef NCR53C9X_DEBUG
1398
1399 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
1400 lun = ccb->ccb_h.target_lun;
1401 li = TINFO_LUN(ti, lun);
1402
1403 callout_stop(&ecb->ch);
1404
1405 /*

--- 38 unchanged lines hidden (view full) ---

1444 }
1445 if (ecb->stat == SCSI_STATUS_QUEUE_FULL)
1446 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
1447 else if (ecb->stat == SCSI_STATUS_BUSY)
1448 ccb->ccb_h.status = CAM_SCSI_BUSY;
1449 }
1450
1451#ifdef NCR53C9X_DEBUG
1460 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1452 if ((ncr53c9x_debug & NCR_SHOWTRAC) != 0) {
1461 if (ccb->csio.resid != 0)
1462 printf("resid=%d ", ccb->csio.resid);
1463 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
1464 printf("sense=0x%02x\n",
1465 ccb->csio.sense_data.error_code);
1466 else
1467 printf("status SCSI=0x%x CAM=0x%x\n",
1468 ccb->csio.scsi_status, ccb->ccb_h.status);

--- 36 unchanged lines hidden (view full) ---

1505
1506 NCR_LOCK_ASSERT(sc, MA_OWNED);
1507
1508 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1509 lun = ecb->ccb->ccb_h.target_lun;
1510 li = TINFO_LUN(ti, lun);
1511#ifdef DIAGNOSTIC
1512 if (li == NULL || li->lun != lun)
1453 if (ccb->csio.resid != 0)
1454 printf("resid=%d ", ccb->csio.resid);
1455 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
1456 printf("sense=0x%02x\n",
1457 ccb->csio.sense_data.error_code);
1458 else
1459 printf("status SCSI=0x%x CAM=0x%x\n",
1460 ccb->csio.scsi_status, ccb->ccb_h.status);

--- 36 unchanged lines hidden (view full) ---

1497
1498 NCR_LOCK_ASSERT(sc, MA_OWNED);
1499
1500 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
1501 lun = ecb->ccb->ccb_h.target_lun;
1502 li = TINFO_LUN(ti, lun);
1503#ifdef DIAGNOSTIC
1504 if (li == NULL || li->lun != lun)
1513 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist",
1505 panic("%s: lun %qx for ecb %p does not exist", __func__,
1514 (long long)lun, ecb);
1515#endif
1516 if (li->untagged == ecb) {
1517 li->busy = 0;
1518 li->untagged = NULL;
1519 }
1520 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1521#ifdef DIAGNOSTIC
1522 if (li->queued[ecb->tag[1]] != NULL &&
1523 (li->queued[ecb->tag[1]] != ecb))
1506 (long long)lun, ecb);
1507#endif
1508 if (li->untagged == ecb) {
1509 li->busy = 0;
1510 li->untagged = NULL;
1511 }
1512 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
1513#ifdef DIAGNOSTIC
1514 if (li->queued[ecb->tag[1]] != NULL &&
1515 (li->queued[ecb->tag[1]] != ecb))
1524 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
1525 "instead of ecb %p\n", ecb->tag[1],
1526 (long long)lun, li->queued[ecb->tag[1]], ecb);
1516 panic("%s: slot %d for lun %qx has %p instead of ecb "
1517 "%p", __func__, ecb->tag[1], (long long)lun,
1518 li->queued[ecb->tag[1]], ecb);
1527#endif
1528 li->queued[ecb->tag[1]] = NULL;
1529 li->used--;
1530 }
1531 ecb->tag[0] = ecb->tag[1] = 0;
1532
1533 if ((ecb->flags & ECB_READY) != 0) {
1534 ecb->flags &= ~ECB_READY;

--- 10 unchanged lines hidden (view full) ---

1545 * attention on the bus. We can only do this when we are the initiator
1546 * else there will be an illegal command interrupt.
1547 */
1548#define ncr53c9x_sched_msgout(m) do { \
1549 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1550 NCRCMD(sc, NCRCMD_SETATN); \
1551 sc->sc_flags |= NCR_ATN; \
1552 sc->sc_msgpriq |= (m); \
1519#endif
1520 li->queued[ecb->tag[1]] = NULL;
1521 li->used--;
1522 }
1523 ecb->tag[0] = ecb->tag[1] = 0;
1524
1525 if ((ecb->flags & ECB_READY) != 0) {
1526 ecb->flags &= ~ECB_READY;

--- 10 unchanged lines hidden (view full) ---

1537 * attention on the bus. We can only do this when we are the initiator
1538 * else there will be an illegal command interrupt.
1539 */
1540#define ncr53c9x_sched_msgout(m) do { \
1541 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \
1542 NCRCMD(sc, NCRCMD_SETATN); \
1543 sc->sc_flags |= NCR_ATN; \
1544 sc->sc_msgpriq |= (m); \
1553} while (0)
1545} while (/* CONSTCOND */0)
1554
1555static void
1556ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1557{
1558
1559 NCR_LOCK_ASSERT(sc, MA_OWNED);
1560
1546
1547static void
1548ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
1549{
1550
1551 NCR_LOCK_ASSERT(sc, MA_OWNED);
1552
1561 NCR_TRACE(("[flushfifo] "));
1553 NCR_TRACE(("[%s] ", __func__));
1562
1563 NCRCMD(sc, NCRCMD_FLUSH);
1564
1565 if (sc->sc_phase == COMMAND_PHASE ||
1566 sc->sc_phase == MESSAGE_OUT_PHASE)
1567 DELAY(2);
1568}
1569
1570static int
1571ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1572{
1554
1555 NCRCMD(sc, NCRCMD_FLUSH);
1556
1557 if (sc->sc_phase == COMMAND_PHASE ||
1558 sc->sc_phase == MESSAGE_OUT_PHASE)
1559 DELAY(2);
1560}
1561
1562static int
1563ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
1564{
1573 u_char *ibuf;
1574 int i, n;
1565 int i, n;
1566 uint8_t *ibuf;
1575
1576 NCR_LOCK_ASSERT(sc, MA_OWNED);
1577
1578 switch (how) {
1579 case NCR_RDFIFO_START:
1580 ibuf = sc->sc_imess;
1581 sc->sc_imlen = 0;
1582 break;
1583
1584 case NCR_RDFIFO_CONTINUE:
1585 ibuf = sc->sc_imess + sc->sc_imlen;
1586 break;
1587
1588 default:
1567
1568 NCR_LOCK_ASSERT(sc, MA_OWNED);
1569
1570 switch (how) {
1571 case NCR_RDFIFO_START:
1572 ibuf = sc->sc_imess;
1573 sc->sc_imlen = 0;
1574 break;
1575
1576 case NCR_RDFIFO_CONTINUE:
1577 ibuf = sc->sc_imess + sc->sc_imlen;
1578 break;
1579
1580 default:
1589 panic("ncr53c9x_rdfifo: bad flag");
1581 panic("%s: bad flag", __func__);
1590 /* NOTREACHED */
1591 }
1592
1593 /*
1594 * XXX buffer (sc_imess) size for message
1595 */
1596
1597 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;

--- 8 unchanged lines hidden (view full) ---

1606
1607 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1608 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1609
1610 NCR_READ_REG(sc, NCR_FIFO);
1611
1612 ncr53c9x_flushfifo(sc);
1613 }
1582 /* NOTREACHED */
1583 }
1584
1585 /*
1586 * XXX buffer (sc_imess) size for message
1587 */
1588
1589 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;

--- 8 unchanged lines hidden (view full) ---

1598
1599 NCR_WRITE_REG(sc, NCR_FIFO, 0);
1600 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO);
1601
1602 NCR_READ_REG(sc, NCR_FIFO);
1603
1604 ncr53c9x_flushfifo(sc);
1605 }
1614 } else {
1606 } else
1615 for (i = 0; i < n; i++)
1616 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
1607 for (i = 0; i < n; i++)
1608 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
1617 }
1618
1619 sc->sc_imlen += i;
1620
1621#if 0
1622#ifdef NCR53C9X_DEBUG
1623 NCR_TRACE(("\n[rdfifo %s (%d):",
1624 (how == NCR_RDFIFO_START) ? "start" : "cont", (int)sc->sc_imlen));
1609
1610 sc->sc_imlen += i;
1611
1612#if 0
1613#ifdef NCR53C9X_DEBUG
1614 NCR_TRACE(("\n[rdfifo %s (%d):",
1615 (how == NCR_RDFIFO_START) ? "start" : "cont", (int)sc->sc_imlen));
1625 if (ncr53c9x_debug & NCR_SHOWTRAC) {
1616 if ((ncr53c9x_debug & NCR_SHOWTRAC) != 0) {
1626 for (i = 0; i < sc->sc_imlen; i++)
1627 printf(" %02x", sc->sc_imess[i]);
1628 printf("]\n");
1629 }
1630#endif
1631#endif
1632 return (sc->sc_imlen);
1633}
1634
1635static void
1617 for (i = 0; i < sc->sc_imlen; i++)
1618 printf(" %02x", sc->sc_imess[i]);
1619 printf("]\n");
1620 }
1621#endif
1622#endif
1623 return (sc->sc_imlen);
1624}
1625
1626static void
1636ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
1627ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, uint8_t *p, int len)
1637{
1638 int i;
1639
1640 NCR_LOCK_ASSERT(sc, MA_OWNED);
1641
1642#ifdef NCR53C9X_DEBUG
1643 NCR_MSGS(("[wrfifo(%d):", len));
1628{
1629 int i;
1630
1631 NCR_LOCK_ASSERT(sc, MA_OWNED);
1632
1633#ifdef NCR53C9X_DEBUG
1634 NCR_MSGS(("[wrfifo(%d):", len));
1644 if (ncr53c9x_debug & NCR_SHOWMSGS) {
1635 if ((ncr53c9x_debug & NCR_SHOWMSGS) != 0) {
1645 for (i = 0; i < len; i++)
1646 printf(" %02x", p[i]);
1647 printf("]\n");
1648 }
1649#endif
1650
1651 for (i = 0; i < len; i++) {
1652 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);

--- 5 unchanged lines hidden (view full) ---

1658
1659static int
1660ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype,
1661 int tagid)
1662{
1663 struct ncr53c9x_ecb *ecb = NULL;
1664 struct ncr53c9x_linfo *li;
1665 struct ncr53c9x_tinfo *ti;
1636 for (i = 0; i < len; i++)
1637 printf(" %02x", p[i]);
1638 printf("]\n");
1639 }
1640#endif
1641
1642 for (i = 0; i < len; i++) {
1643 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);

--- 5 unchanged lines hidden (view full) ---

1649
1650static int
1651ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype,
1652 int tagid)
1653{
1654 struct ncr53c9x_ecb *ecb = NULL;
1655 struct ncr53c9x_linfo *li;
1656 struct ncr53c9x_tinfo *ti;
1666 u_char lun, selid, target;
1657 uint8_t lun, selid, target;
1667
1668 NCR_LOCK_ASSERT(sc, MA_OWNED);
1669
1658
1659 NCR_LOCK_ASSERT(sc, MA_OWNED);
1660
1670 if (sc->sc_rev == NCR_VARIANT_FAS366) {
1661 if (sc->sc_rev == NCR_VARIANT_FAS366)
1671 target = sc->sc_selid;
1662 target = sc->sc_selid;
1672 } else {
1663 else {
1673 /*
1674 * The SCSI chip made a snapshot of the data bus
1675 * while the reselection was being negotiated.
1676 * This enables us to determine which target did
1677 * the reselect.
1678 */
1679 selid = sc->sc_selid & ~(1 << sc->sc_id);
1680 if (selid & (selid - 1)) {

--- 65 unchanged lines hidden (view full) ---

1746
1747/* From NetBSD; these should go into CAM at some point. */
1748#define MSG_ISEXTENDED(m) ((m) == MSG_EXTENDED)
1749#define MSG_IS1BYTE(m) \
1750 ((!MSG_ISEXTENDED(m) && (m) < 0x20) || MSG_ISIDENTIFY(m))
1751#define MSG_IS2BYTE(m) (((m) & 0xf0) == 0x20)
1752
1753static inline int
1664 /*
1665 * The SCSI chip made a snapshot of the data bus
1666 * while the reselection was being negotiated.
1667 * This enables us to determine which target did
1668 * the reselect.
1669 */
1670 selid = sc->sc_selid & ~(1 << sc->sc_id);
1671 if (selid & (selid - 1)) {

--- 65 unchanged lines hidden (view full) ---

1737
1738/* From NetBSD; these should go into CAM at some point. */
1739#define MSG_ISEXTENDED(m) ((m) == MSG_EXTENDED)
1740#define MSG_IS1BYTE(m) \
1741 ((!MSG_ISEXTENDED(m) && (m) < 0x20) || MSG_ISIDENTIFY(m))
1742#define MSG_IS2BYTE(m) (((m) & 0xf0) == 0x20)
1743
1744static inline int
1754__verify_msg_format(u_char *p, int len)
1745__verify_msg_format(uint8_t *p, int len)
1755{
1756
1757 if (len == 1 && MSG_IS1BYTE(p[0]))
1758 return (1);
1759 if (len == 2 && MSG_IS2BYTE(p[0]))
1760 return (1);
1761 if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1762 len == p[1] + 2)

--- 9 unchanged lines hidden (view full) ---

1772 * byte in the FIFO.
1773 */
1774static void
1775ncr53c9x_msgin(struct ncr53c9x_softc *sc)
1776{
1777 struct ncr53c9x_ecb *ecb;
1778 struct ncr53c9x_linfo *li;
1779 struct ncr53c9x_tinfo *ti;
1746{
1747
1748 if (len == 1 && MSG_IS1BYTE(p[0]))
1749 return (1);
1750 if (len == 2 && MSG_IS2BYTE(p[0]))
1751 return (1);
1752 if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
1753 len == p[1] + 2)

--- 9 unchanged lines hidden (view full) ---

1763 * byte in the FIFO.
1764 */
1765static void
1766ncr53c9x_msgin(struct ncr53c9x_softc *sc)
1767{
1768 struct ncr53c9x_ecb *ecb;
1769 struct ncr53c9x_linfo *li;
1770 struct ncr53c9x_tinfo *ti;
1780 u_char *pb;
1771 uint8_t *pb;
1781 int lun, plen;
1782
1783 NCR_LOCK_ASSERT(sc, MA_OWNED);
1784
1772 int lun, plen;
1773
1774 NCR_LOCK_ASSERT(sc, MA_OWNED);
1775
1785 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
1776 NCR_TRACE(("[%s(curmsglen:%ld)] ", __func__, (long)sc->sc_imlen));
1786
1787 if (sc->sc_imlen == 0) {
1788 device_printf(sc->sc_dev, "msgin: no msg byte available\n");
1789 return;
1790 }
1791
1792 /*
1793 * Prepare for a new message. A message should (according

--- 269 unchanged lines hidden (view full) ---

2063 */
2064 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
2065 (sc->sc_msgify == 0)) {
2066 device_printf(sc->sc_dev, "TAG reselect without "
2067 "IDENTIFY; MSG %x; sending DEVICE RESET\n",
2068 sc->sc_imess[0]);
2069 goto reset;
2070 }
1777
1778 if (sc->sc_imlen == 0) {
1779 device_printf(sc->sc_dev, "msgin: no msg byte available\n");
1780 return;
1781 }
1782
1783 /*
1784 * Prepare for a new message. A message should (according

--- 269 unchanged lines hidden (view full) ---

2054 */
2055 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
2056 (sc->sc_msgify == 0)) {
2057 device_printf(sc->sc_dev, "TAG reselect without "
2058 "IDENTIFY; MSG %x; sending DEVICE RESET\n",
2059 sc->sc_imess[0]);
2060 goto reset;
2061 }
2071 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
2062 (void)ncr53c9x_reselect(sc, sc->sc_msgify,
2072 sc->sc_imess[0], sc->sc_imess[1]);
2073 break;
2074
2075 case NCR_RESELECTED:
2063 sc->sc_imess[0], sc->sc_imess[1]);
2064 break;
2065
2066 case NCR_RESELECTED:
2076 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
2067 if (MSG_ISIDENTIFY(sc->sc_imess[1]))
2077 sc->sc_msgify = sc->sc_imess[1];
2068 sc->sc_msgify = sc->sc_imess[1];
2078 } else {
2069 else {
2079 device_printf(sc->sc_dev, "reselect without IDENTIFY;"
2080 " MSG %x; sending DEVICE RESET\n", sc->sc_imess[1]);
2081 goto reset;
2082 }
2070 device_printf(sc->sc_dev, "reselect without IDENTIFY;"
2071 " MSG %x; sending DEVICE RESET\n", sc->sc_imess[1]);
2072 goto reset;
2073 }
2083 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
2074 (void)ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
2084 break;
2085
2086 default:
2087 device_printf(sc->sc_dev, "unexpected MESSAGE IN; "
2088 "sending DEVICE RESET\n");
2089 /* FALLTHROUGH */
2090 reset:
2091 ncr53c9x_sched_msgout(SEND_DEV_RESET);

--- 27 unchanged lines hidden (view full) ---

2119 struct ncr53c9x_ecb *ecb;
2120 size_t size;
2121#ifdef NCR53C9X_DEBUG
2122 int i;
2123#endif
2124
2125 NCR_LOCK_ASSERT(sc, MA_OWNED);
2126
2075 break;
2076
2077 default:
2078 device_printf(sc->sc_dev, "unexpected MESSAGE IN; "
2079 "sending DEVICE RESET\n");
2080 /* FALLTHROUGH */
2081 reset:
2082 ncr53c9x_sched_msgout(SEND_DEV_RESET);

--- 27 unchanged lines hidden (view full) ---

2110 struct ncr53c9x_ecb *ecb;
2111 size_t size;
2112#ifdef NCR53C9X_DEBUG
2113 int i;
2114#endif
2115
2116 NCR_LOCK_ASSERT(sc, MA_OWNED);
2117
2127 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
2128 sc->sc_msgpriq, sc->sc_prevphase));
2118 NCR_TRACE(("[%s(priq:%x, prevphase:%x)]", __func__, sc->sc_msgpriq,
2119 sc->sc_prevphase));
2129
2130 /*
2131 * XXX - the NCR_ATN flag is not in sync with the actual ATN
2132 * condition on the SCSI bus. The 53c9x chip
2133 * automatically turns off ATN before sending the
2134 * message byte. (See also the comment below in the
2135 * default case when picking out a message to send.)
2136 */
2137 if (sc->sc_flags & NCR_ATN) {
2138 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
2139 new:
2140 NCRCMD(sc, NCRCMD_FLUSH);
2120
2121 /*
2122 * XXX - the NCR_ATN flag is not in sync with the actual ATN
2123 * condition on the SCSI bus. The 53c9x chip
2124 * automatically turns off ATN before sending the
2125 * message byte. (See also the comment below in the
2126 * default case when picking out a message to send.)
2127 */
2128 if (sc->sc_flags & NCR_ATN) {
2129 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
2130 new:
2131 NCRCMD(sc, NCRCMD_FLUSH);
2141/* DELAY(1); */
2132#if 0
2133 DELAY(1);
2134#endif
2142 sc->sc_msgoutq = 0;
2143 sc->sc_omlen = 0;
2144 }
2145 } else {
2146 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2147 ncr53c9x_sched_msgout(sc->sc_msgoutq);
2148 goto new;
2135 sc->sc_msgoutq = 0;
2136 sc->sc_omlen = 0;
2137 }
2138 } else {
2139 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
2140 ncr53c9x_sched_msgout(sc->sc_msgoutq);
2141 goto new;
2149 } else {
2142 } else
2150 device_printf(sc->sc_dev, "at line %d: unexpected "
2151 "MESSAGE OUT phase\n", __LINE__);
2143 device_printf(sc->sc_dev, "at line %d: unexpected "
2144 "MESSAGE OUT phase\n", __LINE__);
2152 }
2153 }
2154
2155 if (sc->sc_omlen == 0) {
2156 /* Pick up highest priority message. */
2157 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
2158 sc->sc_msgoutq |= sc->sc_msgout;
2159 sc->sc_msgpriq &= ~sc->sc_msgout;
2160 sc->sc_omlen = 1; /* "Default" message len */

--- 15 unchanged lines hidden (view full) ---

2176 sc->sc_omess[0] = MSG_EXTENDED;
2177 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
2178 sc->sc_omess[2] = MSG_EXT_WDTR;
2179 sc->sc_omess[3] = ti->goal.width;
2180 sc->sc_omlen = 4;
2181 break;
2182
2183 case SEND_IDENTIFY:
2145 }
2146
2147 if (sc->sc_omlen == 0) {
2148 /* Pick up highest priority message. */
2149 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
2150 sc->sc_msgoutq |= sc->sc_msgout;
2151 sc->sc_msgpriq &= ~sc->sc_msgout;
2152 sc->sc_omlen = 1; /* "Default" message len */

--- 15 unchanged lines hidden (view full) ---

2168 sc->sc_omess[0] = MSG_EXTENDED;
2169 sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
2170 sc->sc_omess[2] = MSG_EXT_WDTR;
2171 sc->sc_omess[3] = ti->goal.width;
2172 sc->sc_omlen = 4;
2173 break;
2174
2175 case SEND_IDENTIFY:
2184 if (sc->sc_state != NCR_CONNECTED) {
2176 if (sc->sc_state != NCR_CONNECTED)
2185 device_printf(sc->sc_dev, "at line %d: no "
2186 "nexus\n", __LINE__);
2177 device_printf(sc->sc_dev, "at line %d: no "
2178 "nexus\n", __LINE__);
2187 }
2188 ecb = sc->sc_nexus;
2189 sc->sc_omess[0] =
2190 MSG_IDENTIFY(ecb->ccb->ccb_h.target_lun, 0);
2191 break;
2192
2193 case SEND_TAG:
2179 ecb = sc->sc_nexus;
2180 sc->sc_omess[0] =
2181 MSG_IDENTIFY(ecb->ccb->ccb_h.target_lun, 0);
2182 break;
2183
2184 case SEND_TAG:
2194 if (sc->sc_state != NCR_CONNECTED) {
2185 if (sc->sc_state != NCR_CONNECTED)
2195 device_printf(sc->sc_dev, "at line %d: no "
2196 "nexus\n", __LINE__);
2186 device_printf(sc->sc_dev, "at line %d: no "
2187 "nexus\n", __LINE__);
2197 }
2198 ecb = sc->sc_nexus;
2199 sc->sc_omess[0] = ecb->tag[0];
2200 sc->sc_omess[1] = ecb->tag[1];
2201 sc->sc_omlen = 2;
2202 break;
2203
2204 case SEND_DEV_RESET:
2205 sc->sc_flags |= NCR_ABORTING;

--- 38 unchanged lines hidden (view full) ---

2244 */
2245 sc->sc_flags &= ~NCR_ATN;
2246 sc->sc_omess[0] = MSG_NOOP;
2247 }
2248 sc->sc_omp = sc->sc_omess;
2249 }
2250
2251#ifdef NCR53C9X_DEBUG
2188 ecb = sc->sc_nexus;
2189 sc->sc_omess[0] = ecb->tag[0];
2190 sc->sc_omess[1] = ecb->tag[1];
2191 sc->sc_omlen = 2;
2192 break;
2193
2194 case SEND_DEV_RESET:
2195 sc->sc_flags |= NCR_ABORTING;

--- 38 unchanged lines hidden (view full) ---

2234 */
2235 sc->sc_flags &= ~NCR_ATN;
2236 sc->sc_omess[0] = MSG_NOOP;
2237 }
2238 sc->sc_omp = sc->sc_omess;
2239 }
2240
2241#ifdef NCR53C9X_DEBUG
2252 if (ncr53c9x_debug & NCR_SHOWMSGS) {
2242 if ((ncr53c9x_debug & NCR_SHOWMSGS) != 0) {
2253 NCR_MSGS(("<msgout:"));
2254 for (i = 0; i < sc->sc_omlen; i++)
2255 NCR_MSGS((" %02x", sc->sc_omess[i]));
2256 NCR_MSGS(("> "));
2257 }
2258#endif
2259 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2260 /*

--- 44 unchanged lines hidden (view full) ---

2305ncr53c9x_intr1(struct ncr53c9x_softc *sc)
2306{
2307 struct ncr53c9x_ecb *ecb;
2308 struct ncr53c9x_linfo *li;
2309 struct ncr53c9x_tinfo *ti;
2310 struct timeval cur, wait;
2311 size_t size;
2312 int i, nfifo;
2243 NCR_MSGS(("<msgout:"));
2244 for (i = 0; i < sc->sc_omlen; i++)
2245 NCR_MSGS((" %02x", sc->sc_omess[i]));
2246 NCR_MSGS(("> "));
2247 }
2248#endif
2249 if (sc->sc_rev == NCR_VARIANT_FAS366) {
2250 /*

--- 44 unchanged lines hidden (view full) ---

2295ncr53c9x_intr1(struct ncr53c9x_softc *sc)
2296{
2297 struct ncr53c9x_ecb *ecb;
2298 struct ncr53c9x_linfo *li;
2299 struct ncr53c9x_tinfo *ti;
2300 struct timeval cur, wait;
2301 size_t size;
2302 int i, nfifo;
2313 u_char msg;
2303 uint8_t msg;
2314
2315 NCR_LOCK_ASSERT(sc, MA_OWNED);
2316
2317 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state));
2318
2319again:
2320 /* and what do the registers say... */
2321 ncr53c9x_readregs(sc);

--- 58 unchanged lines hidden (view full) ---

2380 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2381 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2382 /*
2383 * Eat away "Illegal command" interrupt
2384 * on a ESP100 caused by a re-selection
2385 * while we were trying to select
2386 * another target.
2387 */
2304
2305 NCR_LOCK_ASSERT(sc, MA_OWNED);
2306
2307 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state));
2308
2309again:
2310 /* and what do the registers say... */
2311 ncr53c9x_readregs(sc);

--- 58 unchanged lines hidden (view full) ---

2370 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
2371 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
2372 /*
2373 * Eat away "Illegal command" interrupt
2374 * on a ESP100 caused by a re-selection
2375 * while we were trying to select
2376 * another target.
2377 */
2388#ifdef DEBUG
2378#ifdef NCR53C9X_DEBUG
2389 device_printf(sc->sc_dev, "ESP100 work-around "
2390 "activated\n");
2391#endif
2392 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2393 return;
2394 }
2395 /* Illegal command, out of sync? */
2396 device_printf(sc->sc_dev, "illegal command: 0x%x "

--- 90 unchanged lines hidden (view full) ---

2487 }
2488
2489 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2490 sc->sc_msgify = 0;
2491 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>",
2492 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2493 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2494 NCRCMD(sc, NCRCMD_FLUSH);
2379 device_printf(sc->sc_dev, "ESP100 work-around "
2380 "activated\n");
2381#endif
2382 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
2383 return;
2384 }
2385 /* Illegal command, out of sync? */
2386 device_printf(sc->sc_dev, "illegal command: 0x%x "

--- 90 unchanged lines hidden (view full) ---

2477 }
2478
2479 if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
2480 sc->sc_msgify = 0;
2481 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>",
2482 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
2483 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2484 NCRCMD(sc, NCRCMD_FLUSH);
2495/* DELAY(1); */
2485#if 0
2486 DELAY(1);
2487#endif
2496 }
2497 /*
2498 * This command must (apparently) be issued within
2499 * 250mS of a disconnect. So here you are...
2500 */
2501 NCRCMD(sc, NCRCMD_ENSEL);
2502
2503 switch (sc->sc_state) {

--- 225 unchanged lines hidden (view full) ---

2729 /*
2730 * When doing path inquiry during boot
2731 * FAS100A trigger a stray interrupt which
2732 * we just ignore instead of panicing.
2733 */
2734 if (sc->sc_state == NCR_IDLE &&
2735 sc->sc_espstep == 0)
2736 return;
2488 }
2489 /*
2490 * This command must (apparently) be issued within
2491 * 250mS of a disconnect. So here you are...
2492 */
2493 NCRCMD(sc, NCRCMD_ENSEL);
2494
2495 switch (sc->sc_state) {

--- 225 unchanged lines hidden (view full) ---

2721 /*
2722 * When doing path inquiry during boot
2723 * FAS100A trigger a stray interrupt which
2724 * we just ignore instead of panicing.
2725 */
2726 if (sc->sc_state == NCR_IDLE &&
2727 sc->sc_espstep == 0)
2728 return;
2737 panic("ncr53c9x: no nexus");
2729 panic("%s: no nexus", __func__);
2738 }
2739
2740 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2741
2742 switch (sc->sc_espstep) {
2743 case 0:
2744 /*
2745 * The target did not respond with a

--- 61 unchanged lines hidden (view full) ---

2807 * sync mode is on.
2808 * Look at FIFO to see if command went out.
2809 * (Timing problems?)
2810 */
2811 if (sc->sc_features & NCR_F_DMASELECT) {
2812 if (sc->sc_cmdlen == 0)
2813 /* Hope for the best... */
2814 break;
2730 }
2731
2732 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
2733
2734 switch (sc->sc_espstep) {
2735 case 0:
2736 /*
2737 * The target did not respond with a

--- 61 unchanged lines hidden (view full) ---

2799 * sync mode is on.
2800 * Look at FIFO to see if command went out.
2801 * (Timing problems?)
2802 */
2803 if (sc->sc_features & NCR_F_DMASELECT) {
2804 if (sc->sc_cmdlen == 0)
2805 /* Hope for the best... */
2806 break;
2815 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
2816 & NCRFIFO_FF) == 0) {
2807 } else if ((NCR_READ_REG(sc, NCR_FFLAG) &
2808 NCRFIFO_FF) == 0) {
2817 /* Hope for the best... */
2818 break;
2819 }
2820 xpt_print_path(ecb->ccb->ccb_h.path);
2821 printf("selection failed; %d left in FIFO "
2822 "[intr %x, stat %x, step %d]\n",
2823 NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF,
2824 sc->sc_espintr, sc->sc_espstat,

--- 42 unchanged lines hidden (view full) ---

2867 }
2868 break;
2869
2870 case NCR_CONNECTED:
2871 if ((sc->sc_flags & NCR_ICCS) != 0) {
2872 /* "Initiate Command Complete Steps" in progress */
2873 sc->sc_flags &= ~NCR_ICCS;
2874
2809 /* Hope for the best... */
2810 break;
2811 }
2812 xpt_print_path(ecb->ccb->ccb_h.path);
2813 printf("selection failed; %d left in FIFO "
2814 "[intr %x, stat %x, step %d]\n",
2815 NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF,
2816 sc->sc_espintr, sc->sc_espstat,

--- 42 unchanged lines hidden (view full) ---

2859 }
2860 break;
2861
2862 case NCR_CONNECTED:
2863 if ((sc->sc_flags & NCR_ICCS) != 0) {
2864 /* "Initiate Command Complete Steps" in progress */
2865 sc->sc_flags &= ~NCR_ICCS;
2866
2875 if (!(sc->sc_espintr & NCRINTR_DONE)) {
2867 if ((sc->sc_espintr & NCRINTR_DONE) == 0) {
2876 device_printf(sc->sc_dev, "ICCS: "
2877 ": [intr %x, stat %x, step %x]\n",
2878 sc->sc_espintr, sc->sc_espstat,
2879 sc->sc_espstep);
2880 }
2881 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2882 if (sc->sc_imlen < 2)
2883 device_printf(sc->sc_dev, "can't get status, "

--- 23 unchanged lines hidden (view full) ---

2907 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase);
2908 goto reset;
2909 }
2910
2911 /*
2912 * Driver is now in state NCR_CONNECTED, i.e. we
2913 * have a current command working the SCSI bus.
2914 */
2868 device_printf(sc->sc_dev, "ICCS: "
2869 ": [intr %x, stat %x, step %x]\n",
2870 sc->sc_espintr, sc->sc_espstat,
2871 sc->sc_espstep);
2872 }
2873 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
2874 if (sc->sc_imlen < 2)
2875 device_printf(sc->sc_dev, "can't get status, "

--- 23 unchanged lines hidden (view full) ---

2899 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase);
2900 goto reset;
2901 }
2902
2903 /*
2904 * Driver is now in state NCR_CONNECTED, i.e. we
2905 * have a current command working the SCSI bus.
2906 */
2915 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
2916 panic("ncr53c9x: no nexus");
2917 }
2907 if (sc->sc_state != NCR_CONNECTED || ecb == NULL)
2908 panic("%s: no nexus", __func__);
2918
2919 switch (sc->sc_phase) {
2920 case MESSAGE_OUT_PHASE:
2921 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2922 ncr53c9x_msgout(sc);
2923 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2924 break;
2925
2926 case MESSAGE_IN_PHASE:
2927msgin:
2928 NCR_PHASE(("MESSAGE_IN_PHASE "));
2929 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2930 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2909
2910 switch (sc->sc_phase) {
2911 case MESSAGE_OUT_PHASE:
2912 NCR_PHASE(("MESSAGE_OUT_PHASE "));
2913 ncr53c9x_msgout(sc);
2914 sc->sc_prevphase = MESSAGE_OUT_PHASE;
2915 break;
2916
2917 case MESSAGE_IN_PHASE:
2918msgin:
2919 NCR_PHASE(("MESSAGE_IN_PHASE "));
2920 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
2921 if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
2931 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
2922 (sc->sc_espstat2 & NCRFAS_STAT2_EMPTY) == 0) {
2932 NCRCMD(sc, NCRCMD_FLUSH);
2933 }
2934 sc->sc_flags |= NCR_WAITI;
2935 NCRCMD(sc, NCRCMD_TRANS);
2936 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2937 if ((sc->sc_flags & NCR_WAITI) == 0) {
2938 device_printf(sc->sc_dev, "MSGIN: unexpected "
2939 "FC bit: [intr %x, stat %x, step %x]\n",
2940 sc->sc_espintr, sc->sc_espstat,
2941 sc->sc_espstep);
2942 }
2943 sc->sc_flags &= ~NCR_WAITI;
2944 ncr53c9x_rdfifo(sc,
2945 (sc->sc_prevphase == sc->sc_phase) ?
2946 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2947 ncr53c9x_msgin(sc);
2923 NCRCMD(sc, NCRCMD_FLUSH);
2924 }
2925 sc->sc_flags |= NCR_WAITI;
2926 NCRCMD(sc, NCRCMD_TRANS);
2927 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
2928 if ((sc->sc_flags & NCR_WAITI) == 0) {
2929 device_printf(sc->sc_dev, "MSGIN: unexpected "
2930 "FC bit: [intr %x, stat %x, step %x]\n",
2931 sc->sc_espintr, sc->sc_espstat,
2932 sc->sc_espstep);
2933 }
2934 sc->sc_flags &= ~NCR_WAITI;
2935 ncr53c9x_rdfifo(sc,
2936 (sc->sc_prevphase == sc->sc_phase) ?
2937 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
2938 ncr53c9x_msgin(sc);
2948 } else {
2939 } else
2949 device_printf(sc->sc_dev, "MSGIN: weird bits: "
2950 "[intr %x, stat %x, step %x]\n",
2951 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2940 device_printf(sc->sc_dev, "MSGIN: weird bits: "
2941 "[intr %x, stat %x, step %x]\n",
2942 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
2952 }
2953 sc->sc_prevphase = MESSAGE_IN_PHASE;
2954 goto shortcut; /* i.e. expect data to be ready */
2955
2956 case COMMAND_PHASE:
2957 /*
2958 * Send the command block. Normally we don't see this
2959 * phase because the SEL_ATN command takes care of
2960 * all this. However, we end up here if either the
2961 * target or we wanted to exchange some more messages
2962 * first (e.g. to start negotiations).
2963 */
2964
2965 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2966 ecb->cmd.cmd.opcode, ecb->clen));
2967 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2968 NCRCMD(sc, NCRCMD_FLUSH);
2943 sc->sc_prevphase = MESSAGE_IN_PHASE;
2944 goto shortcut; /* i.e. expect data to be ready */
2945
2946 case COMMAND_PHASE:
2947 /*
2948 * Send the command block. Normally we don't see this
2949 * phase because the SEL_ATN command takes care of
2950 * all this. However, we end up here if either the
2951 * target or we wanted to exchange some more messages
2952 * first (e.g. to start negotiations).
2953 */
2954
2955 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
2956 ecb->cmd.cmd.opcode, ecb->clen));
2957 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
2958 NCRCMD(sc, NCRCMD_FLUSH);
2969/* DELAY(1);*/
2959#if 0
2960 DELAY(1);
2961#endif
2970 }
2971 /*
2972 * If we have more messages to send, e.g. WDTR or SDTR
2973 * after we've sent a TAG, set ATN so we'll go back to
2974 * MESSAGE_OUT_PHASE.
2975 */
2976 if (sc->sc_msgpriq) {
2977 NCRCMD(sc, NCRCMD_SETATN);
2978 sc->sc_flags |= NCR_ATN;
2979 }
2980 if (sc->sc_features & NCR_F_DMASELECT) {
2981 /* Setup DMA transfer for command. */
2982 size = ecb->clen;
2983 sc->sc_cmdlen = size;
2962 }
2963 /*
2964 * If we have more messages to send, e.g. WDTR or SDTR
2965 * after we've sent a TAG, set ATN so we'll go back to
2966 * MESSAGE_OUT_PHASE.
2967 */
2968 if (sc->sc_msgpriq) {
2969 NCRCMD(sc, NCRCMD_SETATN);
2970 sc->sc_flags |= NCR_ATN;
2971 }
2972 if (sc->sc_features & NCR_F_DMASELECT) {
2973 /* Setup DMA transfer for command. */
2974 size = ecb->clen;
2975 sc->sc_cmdlen = size;
2984 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
2976 sc->sc_cmdp = (void *)&ecb->cmd.cmd;
2985 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2986 0, &size);
2987 /* Program the SCSI counter. */
2988 NCR_SET_COUNT(sc, size);
2989
2990 /* Load the count in. */
2991 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
2992
2993 /* Start the command transfer. */
2994 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2995 NCRDMA_GO(sc);
2996 } else {
2977 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
2978 0, &size);
2979 /* Program the SCSI counter. */
2980 NCR_SET_COUNT(sc, size);
2981
2982 /* Load the count in. */
2983 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
2984
2985 /* Start the command transfer. */
2986 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
2987 NCRDMA_GO(sc);
2988 } else {
2997 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
2989 ncr53c9x_wrfifo(sc, (uint8_t *)&ecb->cmd.cmd,
2990 ecb->clen);
2998 NCRCMD(sc, NCRCMD_TRANS);
2999 }
3000 sc->sc_prevphase = COMMAND_PHASE;
3001 break;
3002
3003 case DATA_OUT_PHASE:
3004 NCR_PHASE(("DATA_OUT_PHASE [%ld] ", (long)sc->sc_dleft));
3005 NCRCMD(sc, NCRCMD_FLUSH);

--- 164 unchanged lines hidden (view full) ---

3170 printf("sync negotiation disabled\n");
3171 }
3172 }
3173}
3174
3175static void
3176ncr53c9x_watch(void *arg)
3177{
2991 NCRCMD(sc, NCRCMD_TRANS);
2992 }
2993 sc->sc_prevphase = COMMAND_PHASE;
2994 break;
2995
2996 case DATA_OUT_PHASE:
2997 NCR_PHASE(("DATA_OUT_PHASE [%ld] ", (long)sc->sc_dleft));
2998 NCRCMD(sc, NCRCMD_FLUSH);

--- 164 unchanged lines hidden (view full) ---

3163 printf("sync negotiation disabled\n");
3164 }
3165 }
3166}
3167
3168static void
3169ncr53c9x_watch(void *arg)
3170{
3178 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
3171 struct ncr53c9x_softc *sc = arg;
3179 struct ncr53c9x_linfo *li;
3180 struct ncr53c9x_tinfo *ti;
3181 time_t old;
3182 int t;
3183
3184 NCR_LOCK_ASSERT(sc, MA_OWNED);
3185
3186 /* Delete any structures that have not been used in 10min. */

--- 22 unchanged lines hidden --- 		3172 struct ncr53c9x_linfo *li;
3173 struct ncr53c9x_tinfo *ti;
3174 time_t old;
3175 int t;
3176
3177 NCR_LOCK_ASSERT(sc, MA_OWNED);
3178
3179 /* Delete any structures that have not been used in 10min. */

--- 22 unchanged lines hidden ---