1/*
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
| 1/*
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
|
27 * $Id: if_ed.c,v 1.96 1996/04/08 01:25:22 davidg Exp $
| 27 * $Id: if_ed.c,v 1.97 1996/04/23 18:36:54 nate Exp $
|
28 */
29
30/*
31 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
32 * adapters. By David Greenman, 29-April-1993
33 *
34 * Currently supports the Western Digital/SMC 8003 and 8013 series,
35 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
36 * and a variety of similar clones.
37 *
38 */
39
40#include "ed.h"
41#include "bpfilter.h"
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/conf.h>
46#include <sys/errno.h>
47#include <sys/ioctl.h>
48#include <sys/mbuf.h>
49#include <sys/socket.h>
50#include <sys/syslog.h>
51#include <sys/devconf.h>
52
53#include <net/if.h>
54#include <net/if_dl.h>
55#include <net/if_types.h>
56
57#ifdef INET
58#include <netinet/in.h>
59#include <netinet/in_systm.h>
60#include <netinet/in_var.h>
61#include <netinet/ip.h>
62#include <netinet/if_ether.h>
63#endif
64
65#ifdef IPX
66#include <netipx/ipx.h>
67#include <netipx/ipx_if.h>
68#endif
69
70#ifdef NS
71#include <netns/ns.h>
72#include <netns/ns_if.h>
73#endif
74
75#if NBPFILTER > 0
76#include <net/bpf.h>
77#include <net/bpfdesc.h>
78#endif
79
80#include <machine/clock.h>
81
82#include <i386/isa/isa.h>
83#include <i386/isa/isa_device.h>
84#include <i386/isa/icu.h>
85#include <i386/isa/if_edreg.h>
86
87/*
88 * ed_softc: per line info and status
89 */
90struct ed_softc {
91 struct arpcom arpcom; /* ethernet common */
92
93 char *type_str; /* pointer to type string */
94 u_char vendor; /* interface vendor */
95 u_char type; /* interface type code */
96 u_char gone; /* HW missing, presumed having a good time */
97
98 u_short asic_addr; /* ASIC I/O bus address */
99 u_short nic_addr; /* NIC (DS8390) I/O bus address */
100
101/*
102 * The following 'proto' variable is part of a work-around for 8013EBT asics
103 * being write-only. It's sort of a prototype/shadow of the real thing.
104 */
105 u_char wd_laar_proto;
106 u_char cr_proto;
107 u_char isa16bit; /* width of access to card 0=8 or 1=16 */
108 int is790; /* set by the probe code if the card is 790
109 * based */
110
111 caddr_t mem_start; /* NIC memory start address */
112 caddr_t mem_end; /* NIC memory end address */
113 u_long mem_size; /* total NIC memory size */
114 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
115
116 u_char mem_shared; /* NIC memory is shared with host */
117 u_char xmit_busy; /* transmitter is busy */
118 u_char txb_cnt; /* number of transmit buffers */
119 u_char txb_inuse; /* number of TX buffers currently in-use */
120
121 u_char txb_new; /* pointer to where new buffer will be added */
122 u_char txb_next_tx; /* pointer to next buffer ready to xmit */
123 u_short txb_len[8]; /* buffered xmit buffer lengths */
124 u_char tx_page_start; /* first page of TX buffer area */
125 u_char rec_page_start; /* first page of RX ring-buffer */
126 u_char rec_page_stop; /* last page of RX ring-buffer */
127 u_char next_packet; /* pointer to next unread RX packet */
128 struct kern_devconf kdc; /* kernel configuration database info */
129};
130
131static struct ed_softc ed_softc[NED];
132
| 28 */
29
30/*
31 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
32 * adapters. By David Greenman, 29-April-1993
33 *
34 * Currently supports the Western Digital/SMC 8003 and 8013 series,
35 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
36 * and a variety of similar clones.
37 *
38 */
39
40#include "ed.h"
41#include "bpfilter.h"
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/conf.h>
46#include <sys/errno.h>
47#include <sys/ioctl.h>
48#include <sys/mbuf.h>
49#include <sys/socket.h>
50#include <sys/syslog.h>
51#include <sys/devconf.h>
52
53#include <net/if.h>
54#include <net/if_dl.h>
55#include <net/if_types.h>
56
57#ifdef INET
58#include <netinet/in.h>
59#include <netinet/in_systm.h>
60#include <netinet/in_var.h>
61#include <netinet/ip.h>
62#include <netinet/if_ether.h>
63#endif
64
65#ifdef IPX
66#include <netipx/ipx.h>
67#include <netipx/ipx_if.h>
68#endif
69
70#ifdef NS
71#include <netns/ns.h>
72#include <netns/ns_if.h>
73#endif
74
75#if NBPFILTER > 0
76#include <net/bpf.h>
77#include <net/bpfdesc.h>
78#endif
79
80#include <machine/clock.h>
81
82#include <i386/isa/isa.h>
83#include <i386/isa/isa_device.h>
84#include <i386/isa/icu.h>
85#include <i386/isa/if_edreg.h>
86
87/*
88 * ed_softc: per line info and status
89 */
90struct ed_softc {
91 struct arpcom arpcom; /* ethernet common */
92
93 char *type_str; /* pointer to type string */
94 u_char vendor; /* interface vendor */
95 u_char type; /* interface type code */
96 u_char gone; /* HW missing, presumed having a good time */
97
98 u_short asic_addr; /* ASIC I/O bus address */
99 u_short nic_addr; /* NIC (DS8390) I/O bus address */
100
101/*
102 * The following 'proto' variable is part of a work-around for 8013EBT asics
103 * being write-only. It's sort of a prototype/shadow of the real thing.
104 */
105 u_char wd_laar_proto;
106 u_char cr_proto;
107 u_char isa16bit; /* width of access to card 0=8 or 1=16 */
108 int is790; /* set by the probe code if the card is 790
109 * based */
110
111 caddr_t mem_start; /* NIC memory start address */
112 caddr_t mem_end; /* NIC memory end address */
113 u_long mem_size; /* total NIC memory size */
114 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
115
116 u_char mem_shared; /* NIC memory is shared with host */
117 u_char xmit_busy; /* transmitter is busy */
118 u_char txb_cnt; /* number of transmit buffers */
119 u_char txb_inuse; /* number of TX buffers currently in-use */
120
121 u_char txb_new; /* pointer to where new buffer will be added */
122 u_char txb_next_tx; /* pointer to next buffer ready to xmit */
123 u_short txb_len[8]; /* buffered xmit buffer lengths */
124 u_char tx_page_start; /* first page of TX buffer area */
125 u_char rec_page_start; /* first page of RX ring-buffer */
126 u_char rec_page_stop; /* last page of RX ring-buffer */
127 u_char next_packet; /* pointer to next unread RX packet */
128 struct kern_devconf kdc; /* kernel configuration database info */
129};
130
131static struct ed_softc ed_softc[NED];
132
|
133static int ed_attach __P((struct isa_device *));
| 133static int ed_attach __P((struct ed_softc *, int, int));
134static int ed_attach_isa __P((struct isa_device *));
135
|
134static void ed_init __P((struct ifnet *));
135static int ed_ioctl __P((struct ifnet *, int, caddr_t));
136static int ed_probe __P((struct isa_device *));
137static void ed_start __P((struct ifnet *));
138static void ed_reset __P((struct ifnet *));
139static void ed_watchdog __P((struct ifnet *));
140
141static void ed_stop __P((struct ed_softc *));
142static int ed_probe_generic8390 __P((struct ed_softc *));
143static int ed_probe_WD80x3 __P((struct isa_device *));
144static int ed_probe_3Com __P((struct isa_device *));
145static int ed_probe_Novell __P((struct isa_device *));
| 136static void ed_init __P((struct ifnet *));
137static int ed_ioctl __P((struct ifnet *, int, caddr_t));
138static int ed_probe __P((struct isa_device *));
139static void ed_start __P((struct ifnet *));
140static void ed_reset __P((struct ifnet *));
141static void ed_watchdog __P((struct ifnet *));
142
143static void ed_stop __P((struct ed_softc *));
144static int ed_probe_generic8390 __P((struct ed_softc *));
145static int ed_probe_WD80x3 __P((struct isa_device *));
146static int ed_probe_3Com __P((struct isa_device *));
147static int ed_probe_Novell __P((struct isa_device *));
|
| 148static int ed_probe_Novell_generic __P((struct ed_softc *, int, int, int));
149
150#include "pci.h"
151#if NPCI > 0
152void *ed_attach_NE2000_pci __P((int, int));
153#endif
154
155#include "crd.h"
156#if NCRD > 0
|
146static int ed_probe_pccard __P((struct isa_device *, u_char *));
| 157static int ed_probe_pccard __P((struct isa_device *, u_char *));
|
| 158#endif
|
147
148static void ds_getmcaf __P((struct ed_softc *, u_long *));
149
150static void ed_get_packet(struct ed_softc *, char *, /* u_short */ int, int);
151
152static void ed_rint __P((struct ed_softc *));
153static void ed_xmit __P((struct ed_softc *));
154static char * ed_ring_copy __P((struct ed_softc *, char *, char *,
155 /* u_short */ int));
156
157static void ed_pio_readmem __P((struct ed_softc *, int, unsigned char *,
158 /* u_short */ int));
159static void ed_pio_writemem __P((struct ed_softc *, char *,
160 /* u_short */ int, /* u_short */ int));
161static u_short ed_pio_write_mbufs __P((struct ed_softc *, struct mbuf *,
162 int));
163
164static void ed_setrcr(struct ed_softc *);
165static u_long ds_crc(u_char *ep);
166
| 159
160static void ds_getmcaf __P((struct ed_softc *, u_long *));
161
162static void ed_get_packet(struct ed_softc *, char *, /* u_short */ int, int);
163
164static void ed_rint __P((struct ed_softc *));
165static void ed_xmit __P((struct ed_softc *));
166static char * ed_ring_copy __P((struct ed_softc *, char *, char *,
167 /* u_short */ int));
168
169static void ed_pio_readmem __P((struct ed_softc *, int, unsigned char *,
170 /* u_short */ int));
171static void ed_pio_writemem __P((struct ed_softc *, char *,
172 /* u_short */ int, /* u_short */ int));
173static u_short ed_pio_write_mbufs __P((struct ed_softc *, struct mbuf *,
174 int));
175
176static void ed_setrcr(struct ed_softc *);
177static u_long ds_crc(u_char *ep);
178
|
167#include "crd.h"
| |
168#if NCRD > 0
169#include <sys/select.h>
170#include <pccard/card.h>
171#include <pccard/driver.h>
172#include <pccard/slot.h>
173
174/*
175 * PC-Card (PCMCIA) specific code.
176 */
177static int card_intr(struct pccard_dev *); /* Interrupt handler */
178static void edunload(struct pccard_dev *); /* Disable driver */
179static void edsuspend(struct pccard_dev *); /* Suspend driver */
180static int edinit(struct pccard_dev *, int); /* init device */
181
182static struct pccard_drv ed_info = {
183 "ed",
184 card_intr,
185 edunload,
186 edsuspend,
187 edinit,
188 0, /* Attributes - presently unused */
189 &net_imask /* Interrupt mask for device */
190 /* XXX - Should this also include net_imask? */
191};
192
193/*
194 * Called when a power down is requested. Shuts down the
195 * device and configures the device as unavailable (but
196 * still loaded...). A resume is done by calling
197 * edinit with first=0. This is called when the user suspends
198 * the system, or the APM code suspends the system.
199 */
200static void
201edsuspend(struct pccard_dev *dp)
202{
203 printf("ed%d: suspending\n", dp->isahd.id_unit);
204}
205
206/*
207 * Initialize the device - called from Slot manager.
208 * If first is set, then check for the device's existence
209 * before initializing it. Once initialized, the device table may
210 * be set up.
211 */
212static int
213edinit(struct pccard_dev *dp, int first)
214{
215 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit];
216
217 /* validate unit number. */
218 if (first) {
219 if (dp->isahd.id_unit >= NED)
220 return(ENODEV);
221 /*
222 * Probe the device. If a value is returned, the
223 * device was found at the location.
224 */
225 sc->gone = 0;
226 if (ed_probe_pccard(&dp->isahd,dp->misc)==0)
227 return(ENXIO);
| 179#if NCRD > 0
180#include <sys/select.h>
181#include <pccard/card.h>
182#include <pccard/driver.h>
183#include <pccard/slot.h>
184
185/*
186 * PC-Card (PCMCIA) specific code.
187 */
188static int card_intr(struct pccard_dev *); /* Interrupt handler */
189static void edunload(struct pccard_dev *); /* Disable driver */
190static void edsuspend(struct pccard_dev *); /* Suspend driver */
191static int edinit(struct pccard_dev *, int); /* init device */
192
193static struct pccard_drv ed_info = {
194 "ed",
195 card_intr,
196 edunload,
197 edsuspend,
198 edinit,
199 0, /* Attributes - presently unused */
200 &net_imask /* Interrupt mask for device */
201 /* XXX - Should this also include net_imask? */
202};
203
204/*
205 * Called when a power down is requested. Shuts down the
206 * device and configures the device as unavailable (but
207 * still loaded...). A resume is done by calling
208 * edinit with first=0. This is called when the user suspends
209 * the system, or the APM code suspends the system.
210 */
211static void
212edsuspend(struct pccard_dev *dp)
213{
214 printf("ed%d: suspending\n", dp->isahd.id_unit);
215}
216
217/*
218 * Initialize the device - called from Slot manager.
219 * If first is set, then check for the device's existence
220 * before initializing it. Once initialized, the device table may
221 * be set up.
222 */
223static int
224edinit(struct pccard_dev *dp, int first)
225{
226 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit];
227
228 /* validate unit number. */
229 if (first) {
230 if (dp->isahd.id_unit >= NED)
231 return(ENODEV);
232 /*
233 * Probe the device. If a value is returned, the
234 * device was found at the location.
235 */
236 sc->gone = 0;
237 if (ed_probe_pccard(&dp->isahd,dp->misc)==0)
238 return(ENXIO);
|
228 if (ed_attach(&dp->isahd)==0)
| 239 if (ed_attach_isa(&dp->isahd)==0)
|
229 return(ENXIO);
230 }
231 /*
232 * XXX TODO:
233 * If it was initialized before, the device structure
234 * should also be initialized. We should
235 * reset (and possibly restart) the hardware, but
236 * I am not sure of the best way to do this...
237 */
238 return(0);
239}
240
241/*
242 * edunload - unload the driver and clear the table.
243 * XXX TODO:
244 * This is usually called when the card is ejected, but
245 * can be caused by a modunload of a controller driver.
246 * The idea is to reset the driver's view of the device
247 * and ensure that any driver entry points such as
248 * read and write do not hang.
249 */
250static void
251edunload(struct pccard_dev *dp)
252{
253 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit];
254 struct ifnet *ifp = &sc->arpcom.ac_if;
255
256 if (sc->kdc.kdc_state == DC_UNCONFIGURED) {
257 printf("ed%d: already unloaded\n", dp->isahd.id_unit);
258 return;
259 }
260 sc->kdc.kdc_state = DC_UNCONFIGURED;
261 ifp->if_flags &= ~IFF_RUNNING;
262 if_down(ifp);
263 sc->gone = 1;
264 printf("ed%d: unload\n", dp->isahd.id_unit);
265}
266
267/*
268 * card_intr - Shared interrupt called from
269 * front end of PC-Card handler.
270 */
271static int
272card_intr(struct pccard_dev *dp)
273{
| 240 return(ENXIO);
241 }
242 /*
243 * XXX TODO:
244 * If it was initialized before, the device structure
245 * should also be initialized. We should
246 * reset (and possibly restart) the hardware, but
247 * I am not sure of the best way to do this...
248 */
249 return(0);
250}
251
252/*
253 * edunload - unload the driver and clear the table.
254 * XXX TODO:
255 * This is usually called when the card is ejected, but
256 * can be caused by a modunload of a controller driver.
257 * The idea is to reset the driver's view of the device
258 * and ensure that any driver entry points such as
259 * read and write do not hang.
260 */
261static void
262edunload(struct pccard_dev *dp)
263{
264 struct ed_softc *sc = &ed_softc[dp->isahd.id_unit];
265 struct ifnet *ifp = &sc->arpcom.ac_if;
266
267 if (sc->kdc.kdc_state == DC_UNCONFIGURED) {
268 printf("ed%d: already unloaded\n", dp->isahd.id_unit);
269 return;
270 }
271 sc->kdc.kdc_state = DC_UNCONFIGURED;
272 ifp->if_flags &= ~IFF_RUNNING;
273 if_down(ifp);
274 sc->gone = 1;
275 printf("ed%d: unload\n", dp->isahd.id_unit);
276}
277
278/*
279 * card_intr - Shared interrupt called from
280 * front end of PC-Card handler.
281 */
282static int
283card_intr(struct pccard_dev *dp)
284{
|
274 edintr(dp->isahd.id_unit);
| 285 edintr_sc(&ed_softc[dp->isahd.id_unit]);
|
275 return(1);
276}
277#endif /* NCRD > 0 */
278
279struct isa_driver eddriver = {
280 ed_probe,
| 286 return(1);
287}
288#endif /* NCRD > 0 */
289
290struct isa_driver eddriver = {
291 ed_probe,
|
281 ed_attach,
| 292 ed_attach_isa,
|
282 "ed",
283 1 /* We are ultra sensitive */
284};
285
286/*
287 * Interrupt conversion table for WD/SMC ASIC/83C584
288 * (IRQ* are defined in icu.h)
289 */
290static unsigned short ed_intr_mask[] = {
291 IRQ9,
292 IRQ3,
293 IRQ5,
294 IRQ7,
295 IRQ10,
296 IRQ11,
297 IRQ15,
298 IRQ4
299};
300
301/*
302 * Interrupt conversion table for 83C790
303 */
304static unsigned short ed_790_intr_mask[] = {
305 0,
306 IRQ9,
307 IRQ3,
308 IRQ5,
309 IRQ7,
310 IRQ10,
311 IRQ11,
312 IRQ15
313};
314
315#define ETHER_MIN_LEN 60
316#define ETHER_MAX_LEN 1514
317#define ETHER_ADDR_LEN 6
318#define ETHER_HDR_SIZE 14
319
320static struct kern_devconf kdc_ed_template = {
321 0, 0, 0, /* filled in by dev_attach */
322 "ed", 0, { MDDT_ISA, 0, "net" },
323 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN,
324 &kdc_isa0, /* parent */
325 0, /* parentdata */
326 DC_UNCONFIGURED, /* state */
327 "", /* description */
328 DC_CLS_NETIF /* class */
329};
330
331static inline void
332ed_registerdev(struct isa_device *id, const char *descr)
333{
334 struct kern_devconf *kdc = &ed_softc[id->id_unit].kdc;
335 *kdc = kdc_ed_template;
336 kdc->kdc_unit = id->id_unit;
337 kdc->kdc_parentdata = id;
338 kdc->kdc_description = descr;
339 dev_attach(kdc);
340}
341
342/*
343 * Determine if the device is present
344 *
345 * on entry:
346 * a pointer to an isa_device struct
347 * on exit:
348 * NULL if device not found
349 * or # of i/o addresses used (if found)
350 */
351static int
352ed_probe(isa_dev)
353 struct isa_device *isa_dev;
354{
355 int nports;
356
357#if NCRD > 0
358 /*
359 * If PC-Card probe required, then register driver with
360 * slot manager.
361 */
362 pccard_add_driver(&ed_info);
363#endif
364
365#ifndef DEV_LKM
366 ed_registerdev(isa_dev, "Ethernet adapter");
367#endif /* not DEV_LKM */
368
369 nports = ed_probe_WD80x3(isa_dev);
370 if (nports)
371 return (nports);
372
373 nports = ed_probe_3Com(isa_dev);
374 if (nports)
375 return (nports);
376
377 nports = ed_probe_Novell(isa_dev);
378 if (nports)
379 return (nports);
380
381 return (0);
382}
383
384/*
385 * Generic probe routine for testing for the existance of a DS8390.
386 * Must be called after the NIC has just been reset. This routine
387 * works by looking at certain register values that are guaranteed
388 * to be initialized a certain way after power-up or reset. Seems
389 * not to currently work on the 83C690.
390 *
391 * Specifically:
392 *
393 * Register reset bits set bits
394 * Command Register (CR) TXP, STA RD2, STP
395 * Interrupt Status (ISR) RST
396 * Interrupt Mask (IMR) All bits
397 * Data Control (DCR) LAS
398 * Transmit Config. (TCR) LB1, LB0
399 *
400 * We only look at the CR and ISR registers, however, because looking at
401 * the others would require changing register pages (which would be
402 * intrusive if this isn't an 8390).
403 *
404 * Return 1 if 8390 was found, 0 if not.
405 */
406
407static int
408ed_probe_generic8390(sc)
409 struct ed_softc *sc;
410{
411 if ((inb(sc->nic_addr + ED_P0_CR) &
412 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
413 (ED_CR_RD2 | ED_CR_STP))
414 return (0);
415 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
416 return (0);
417
418 return (1);
419}
420
421/*
422 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards
423 */
424static int
425ed_probe_WD80x3(isa_dev)
426 struct isa_device *isa_dev;
427{
428 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
429 int i;
430 u_int memsize;
431 u_char iptr, isa16bit, sum;
432
433 sc->asic_addr = isa_dev->id_iobase;
434 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET;
435 sc->is790 = 0;
436
437#ifdef TOSH_ETHER
438 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW);
439 DELAY(10000);
440#endif
441
442 /*
443 * Attempt to do a checksum over the station address PROM. If it
444 * fails, it's probably not a SMC/WD board. There is a problem with
445 * this, though: some clone WD boards don't pass the checksum test.
446 * Danpex boards for one.
447 */
448 for (sum = 0, i = 0; i < 8; ++i)
449 sum += inb(sc->asic_addr + ED_WD_PROM + i);
450
451 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) {
452
453 /*
454 * Checksum is invalid. This often happens with cheap WD8003E
455 * clones. In this case, the checksum byte (the eighth byte)
456 * seems to always be zero.
457 */
458 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
459 inb(sc->asic_addr + ED_WD_PROM + 7) != 0)
460 return (0);
461 }
462 /* reset card to force it into a known state. */
463#ifdef TOSH_ETHER
464 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
465#else
466 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST);
467#endif
468 DELAY(100);
469 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST);
470 /* wait in the case this card is reading it's EEROM */
471 DELAY(5000);
472
473 sc->vendor = ED_VENDOR_WD_SMC;
474 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID);
475
476 /*
477 * Set initial values for width/size.
478 */
479 memsize = 8192;
480 isa16bit = 0;
481 switch (sc->type) {
482 case ED_TYPE_WD8003S:
483 sc->type_str = "WD8003S";
484 sc->kdc.kdc_description = "Ethernet adapter: WD 8003S";
485 break;
486 case ED_TYPE_WD8003E:
487 sc->type_str = "WD8003E";
488 sc->kdc.kdc_description = "Ethernet adapter: WD 8003E";
489 break;
490 case ED_TYPE_WD8003EB:
491 sc->type_str = "WD8003EB";
492 sc->kdc.kdc_description = "Ethernet adapter: WD 8003EB";
493 break;
494 case ED_TYPE_WD8003W:
495 sc->type_str = "WD8003W";
496 sc->kdc.kdc_description = "Ethernet adapter: WD 8003W";
497 break;
498 case ED_TYPE_WD8013EBT:
499 sc->type_str = "WD8013EBT";
500 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBT";
501 memsize = 16384;
502 isa16bit = 1;
503 break;
504 case ED_TYPE_WD8013W:
505 sc->type_str = "WD8013W";
506 sc->kdc.kdc_description = "Ethernet adapter: WD 8013W";
507 memsize = 16384;
508 isa16bit = 1;
509 break;
510 case ED_TYPE_WD8013EP: /* also WD8003EP */
511 if (inb(sc->asic_addr + ED_WD_ICR)
512 & ED_WD_ICR_16BIT) {
513 isa16bit = 1;
514 memsize = 16384;
515 sc->type_str = "WD8013EP";
516 sc->kdc.kdc_description =
517 "Ethernet adapter: WD 8013EP";
518 } else {
519 sc->type_str = "WD8003EP";
520 sc->kdc.kdc_description =
521 "Ethernet adapter: WD 8003EP";
522 }
523 break;
524 case ED_TYPE_WD8013WC:
525 sc->type_str = "WD8013WC";
526 sc->kdc.kdc_description = "Ethernet adapter: WD 8013WC";
527 memsize = 16384;
528 isa16bit = 1;
529 break;
530 case ED_TYPE_WD8013EBP:
531 sc->type_str = "WD8013EBP";
532 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBP";
533 memsize = 16384;
534 isa16bit = 1;
535 break;
536 case ED_TYPE_WD8013EPC:
537 sc->type_str = "WD8013EPC";
538 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EPC";
539 memsize = 16384;
540 isa16bit = 1;
541 break;
542 case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */
543 case ED_TYPE_SMC8216T:
544 if (sc->type == ED_TYPE_SMC8216C) {
545 sc->type_str = "SMC8216/SMC8216C";
546 sc->kdc.kdc_description =
547 "Ethernet adapter: SMC 8216 or 8216C";
548 } else {
549 sc->type_str = "SMC8216T";
550 sc->kdc.kdc_description =
551 "Ethernet adapter: SMC 8216T";
552 }
553
554 outb(sc->asic_addr + ED_WD790_HWR,
555 inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH);
556 switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
557 case ED_WD790_RAR_SZ64:
558 memsize = 65536;
559 break;
560 case ED_WD790_RAR_SZ32:
561 memsize = 32768;
562 break;
563 case ED_WD790_RAR_SZ16:
564 memsize = 16384;
565 break;
566 case ED_WD790_RAR_SZ8:
567 /* 8216 has 16K shared mem -- 8416 has 8K */
568 if (sc->type == ED_TYPE_SMC8216C) {
569 sc->type_str = "SMC8416C/SMC8416BT";
570 sc->kdc.kdc_description =
571 "Ethernet adapter: SMC 8416C or 8416BT";
572 } else {
573 sc->type_str = "SMC8416T";
574 sc->kdc.kdc_description =
575 "Ethernet adapter: SMC 8416T";
576 }
577 memsize = 8192;
578 break;
579 }
580 outb(sc->asic_addr + ED_WD790_HWR,
581 inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
582
583 isa16bit = 1;
584 sc->is790 = 1;
585 break;
586#ifdef TOSH_ETHER
587 case ED_TYPE_TOSHIBA1:
588 sc->type_str = "Toshiba1";
589 sc->kdc.kdc_description = "Ethernet adapter: Toshiba1";
590 memsize = 32768;
591 isa16bit = 1;
592 break;
593 case ED_TYPE_TOSHIBA4:
594 sc->type_str = "Toshiba4";
595 sc->kdc.kdc_description = "Ethernet adapter: Toshiba4";
596 memsize = 32768;
597 isa16bit = 1;
598 break;
599#endif
600 default:
601 sc->type_str = "";
602 break;
603 }
604
605 /*
606 * Make some adjustments to initial values depending on what is found
607 * in the ICR.
608 */
609 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
610#ifdef TOSH_ETHER
611 && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
612#endif
613 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
614 isa16bit = 0;
615 memsize = 8192;
616 }
617
618#if ED_DEBUG
619 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
620 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
621 for (i = 0; i < 8; i++)
622 printf("%x -> %x\n", i, inb(sc->asic_addr + i));
623#endif
624
625 /*
626 * Allow the user to override the autoconfiguration
627 */
628 if (isa_dev->id_msize)
629 memsize = isa_dev->id_msize;
630
631 /*
632 * (note that if the user specifies both of the following flags that
633 * '8bit' mode intentionally has precedence)
634 */
635 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE)
636 isa16bit = 1;
637 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE)
638 isa16bit = 0;
639
640 /*
641 * If possible, get the assigned interrupt number from the card and
642 * use it.
643 */
644 if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) {
645
646 /*
647 * Assemble together the encoded interrupt number.
648 */
649 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) |
650 ((inb(isa_dev->id_iobase + ED_WD_IRR) &
651 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
652
653 /*
654 * If no interrupt specified (or "?"), use what the board tells us.
655 */
656 if (isa_dev->id_irq <= 0)
657 isa_dev->id_irq = ed_intr_mask[iptr];
658
659 /*
660 * Enable the interrupt.
661 */
662 outb(isa_dev->id_iobase + ED_WD_IRR,
663 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN);
664 }
665 if (sc->is790) {
666 outb(isa_dev->id_iobase + ED_WD790_HWR,
667 inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH);
668 iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) |
669 (inb(isa_dev->id_iobase + ED_WD790_GCR) &
670 (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2);
671 outb(isa_dev->id_iobase + ED_WD790_HWR,
672 inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
673
674 /*
675 * If no interrupt specified (or "?"), use what the board tells us.
676 */
677 if (isa_dev->id_irq <= 0)
678 isa_dev->id_irq = ed_790_intr_mask[iptr];
679
680 /*
681 * Enable interrupts.
682 */
683 outb(isa_dev->id_iobase + ED_WD790_ICR,
684 inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL);
685 }
686 if (isa_dev->id_irq <= 0) {
687 printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n",
688 isa_dev->id_unit, sc->type_str);
689 return (0);
690 }
691 sc->isa16bit = isa16bit;
692 sc->mem_shared = 1;
693 isa_dev->id_msize = memsize;
694 sc->mem_start = (caddr_t) isa_dev->id_maddr;
695
696 /*
697 * allocate one xmit buffer if < 16k, two buffers otherwise
698 */
699 if ((memsize < 16384) ||
700 (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) {
701 sc->txb_cnt = 1;
702 } else {
703 sc->txb_cnt = 2;
704 }
705 sc->tx_page_start = ED_WD_PAGE_OFFSET;
706 sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt;
707 sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE;
708 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start);
709 sc->mem_size = memsize;
710 sc->mem_end = sc->mem_start + memsize;
711
712 /*
713 * Get station address from on-board ROM
714 */
715 for (i = 0; i < ETHER_ADDR_LEN; ++i)
716 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i);
717
718 /*
719 * Set upper address bits and 8/16 bit access to shared memory
720 */
721 if (isa16bit) {
722 if (sc->is790) {
723 sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR);
724 outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN);
725 } else {
726 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
727 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN |
728 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
729 }
730 } else {
731 if (((sc->type & ED_WD_SOFTCONFIG) ||
732#ifdef TOSH_ETHER
733 (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) ||
734#endif
735 (sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) {
736 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
737 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
738 }
739 }
740
741 /*
742 * Set address and enable interface shared memory.
743 */
744 if (!sc->is790) {
745#ifdef TOSH_ETHER
746 outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4);
747 outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f));
748 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW);
749
750#else
751 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) &
752 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
753#endif
754 sc->cr_proto = ED_CR_RD2;
755 } else {
756 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
757 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH));
758 outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) |
759 ((kvtop(sc->mem_start) >> 11) & 0x40) |
760 (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0));
761 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH));
762 sc->cr_proto = 0;
763 }
764
765#if 0
766 printf("starting memory performance test at 0x%x, size %d...\n",
767 sc->mem_start, memsize*16384);
768 for (i = 0; i < 16384; i++)
769 bzero(sc->mem_start, memsize);
770 printf("***DONE***\n");
771#endif
772
773 /*
774 * Now zero memory and verify that it is clear
775 */
776 bzero(sc->mem_start, memsize);
777
778 for (i = 0; i < memsize; ++i) {
779 if (sc->mem_start[i]) {
780 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
781 isa_dev->id_unit, kvtop(sc->mem_start + i));
782
783 /*
784 * Disable 16 bit access to shared memory
785 */
786 if (isa16bit) {
787 if (sc->is790) {
788 outb(sc->asic_addr + ED_WD_MSR, 0x00);
789 }
790 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
791 ~ED_WD_LAAR_M16EN));
792 }
793 return (0);
794 }
795 }
796
797 /*
798 * Disable 16bit access to shared memory - we leave it
799 * disabled so that 1) machines reboot properly when the board
800 * is set 16 bit mode and there are conflicting 8bit
801 * devices/ROMS in the same 128k address space as this boards
802 * shared memory. and 2) so that other 8 bit devices with
803 * shared memory can be used in this 128k region, too.
804 */
805 if (isa16bit) {
806 if (sc->is790) {
807 outb(sc->asic_addr + ED_WD_MSR, 0x00);
808 }
809 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
810 ~ED_WD_LAAR_M16EN));
811 }
812 return (ED_WD_IO_PORTS);
813}
814
815/*
816 * Probe and vendor-specific initialization routine for 3Com 3c503 boards
817 */
818static int
819ed_probe_3Com(isa_dev)
820 struct isa_device *isa_dev;
821{
822 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
823 int i;
824 u_int memsize;
825 u_char isa16bit;
826
827 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET;
828 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET;
829
830 /*
831 * Verify that the kernel configured I/O address matches the board
832 * configured address
833 */
834 switch (inb(sc->asic_addr + ED_3COM_BCFR)) {
835 case ED_3COM_BCFR_300:
836 if (isa_dev->id_iobase != 0x300)
837 return (0);
838 break;
839 case ED_3COM_BCFR_310:
840 if (isa_dev->id_iobase != 0x310)
841 return (0);
842 break;
843 case ED_3COM_BCFR_330:
844 if (isa_dev->id_iobase != 0x330)
845 return (0);
846 break;
847 case ED_3COM_BCFR_350:
848 if (isa_dev->id_iobase != 0x350)
849 return (0);
850 break;
851 case ED_3COM_BCFR_250:
852 if (isa_dev->id_iobase != 0x250)
853 return (0);
854 break;
855 case ED_3COM_BCFR_280:
856 if (isa_dev->id_iobase != 0x280)
857 return (0);
858 break;
859 case ED_3COM_BCFR_2A0:
860 if (isa_dev->id_iobase != 0x2a0)
861 return (0);
862 break;
863 case ED_3COM_BCFR_2E0:
864 if (isa_dev->id_iobase != 0x2e0)
865 return (0);
866 break;
867 default:
868 return (0);
869 }
870
871 /*
872 * Verify that the kernel shared memory address matches the board
873 * configured address.
874 */
875 switch (inb(sc->asic_addr + ED_3COM_PCFR)) {
876 case ED_3COM_PCFR_DC000:
877 if (kvtop(isa_dev->id_maddr) != 0xdc000)
878 return (0);
879 break;
880 case ED_3COM_PCFR_D8000:
881 if (kvtop(isa_dev->id_maddr) != 0xd8000)
882 return (0);
883 break;
884 case ED_3COM_PCFR_CC000:
885 if (kvtop(isa_dev->id_maddr) != 0xcc000)
886 return (0);
887 break;
888 case ED_3COM_PCFR_C8000:
889 if (kvtop(isa_dev->id_maddr) != 0xc8000)
890 return (0);
891 break;
892 default:
893 return (0);
894 }
895
896
897 /*
898 * Reset NIC and ASIC. Enable on-board transceiver throughout reset
899 * sequence because it'll lock up if the cable isn't connected if we
900 * don't.
901 */
902 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL);
903
904 /*
905 * Wait for a while, then un-reset it
906 */
907 DELAY(50);
908
909 /*
910 * The 3Com ASIC defaults to rather strange settings for the CR after
911 * a reset - it's important to set it again after the following outb
912 * (this is done when we map the PROM below).
913 */
914 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
915
916 /*
917 * Wait a bit for the NIC to recover from the reset
918 */
919 DELAY(5000);
920
921 sc->vendor = ED_VENDOR_3COM;
922 sc->type_str = "3c503";
923 sc->kdc.kdc_description = "Ethernet adapter: 3c503";
924 sc->mem_shared = 1;
925 sc->cr_proto = ED_CR_RD2;
926
927 /*
928 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window
929 * to it.
930 */
931 memsize = 8192;
932
933 /*
934 * Get station address from on-board ROM
935 */
936
937 /*
938 * First, map ethernet address PROM over the top of where the NIC
939 * registers normally appear.
940 */
941 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
942
943 for (i = 0; i < ETHER_ADDR_LEN; ++i)
944 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
945
946 /*
947 * Unmap PROM - select NIC registers. The proper setting of the
948 * tranceiver is set in ed_init so that the attach code is given a
949 * chance to set the default based on a compile-time config option
950 */
951 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
952
953 /*
954 * Determine if this is an 8bit or 16bit board
955 */
956
957 /*
958 * select page 0 registers
959 */
960 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
961
962 /*
963 * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit
964 * board.
965 */
966 outb(sc->nic_addr + ED_P0_DCR, 0);
967
968 /*
969 * select page 2 registers
970 */
971 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP);
972
973 /*
974 * The 3c503 forces the WTS bit to a one if this is a 16bit board
975 */
976 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS)
977 isa16bit = 1;
978 else
979 isa16bit = 0;
980
981 /*
982 * select page 0 registers
983 */
984 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP);
985
986 sc->mem_start = (caddr_t) isa_dev->id_maddr;
987 sc->mem_size = memsize;
988 sc->mem_end = sc->mem_start + memsize;
989
990 /*
991 * We have an entire 8k window to put the transmit buffers on the
992 * 16bit boards. But since the 16bit 3c503's shared memory is only
993 * fast enough to overlap the loading of one full-size packet, trying
994 * to load more than 2 buffers can actually leave the transmitter idle
995 * during the load. So 2 seems the best value. (Although a mix of
996 * variable-sized packets might change this assumption. Nonetheless,
997 * we optimize for linear transfers of same-size packets.)
998 */
999 if (isa16bit) {
1000 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)
1001 sc->txb_cnt = 1;
1002 else
1003 sc->txb_cnt = 2;
1004
1005 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
1006 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
1007 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
1008 ED_3COM_RX_PAGE_OFFSET_16BIT;
1009 sc->mem_ring = sc->mem_start;
1010 } else {
1011 sc->txb_cnt = 1;
1012 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
1013 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
1014 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
1015 ED_3COM_TX_PAGE_OFFSET_8BIT;
1016 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
1017 }
1018
1019 sc->isa16bit = isa16bit;
1020
1021 /*
1022 * Initialize GA page start/stop registers. Probably only needed if
1023 * doing DMA, but what the hell.
1024 */
1025 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start);
1026 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop);
1027
1028 /*
1029 * Set IRQ. 3c503 only allows a choice of irq 2-5.
1030 */
1031 switch (isa_dev->id_irq) {
1032 case IRQ2:
1033 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2);
1034 break;
1035 case IRQ3:
1036 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3);
1037 break;
1038 case IRQ4:
1039 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4);
1040 break;
1041 case IRQ5:
1042 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
1043 break;
1044 default:
1045 printf("ed%d: Invalid irq configuration (%d) must be 3-5,9 for 3c503\n",
1046 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
1047 return (0);
1048 }
1049
1050 /*
1051 * Initialize GA configuration register. Set bank and enable shared
1052 * mem.
1053 */
1054 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL |
1055 ED_3COM_GACFR_MBS0);
1056
1057 /*
1058 * Initialize "Vector Pointer" registers. These gawd-awful things are
1059 * compared to 20 bits of the address on ISA, and if they match, the
1060 * shared memory is disabled. We set them to 0xffff0...allegedly the
1061 * reset vector.
1062 */
1063 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff);
1064 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff);
1065 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00);
1066
1067 /*
1068 * Zero memory and verify that it is clear
1069 */
1070 bzero(sc->mem_start, memsize);
1071
1072 for (i = 0; i < memsize; ++i)
1073 if (sc->mem_start[i]) {
1074 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
1075 isa_dev->id_unit, kvtop(sc->mem_start + i));
1076 return (0);
1077 }
1078 isa_dev->id_msize = memsize;
1079 return (ED_3COM_IO_PORTS);
1080}
1081
1082/*
1083 * Probe and vendor-specific initialization routine for NE1000/2000 boards
1084 */
1085static int
| 293 "ed",
294 1 /* We are ultra sensitive */
295};
296
297/*
298 * Interrupt conversion table for WD/SMC ASIC/83C584
299 * (IRQ* are defined in icu.h)
300 */
301static unsigned short ed_intr_mask[] = {
302 IRQ9,
303 IRQ3,
304 IRQ5,
305 IRQ7,
306 IRQ10,
307 IRQ11,
308 IRQ15,
309 IRQ4
310};
311
312/*
313 * Interrupt conversion table for 83C790
314 */
315static unsigned short ed_790_intr_mask[] = {
316 0,
317 IRQ9,
318 IRQ3,
319 IRQ5,
320 IRQ7,
321 IRQ10,
322 IRQ11,
323 IRQ15
324};
325
326#define ETHER_MIN_LEN 60
327#define ETHER_MAX_LEN 1514
328#define ETHER_ADDR_LEN 6
329#define ETHER_HDR_SIZE 14
330
331static struct kern_devconf kdc_ed_template = {
332 0, 0, 0, /* filled in by dev_attach */
333 "ed", 0, { MDDT_ISA, 0, "net" },
334 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN,
335 &kdc_isa0, /* parent */
336 0, /* parentdata */
337 DC_UNCONFIGURED, /* state */
338 "", /* description */
339 DC_CLS_NETIF /* class */
340};
341
342static inline void
343ed_registerdev(struct isa_device *id, const char *descr)
344{
345 struct kern_devconf *kdc = &ed_softc[id->id_unit].kdc;
346 *kdc = kdc_ed_template;
347 kdc->kdc_unit = id->id_unit;
348 kdc->kdc_parentdata = id;
349 kdc->kdc_description = descr;
350 dev_attach(kdc);
351}
352
353/*
354 * Determine if the device is present
355 *
356 * on entry:
357 * a pointer to an isa_device struct
358 * on exit:
359 * NULL if device not found
360 * or # of i/o addresses used (if found)
361 */
362static int
363ed_probe(isa_dev)
364 struct isa_device *isa_dev;
365{
366 int nports;
367
368#if NCRD > 0
369 /*
370 * If PC-Card probe required, then register driver with
371 * slot manager.
372 */
373 pccard_add_driver(&ed_info);
374#endif
375
376#ifndef DEV_LKM
377 ed_registerdev(isa_dev, "Ethernet adapter");
378#endif /* not DEV_LKM */
379
380 nports = ed_probe_WD80x3(isa_dev);
381 if (nports)
382 return (nports);
383
384 nports = ed_probe_3Com(isa_dev);
385 if (nports)
386 return (nports);
387
388 nports = ed_probe_Novell(isa_dev);
389 if (nports)
390 return (nports);
391
392 return (0);
393}
394
395/*
396 * Generic probe routine for testing for the existance of a DS8390.
397 * Must be called after the NIC has just been reset. This routine
398 * works by looking at certain register values that are guaranteed
399 * to be initialized a certain way after power-up or reset. Seems
400 * not to currently work on the 83C690.
401 *
402 * Specifically:
403 *
404 * Register reset bits set bits
405 * Command Register (CR) TXP, STA RD2, STP
406 * Interrupt Status (ISR) RST
407 * Interrupt Mask (IMR) All bits
408 * Data Control (DCR) LAS
409 * Transmit Config. (TCR) LB1, LB0
410 *
411 * We only look at the CR and ISR registers, however, because looking at
412 * the others would require changing register pages (which would be
413 * intrusive if this isn't an 8390).
414 *
415 * Return 1 if 8390 was found, 0 if not.
416 */
417
418static int
419ed_probe_generic8390(sc)
420 struct ed_softc *sc;
421{
422 if ((inb(sc->nic_addr + ED_P0_CR) &
423 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
424 (ED_CR_RD2 | ED_CR_STP))
425 return (0);
426 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
427 return (0);
428
429 return (1);
430}
431
432/*
433 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards
434 */
435static int
436ed_probe_WD80x3(isa_dev)
437 struct isa_device *isa_dev;
438{
439 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
440 int i;
441 u_int memsize;
442 u_char iptr, isa16bit, sum;
443
444 sc->asic_addr = isa_dev->id_iobase;
445 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET;
446 sc->is790 = 0;
447
448#ifdef TOSH_ETHER
449 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW);
450 DELAY(10000);
451#endif
452
453 /*
454 * Attempt to do a checksum over the station address PROM. If it
455 * fails, it's probably not a SMC/WD board. There is a problem with
456 * this, though: some clone WD boards don't pass the checksum test.
457 * Danpex boards for one.
458 */
459 for (sum = 0, i = 0; i < 8; ++i)
460 sum += inb(sc->asic_addr + ED_WD_PROM + i);
461
462 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) {
463
464 /*
465 * Checksum is invalid. This often happens with cheap WD8003E
466 * clones. In this case, the checksum byte (the eighth byte)
467 * seems to always be zero.
468 */
469 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
470 inb(sc->asic_addr + ED_WD_PROM + 7) != 0)
471 return (0);
472 }
473 /* reset card to force it into a known state. */
474#ifdef TOSH_ETHER
475 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
476#else
477 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST);
478#endif
479 DELAY(100);
480 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST);
481 /* wait in the case this card is reading it's EEROM */
482 DELAY(5000);
483
484 sc->vendor = ED_VENDOR_WD_SMC;
485 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID);
486
487 /*
488 * Set initial values for width/size.
489 */
490 memsize = 8192;
491 isa16bit = 0;
492 switch (sc->type) {
493 case ED_TYPE_WD8003S:
494 sc->type_str = "WD8003S";
495 sc->kdc.kdc_description = "Ethernet adapter: WD 8003S";
496 break;
497 case ED_TYPE_WD8003E:
498 sc->type_str = "WD8003E";
499 sc->kdc.kdc_description = "Ethernet adapter: WD 8003E";
500 break;
501 case ED_TYPE_WD8003EB:
502 sc->type_str = "WD8003EB";
503 sc->kdc.kdc_description = "Ethernet adapter: WD 8003EB";
504 break;
505 case ED_TYPE_WD8003W:
506 sc->type_str = "WD8003W";
507 sc->kdc.kdc_description = "Ethernet adapter: WD 8003W";
508 break;
509 case ED_TYPE_WD8013EBT:
510 sc->type_str = "WD8013EBT";
511 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBT";
512 memsize = 16384;
513 isa16bit = 1;
514 break;
515 case ED_TYPE_WD8013W:
516 sc->type_str = "WD8013W";
517 sc->kdc.kdc_description = "Ethernet adapter: WD 8013W";
518 memsize = 16384;
519 isa16bit = 1;
520 break;
521 case ED_TYPE_WD8013EP: /* also WD8003EP */
522 if (inb(sc->asic_addr + ED_WD_ICR)
523 & ED_WD_ICR_16BIT) {
524 isa16bit = 1;
525 memsize = 16384;
526 sc->type_str = "WD8013EP";
527 sc->kdc.kdc_description =
528 "Ethernet adapter: WD 8013EP";
529 } else {
530 sc->type_str = "WD8003EP";
531 sc->kdc.kdc_description =
532 "Ethernet adapter: WD 8003EP";
533 }
534 break;
535 case ED_TYPE_WD8013WC:
536 sc->type_str = "WD8013WC";
537 sc->kdc.kdc_description = "Ethernet adapter: WD 8013WC";
538 memsize = 16384;
539 isa16bit = 1;
540 break;
541 case ED_TYPE_WD8013EBP:
542 sc->type_str = "WD8013EBP";
543 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EBP";
544 memsize = 16384;
545 isa16bit = 1;
546 break;
547 case ED_TYPE_WD8013EPC:
548 sc->type_str = "WD8013EPC";
549 sc->kdc.kdc_description = "Ethernet adapter: WD 8013EPC";
550 memsize = 16384;
551 isa16bit = 1;
552 break;
553 case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */
554 case ED_TYPE_SMC8216T:
555 if (sc->type == ED_TYPE_SMC8216C) {
556 sc->type_str = "SMC8216/SMC8216C";
557 sc->kdc.kdc_description =
558 "Ethernet adapter: SMC 8216 or 8216C";
559 } else {
560 sc->type_str = "SMC8216T";
561 sc->kdc.kdc_description =
562 "Ethernet adapter: SMC 8216T";
563 }
564
565 outb(sc->asic_addr + ED_WD790_HWR,
566 inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH);
567 switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
568 case ED_WD790_RAR_SZ64:
569 memsize = 65536;
570 break;
571 case ED_WD790_RAR_SZ32:
572 memsize = 32768;
573 break;
574 case ED_WD790_RAR_SZ16:
575 memsize = 16384;
576 break;
577 case ED_WD790_RAR_SZ8:
578 /* 8216 has 16K shared mem -- 8416 has 8K */
579 if (sc->type == ED_TYPE_SMC8216C) {
580 sc->type_str = "SMC8416C/SMC8416BT";
581 sc->kdc.kdc_description =
582 "Ethernet adapter: SMC 8416C or 8416BT";
583 } else {
584 sc->type_str = "SMC8416T";
585 sc->kdc.kdc_description =
586 "Ethernet adapter: SMC 8416T";
587 }
588 memsize = 8192;
589 break;
590 }
591 outb(sc->asic_addr + ED_WD790_HWR,
592 inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
593
594 isa16bit = 1;
595 sc->is790 = 1;
596 break;
597#ifdef TOSH_ETHER
598 case ED_TYPE_TOSHIBA1:
599 sc->type_str = "Toshiba1";
600 sc->kdc.kdc_description = "Ethernet adapter: Toshiba1";
601 memsize = 32768;
602 isa16bit = 1;
603 break;
604 case ED_TYPE_TOSHIBA4:
605 sc->type_str = "Toshiba4";
606 sc->kdc.kdc_description = "Ethernet adapter: Toshiba4";
607 memsize = 32768;
608 isa16bit = 1;
609 break;
610#endif
611 default:
612 sc->type_str = "";
613 break;
614 }
615
616 /*
617 * Make some adjustments to initial values depending on what is found
618 * in the ICR.
619 */
620 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
621#ifdef TOSH_ETHER
622 && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
623#endif
624 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
625 isa16bit = 0;
626 memsize = 8192;
627 }
628
629#if ED_DEBUG
630 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
631 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
632 for (i = 0; i < 8; i++)
633 printf("%x -> %x\n", i, inb(sc->asic_addr + i));
634#endif
635
636 /*
637 * Allow the user to override the autoconfiguration
638 */
639 if (isa_dev->id_msize)
640 memsize = isa_dev->id_msize;
641
642 /*
643 * (note that if the user specifies both of the following flags that
644 * '8bit' mode intentionally has precedence)
645 */
646 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE)
647 isa16bit = 1;
648 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE)
649 isa16bit = 0;
650
651 /*
652 * If possible, get the assigned interrupt number from the card and
653 * use it.
654 */
655 if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) {
656
657 /*
658 * Assemble together the encoded interrupt number.
659 */
660 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) |
661 ((inb(isa_dev->id_iobase + ED_WD_IRR) &
662 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
663
664 /*
665 * If no interrupt specified (or "?"), use what the board tells us.
666 */
667 if (isa_dev->id_irq <= 0)
668 isa_dev->id_irq = ed_intr_mask[iptr];
669
670 /*
671 * Enable the interrupt.
672 */
673 outb(isa_dev->id_iobase + ED_WD_IRR,
674 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN);
675 }
676 if (sc->is790) {
677 outb(isa_dev->id_iobase + ED_WD790_HWR,
678 inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH);
679 iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) |
680 (inb(isa_dev->id_iobase + ED_WD790_GCR) &
681 (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2);
682 outb(isa_dev->id_iobase + ED_WD790_HWR,
683 inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
684
685 /*
686 * If no interrupt specified (or "?"), use what the board tells us.
687 */
688 if (isa_dev->id_irq <= 0)
689 isa_dev->id_irq = ed_790_intr_mask[iptr];
690
691 /*
692 * Enable interrupts.
693 */
694 outb(isa_dev->id_iobase + ED_WD790_ICR,
695 inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL);
696 }
697 if (isa_dev->id_irq <= 0) {
698 printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n",
699 isa_dev->id_unit, sc->type_str);
700 return (0);
701 }
702 sc->isa16bit = isa16bit;
703 sc->mem_shared = 1;
704 isa_dev->id_msize = memsize;
705 sc->mem_start = (caddr_t) isa_dev->id_maddr;
706
707 /*
708 * allocate one xmit buffer if < 16k, two buffers otherwise
709 */
710 if ((memsize < 16384) ||
711 (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) {
712 sc->txb_cnt = 1;
713 } else {
714 sc->txb_cnt = 2;
715 }
716 sc->tx_page_start = ED_WD_PAGE_OFFSET;
717 sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt;
718 sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE;
719 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start);
720 sc->mem_size = memsize;
721 sc->mem_end = sc->mem_start + memsize;
722
723 /*
724 * Get station address from on-board ROM
725 */
726 for (i = 0; i < ETHER_ADDR_LEN; ++i)
727 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i);
728
729 /*
730 * Set upper address bits and 8/16 bit access to shared memory
731 */
732 if (isa16bit) {
733 if (sc->is790) {
734 sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR);
735 outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN);
736 } else {
737 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
738 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN |
739 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
740 }
741 } else {
742 if (((sc->type & ED_WD_SOFTCONFIG) ||
743#ifdef TOSH_ETHER
744 (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) ||
745#endif
746 (sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) {
747 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
748 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
749 }
750 }
751
752 /*
753 * Set address and enable interface shared memory.
754 */
755 if (!sc->is790) {
756#ifdef TOSH_ETHER
757 outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4);
758 outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f));
759 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW);
760
761#else
762 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) &
763 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
764#endif
765 sc->cr_proto = ED_CR_RD2;
766 } else {
767 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
768 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH));
769 outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) |
770 ((kvtop(sc->mem_start) >> 11) & 0x40) |
771 (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0));
772 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH));
773 sc->cr_proto = 0;
774 }
775
776#if 0
777 printf("starting memory performance test at 0x%x, size %d...\n",
778 sc->mem_start, memsize*16384);
779 for (i = 0; i < 16384; i++)
780 bzero(sc->mem_start, memsize);
781 printf("***DONE***\n");
782#endif
783
784 /*
785 * Now zero memory and verify that it is clear
786 */
787 bzero(sc->mem_start, memsize);
788
789 for (i = 0; i < memsize; ++i) {
790 if (sc->mem_start[i]) {
791 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
792 isa_dev->id_unit, kvtop(sc->mem_start + i));
793
794 /*
795 * Disable 16 bit access to shared memory
796 */
797 if (isa16bit) {
798 if (sc->is790) {
799 outb(sc->asic_addr + ED_WD_MSR, 0x00);
800 }
801 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
802 ~ED_WD_LAAR_M16EN));
803 }
804 return (0);
805 }
806 }
807
808 /*
809 * Disable 16bit access to shared memory - we leave it
810 * disabled so that 1) machines reboot properly when the board
811 * is set 16 bit mode and there are conflicting 8bit
812 * devices/ROMS in the same 128k address space as this boards
813 * shared memory. and 2) so that other 8 bit devices with
814 * shared memory can be used in this 128k region, too.
815 */
816 if (isa16bit) {
817 if (sc->is790) {
818 outb(sc->asic_addr + ED_WD_MSR, 0x00);
819 }
820 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
821 ~ED_WD_LAAR_M16EN));
822 }
823 return (ED_WD_IO_PORTS);
824}
825
826/*
827 * Probe and vendor-specific initialization routine for 3Com 3c503 boards
828 */
829static int
830ed_probe_3Com(isa_dev)
831 struct isa_device *isa_dev;
832{
833 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
834 int i;
835 u_int memsize;
836 u_char isa16bit;
837
838 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET;
839 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET;
840
841 /*
842 * Verify that the kernel configured I/O address matches the board
843 * configured address
844 */
845 switch (inb(sc->asic_addr + ED_3COM_BCFR)) {
846 case ED_3COM_BCFR_300:
847 if (isa_dev->id_iobase != 0x300)
848 return (0);
849 break;
850 case ED_3COM_BCFR_310:
851 if (isa_dev->id_iobase != 0x310)
852 return (0);
853 break;
854 case ED_3COM_BCFR_330:
855 if (isa_dev->id_iobase != 0x330)
856 return (0);
857 break;
858 case ED_3COM_BCFR_350:
859 if (isa_dev->id_iobase != 0x350)
860 return (0);
861 break;
862 case ED_3COM_BCFR_250:
863 if (isa_dev->id_iobase != 0x250)
864 return (0);
865 break;
866 case ED_3COM_BCFR_280:
867 if (isa_dev->id_iobase != 0x280)
868 return (0);
869 break;
870 case ED_3COM_BCFR_2A0:
871 if (isa_dev->id_iobase != 0x2a0)
872 return (0);
873 break;
874 case ED_3COM_BCFR_2E0:
875 if (isa_dev->id_iobase != 0x2e0)
876 return (0);
877 break;
878 default:
879 return (0);
880 }
881
882 /*
883 * Verify that the kernel shared memory address matches the board
884 * configured address.
885 */
886 switch (inb(sc->asic_addr + ED_3COM_PCFR)) {
887 case ED_3COM_PCFR_DC000:
888 if (kvtop(isa_dev->id_maddr) != 0xdc000)
889 return (0);
890 break;
891 case ED_3COM_PCFR_D8000:
892 if (kvtop(isa_dev->id_maddr) != 0xd8000)
893 return (0);
894 break;
895 case ED_3COM_PCFR_CC000:
896 if (kvtop(isa_dev->id_maddr) != 0xcc000)
897 return (0);
898 break;
899 case ED_3COM_PCFR_C8000:
900 if (kvtop(isa_dev->id_maddr) != 0xc8000)
901 return (0);
902 break;
903 default:
904 return (0);
905 }
906
907
908 /*
909 * Reset NIC and ASIC. Enable on-board transceiver throughout reset
910 * sequence because it'll lock up if the cable isn't connected if we
911 * don't.
912 */
913 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL);
914
915 /*
916 * Wait for a while, then un-reset it
917 */
918 DELAY(50);
919
920 /*
921 * The 3Com ASIC defaults to rather strange settings for the CR after
922 * a reset - it's important to set it again after the following outb
923 * (this is done when we map the PROM below).
924 */
925 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
926
927 /*
928 * Wait a bit for the NIC to recover from the reset
929 */
930 DELAY(5000);
931
932 sc->vendor = ED_VENDOR_3COM;
933 sc->type_str = "3c503";
934 sc->kdc.kdc_description = "Ethernet adapter: 3c503";
935 sc->mem_shared = 1;
936 sc->cr_proto = ED_CR_RD2;
937
938 /*
939 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window
940 * to it.
941 */
942 memsize = 8192;
943
944 /*
945 * Get station address from on-board ROM
946 */
947
948 /*
949 * First, map ethernet address PROM over the top of where the NIC
950 * registers normally appear.
951 */
952 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
953
954 for (i = 0; i < ETHER_ADDR_LEN; ++i)
955 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
956
957 /*
958 * Unmap PROM - select NIC registers. The proper setting of the
959 * tranceiver is set in ed_init so that the attach code is given a
960 * chance to set the default based on a compile-time config option
961 */
962 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
963
964 /*
965 * Determine if this is an 8bit or 16bit board
966 */
967
968 /*
969 * select page 0 registers
970 */
971 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
972
973 /*
974 * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit
975 * board.
976 */
977 outb(sc->nic_addr + ED_P0_DCR, 0);
978
979 /*
980 * select page 2 registers
981 */
982 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP);
983
984 /*
985 * The 3c503 forces the WTS bit to a one if this is a 16bit board
986 */
987 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS)
988 isa16bit = 1;
989 else
990 isa16bit = 0;
991
992 /*
993 * select page 0 registers
994 */
995 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP);
996
997 sc->mem_start = (caddr_t) isa_dev->id_maddr;
998 sc->mem_size = memsize;
999 sc->mem_end = sc->mem_start + memsize;
1000
1001 /*
1002 * We have an entire 8k window to put the transmit buffers on the
1003 * 16bit boards. But since the 16bit 3c503's shared memory is only
1004 * fast enough to overlap the loading of one full-size packet, trying
1005 * to load more than 2 buffers can actually leave the transmitter idle
1006 * during the load. So 2 seems the best value. (Although a mix of
1007 * variable-sized packets might change this assumption. Nonetheless,
1008 * we optimize for linear transfers of same-size packets.)
1009 */
1010 if (isa16bit) {
1011 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)
1012 sc->txb_cnt = 1;
1013 else
1014 sc->txb_cnt = 2;
1015
1016 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
1017 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
1018 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
1019 ED_3COM_RX_PAGE_OFFSET_16BIT;
1020 sc->mem_ring = sc->mem_start;
1021 } else {
1022 sc->txb_cnt = 1;
1023 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
1024 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
1025 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
1026 ED_3COM_TX_PAGE_OFFSET_8BIT;
1027 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
1028 }
1029
1030 sc->isa16bit = isa16bit;
1031
1032 /*
1033 * Initialize GA page start/stop registers. Probably only needed if
1034 * doing DMA, but what the hell.
1035 */
1036 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start);
1037 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop);
1038
1039 /*
1040 * Set IRQ. 3c503 only allows a choice of irq 2-5.
1041 */
1042 switch (isa_dev->id_irq) {
1043 case IRQ2:
1044 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2);
1045 break;
1046 case IRQ3:
1047 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3);
1048 break;
1049 case IRQ4:
1050 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4);
1051 break;
1052 case IRQ5:
1053 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
1054 break;
1055 default:
1056 printf("ed%d: Invalid irq configuration (%d) must be 3-5,9 for 3c503\n",
1057 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
1058 return (0);
1059 }
1060
1061 /*
1062 * Initialize GA configuration register. Set bank and enable shared
1063 * mem.
1064 */
1065 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL |
1066 ED_3COM_GACFR_MBS0);
1067
1068 /*
1069 * Initialize "Vector Pointer" registers. These gawd-awful things are
1070 * compared to 20 bits of the address on ISA, and if they match, the
1071 * shared memory is disabled. We set them to 0xffff0...allegedly the
1072 * reset vector.
1073 */
1074 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff);
1075 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff);
1076 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00);
1077
1078 /*
1079 * Zero memory and verify that it is clear
1080 */
1081 bzero(sc->mem_start, memsize);
1082
1083 for (i = 0; i < memsize; ++i)
1084 if (sc->mem_start[i]) {
1085 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
1086 isa_dev->id_unit, kvtop(sc->mem_start + i));
1087 return (0);
1088 }
1089 isa_dev->id_msize = memsize;
1090 return (ED_3COM_IO_PORTS);
1091}
1092
1093/*
1094 * Probe and vendor-specific initialization routine for NE1000/2000 boards
1095 */
1096static int
|
1086ed_probe_Novell(isa_dev)
1087 struct isa_device *isa_dev;
| 1097ed_probe_Novell_generic(sc, port, unit, flags)
1098 struct ed_softc *sc;
1099 int port;
1100 int unit;
1101 int flags;
|
1088{
| 1102{
|
1089 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
| |
1090 u_int memsize, n;
1091 u_char romdata[16], tmp;
1092 static char test_pattern[32] = "THIS is A memory TEST pattern";
1093 char test_buffer[32];
1094
| 1103 u_int memsize, n;
1104 u_char romdata[16], tmp;
1105 static char test_pattern[32] = "THIS is A memory TEST pattern";
1106 char test_buffer[32];
1107
|
1095 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET;
1096 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET;
| 1108 sc->asic_addr = port + ED_NOVELL_ASIC_OFFSET;
1109 sc->nic_addr = port + ED_NOVELL_NIC_OFFSET;
|
1097
1098 /* XXX - do Novell-specific probe here */
1099
1100 /* Reset the board */
1101#ifdef GWETHER
1102 outb(sc->asic_addr + ED_NOVELL_RESET, 0);
1103 DELAY(200);
1104#endif /* GWETHER */
1105 tmp = inb(sc->asic_addr + ED_NOVELL_RESET);
1106
1107 /*
1108 * I don't know if this is necessary; probably cruft leftover from
1109 * Clarkson packet driver code. Doesn't do a thing on the boards I've
1110 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
1111 * non-invasive...but some boards don't seem to reset and I don't have
1112 * complete documentation on what the 'right' thing to do is...so we
1113 * do the invasive thing for now. Yuck.]
1114 */
1115 outb(sc->asic_addr + ED_NOVELL_RESET, tmp);
1116 DELAY(5000);
1117
1118 /*
1119 * This is needed because some NE clones apparently don't reset the
1120 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX
1121 * - this makes the probe invasive! ...Done against my better
1122 * judgement. -DLG
1123 */
1124 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
1125
1126 DELAY(5000);
1127
1128 /* Make sure that we really have an 8390 based board */
1129 if (!ed_probe_generic8390(sc))
1130 return (0);
1131
1132 sc->vendor = ED_VENDOR_NOVELL;
1133 sc->mem_shared = 0;
1134 sc->cr_proto = ED_CR_RD2;
| 1110
1111 /* XXX - do Novell-specific probe here */
1112
1113 /* Reset the board */
1114#ifdef GWETHER
1115 outb(sc->asic_addr + ED_NOVELL_RESET, 0);
1116 DELAY(200);
1117#endif /* GWETHER */
1118 tmp = inb(sc->asic_addr + ED_NOVELL_RESET);
1119
1120 /*
1121 * I don't know if this is necessary; probably cruft leftover from
1122 * Clarkson packet driver code. Doesn't do a thing on the boards I've
1123 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
1124 * non-invasive...but some boards don't seem to reset and I don't have
1125 * complete documentation on what the 'right' thing to do is...so we
1126 * do the invasive thing for now. Yuck.]
1127 */
1128 outb(sc->asic_addr + ED_NOVELL_RESET, tmp);
1129 DELAY(5000);
1130
1131 /*
1132 * This is needed because some NE clones apparently don't reset the
1133 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX
1134 * - this makes the probe invasive! ...Done against my better
1135 * judgement. -DLG
1136 */
1137 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
1138
1139 DELAY(5000);
1140
1141 /* Make sure that we really have an 8390 based board */
1142 if (!ed_probe_generic8390(sc))
1143 return (0);
1144
1145 sc->vendor = ED_VENDOR_NOVELL;
1146 sc->mem_shared = 0;
1147 sc->cr_proto = ED_CR_RD2;
|
1135 isa_dev->id_maddr = 0;
| |
1136
1137 /*
1138 * Test the ability to read and write to the NIC memory. This has the
1139 * side affect of determining if this is an NE1000 or an NE2000.
1140 */
1141
1142 /*
1143 * This prevents packets from being stored in the NIC memory when the
1144 * readmem routine turns on the start bit in the CR.
1145 */
1146 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
1147
1148 /* Temporarily initialize DCR for byte operations */
1149 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
1150
1151 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE);
1152 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE);
1153
1154 sc->isa16bit = 0;
1155
1156 /*
1157 * Write a test pattern in byte mode. If this fails, then there
1158 * probably isn't any memory at 8k - which likely means that the board
1159 * is an NE2000.
1160 */
1161 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
1162 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
1163
1164 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
1165 /* not an NE1000 - try NE2000 */
1166
1167 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
1168 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
1169 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
1170
1171 sc->isa16bit = 1;
1172
1173 /*
1174 * Write a test pattern in word mode. If this also fails, then
1175 * we don't know what this board is.
1176 */
1177 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
1178 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
1179
1180 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
1181 return (0); /* not an NE2000 either */
1182
1183 sc->type = ED_TYPE_NE2000;
1184 sc->type_str = "NE2000";
1185 sc->kdc.kdc_description = "Ethernet adapter: NE2000";
1186 } else {
1187 sc->type = ED_TYPE_NE1000;
1188 sc->type_str = "NE1000";
1189 sc->kdc.kdc_description = "Ethernet adapter: NE1000";
1190 }
1191
1192 /* 8k of memory plus an additional 8k if 16bit */
1193 memsize = 8192 + sc->isa16bit * 8192;
1194
1195#if 0 /* probably not useful - NE boards only come two ways */
1196 /* allow kernel config file overrides */
1197 if (isa_dev->id_msize)
1198 memsize = isa_dev->id_msize;
1199#endif
1200
1201 sc->mem_size = memsize;
1202
1203 /* NIC memory doesn't start at zero on an NE board */
1204 /* The start address is tied to the bus width */
1205 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192;
1206 sc->mem_end = sc->mem_start + memsize;
1207 sc->tx_page_start = memsize / ED_PAGE_SIZE;
1208
1209#ifdef GWETHER
1210 {
1211 int x, i, mstart = 0, msize = 0;
1212 char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE];
1213
1214 for (i = 0; i < ED_PAGE_SIZE; i++)
1215 pbuf0[i] = 0;
1216
1217 /* Clear all the memory. */
1218 for (x = 1; x < 256; x++)
1219 ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE);
1220
1221 /* Search for the start of RAM. */
1222 for (x = 1; x < 256; x++) {
1223 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1224 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
1225 for (i = 0; i < ED_PAGE_SIZE; i++)
1226 pbuf[i] = 255 - x;
1227 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
1228 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1229 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
1230 mstart = x * ED_PAGE_SIZE;
1231 msize = ED_PAGE_SIZE;
1232 break;
1233 }
1234 }
1235 }
1236
1237 if (mstart == 0) {
| 1148
1149 /*
1150 * Test the ability to read and write to the NIC memory. This has the
1151 * side affect of determining if this is an NE1000 or an NE2000.
1152 */
1153
1154 /*
1155 * This prevents packets from being stored in the NIC memory when the
1156 * readmem routine turns on the start bit in the CR.
1157 */
1158 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
1159
1160 /* Temporarily initialize DCR for byte operations */
1161 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
1162
1163 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE);
1164 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE);
1165
1166 sc->isa16bit = 0;
1167
1168 /*
1169 * Write a test pattern in byte mode. If this fails, then there
1170 * probably isn't any memory at 8k - which likely means that the board
1171 * is an NE2000.
1172 */
1173 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
1174 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
1175
1176 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
1177 /* not an NE1000 - try NE2000 */
1178
1179 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
1180 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
1181 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
1182
1183 sc->isa16bit = 1;
1184
1185 /*
1186 * Write a test pattern in word mode. If this also fails, then
1187 * we don't know what this board is.
1188 */
1189 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
1190 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
1191
1192 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
1193 return (0); /* not an NE2000 either */
1194
1195 sc->type = ED_TYPE_NE2000;
1196 sc->type_str = "NE2000";
1197 sc->kdc.kdc_description = "Ethernet adapter: NE2000";
1198 } else {
1199 sc->type = ED_TYPE_NE1000;
1200 sc->type_str = "NE1000";
1201 sc->kdc.kdc_description = "Ethernet adapter: NE1000";
1202 }
1203
1204 /* 8k of memory plus an additional 8k if 16bit */
1205 memsize = 8192 + sc->isa16bit * 8192;
1206
1207#if 0 /* probably not useful - NE boards only come two ways */
1208 /* allow kernel config file overrides */
1209 if (isa_dev->id_msize)
1210 memsize = isa_dev->id_msize;
1211#endif
1212
1213 sc->mem_size = memsize;
1214
1215 /* NIC memory doesn't start at zero on an NE board */
1216 /* The start address is tied to the bus width */
1217 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192;
1218 sc->mem_end = sc->mem_start + memsize;
1219 sc->tx_page_start = memsize / ED_PAGE_SIZE;
1220
1221#ifdef GWETHER
1222 {
1223 int x, i, mstart = 0, msize = 0;
1224 char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE];
1225
1226 for (i = 0; i < ED_PAGE_SIZE; i++)
1227 pbuf0[i] = 0;
1228
1229 /* Clear all the memory. */
1230 for (x = 1; x < 256; x++)
1231 ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE);
1232
1233 /* Search for the start of RAM. */
1234 for (x = 1; x < 256; x++) {
1235 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1236 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
1237 for (i = 0; i < ED_PAGE_SIZE; i++)
1238 pbuf[i] = 255 - x;
1239 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
1240 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1241 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
1242 mstart = x * ED_PAGE_SIZE;
1243 msize = ED_PAGE_SIZE;
1244 break;
1245 }
1246 }
1247 }
1248
1249 if (mstart == 0) {
|
1238 printf("ed%d: Cannot find start of RAM.\n", isa_dev->id_unit);
| 1250 printf("ed%d: Cannot find start of RAM.\n", unit);
|
1239 return 0;
1240 }
1241 /* Search for the start of RAM. */
1242 for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) {
1243 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1244 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
1245 for (i = 0; i < ED_PAGE_SIZE; i++)
1246 pbuf[i] = 255 - x;
1247 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
1248 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1249 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
1250 msize += ED_PAGE_SIZE;
1251 else {
1252 break;
1253 }
1254 } else {
1255 break;
1256 }
1257 }
1258
1259 if (msize == 0) {
| 1251 return 0;
1252 }
1253 /* Search for the start of RAM. */
1254 for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) {
1255 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1256 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
1257 for (i = 0; i < ED_PAGE_SIZE; i++)
1258 pbuf[i] = 255 - x;
1259 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
1260 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1261 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
1262 msize += ED_PAGE_SIZE;
1263 else {
1264 break;
1265 }
1266 } else {
1267 break;
1268 }
1269 }
1270
1271 if (msize == 0) {
|
1260 printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", isa_dev->id_unit, mstart, x);
| 1272 printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", unit, mstart, x);
|
1261 return 0;
1262 }
| 1273 return 0;
1274 }
|
1263 printf("ed%d: RAM start at %d, size : %d.\n", isa_dev->id_unit, mstart, msize);
| 1275 printf("ed%d: RAM start at %d, size : %d.\n", unit, mstart, msize);
|
1264
1265 sc->mem_size = msize;
1266 sc->mem_start = (char *) mstart;
1267 sc->mem_end = (char *) (msize + mstart);
1268 sc->tx_page_start = mstart / ED_PAGE_SIZE;
1269 }
1270#endif /* GWETHER */
1271
1272 /*
1273 * Use one xmit buffer if < 16k, two buffers otherwise (if not told
1274 * otherwise).
1275 */
| 1276
1277 sc->mem_size = msize;
1278 sc->mem_start = (char *) mstart;
1279 sc->mem_end = (char *) (msize + mstart);
1280 sc->tx_page_start = mstart / ED_PAGE_SIZE;
1281 }
1282#endif /* GWETHER */
1283
1284 /*
1285 * Use one xmit buffer if < 16k, two buffers otherwise (if not told
1286 * otherwise).
1287 */
|
1276 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING))
| 1288 if ((memsize < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING))
|
1277 sc->txb_cnt = 1;
1278 else
1279 sc->txb_cnt = 2;
1280
1281 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
1282 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
1283
1284 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
1285
1286 ed_pio_readmem(sc, 0, romdata, 16);
1287 for (n = 0; n < ETHER_ADDR_LEN; n++)
1288 sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)];
1289
1290#ifdef GWETHER
1291 if (sc->arpcom.ac_enaddr[2] == 0x86) {
1292 sc->type_str = "Gateway AT";
1293 sc->kdc.kdc_description = "Ethernet adapter: Gateway AT";
1294 }
1295#endif /* GWETHER */
1296
1297 /* clear any pending interrupts that might have occurred above */
1298 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1299
1300 return (ED_NOVELL_IO_PORTS);
1301}
1302
| 1289 sc->txb_cnt = 1;
1290 else
1291 sc->txb_cnt = 2;
1292
1293 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
1294 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
1295
1296 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
1297
1298 ed_pio_readmem(sc, 0, romdata, 16);
1299 for (n = 0; n < ETHER_ADDR_LEN; n++)
1300 sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)];
1301
1302#ifdef GWETHER
1303 if (sc->arpcom.ac_enaddr[2] == 0x86) {
1304 sc->type_str = "Gateway AT";
1305 sc->kdc.kdc_description = "Ethernet adapter: Gateway AT";
1306 }
1307#endif /* GWETHER */
1308
1309 /* clear any pending interrupts that might have occurred above */
1310 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1311
1312 return (ED_NOVELL_IO_PORTS);
1313}
1314
|
| 1315static int
1316ed_probe_Novell(isa_dev)
1317 struct isa_device *isa_dev;
1318{
1319 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
|
1303
| 1320
|
| 1321 isa_dev->id_maddr = 0;
1322 return ed_probe_Novell_generic(sc, isa_dev->id_iobase,
1323 isa_dev->id_unit, isa_dev->id_flags);
1324}
1325
1326#if NCRD > 0
1327
|
1304/*
1305 * Probe and vendor-specific initialization routine for PCCARDs
1306 */
1307static int
1308ed_probe_pccard(isa_dev, ether)
1309 struct isa_device *isa_dev;
1310 u_char *ether;
1311{
1312 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1313 int i;
1314 u_int memsize;
1315 u_char isa16bit;
1316
1317 sc->nic_addr = isa_dev->id_iobase;
1318 sc->gone = 0;
1319 sc->is790 = 0;
1320 sc->cr_proto = ED_CR_RD2;
1321 sc->vendor = ED_VENDOR_PCCARD;
1322 sc->type = 0;
1323 sc->type_str = "PCCARD";
1324 sc->kdc.kdc_description = "PCCARD Ethernet";
1325 sc->mem_size = isa_dev->id_msize = memsize = 16384;
1326 sc->isa16bit = isa16bit = 1;
1327
1328 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1329 sc->arpcom.ac_enaddr[i] = ether[i];
1330
1331#if ED_DEBUG
1332 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
1333 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
1334#endif
1335
1336 i = inb(sc->nic_addr + ED_PC_RESET);
1337 DELAY(100000);
1338 outb(sc->nic_addr + ED_PC_RESET,i);
1339 DELAY(100000);
1340 i = inb(sc->nic_addr + ED_PC_MISC);
1341 if (!i) {
1342 int j;
1343 printf("ed_probe_pccard: possible failure\n");
1344 for (j=0;j<20 && !i;j++) {
1345 printf(".");
1346 DELAY(100000);
1347 i = inb(sc->nic_addr + ED_PC_MISC);
1348 }
1349 if (!i) {
1350 printf("dead :-(\n");
1351 return 0;
1352 }
1353 printf("\n");
1354 }
1355 /*
1356 * Set initial values for width/size.
1357 */
1358
1359 /* Make sure that we really have an 8390 based board */
1360 if (!ed_probe_generic8390(sc)) {
1361 printf("ed_probe_generic8390 failed\n");
1362 return (0);
1363 }
1364 sc->txb_cnt = 2;
1365 sc->tx_page_start = ED_PC_PAGE_OFFSET;
1366 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt;
1367 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
1368
1369 sc->mem_shared = 1;
1370 sc->mem_start = (caddr_t) isa_dev->id_maddr;
1371 sc->mem_size = memsize;
1372 sc->mem_end = sc->mem_start + memsize;
1373
1374 sc->mem_ring = sc->mem_start +
1375 sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
1376
1377 /*
1378 * Now zero memory and verify that it is clear
1379 */
1380 bzero(sc->mem_start, memsize);
1381
1382 for (i = 0; i < memsize; ++i) {
1383 if (sc->mem_start[i]) {
1384 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
1385 isa_dev->id_unit, kvtop(sc->mem_start + i));
1386
1387 return (0);
1388 }
1389 sc->mem_start[i] = (i - 5) & 0xff;
1390 }
1391 for (i = 0; i < memsize; ++i) {
1392 if ((sc->mem_start[i] & 0xff) != ((i - 5) & 0xff)) {
1393 printf("ed%d: shared memory failed at %lx (%x != %x) - check configuration\n",
1394 isa_dev->id_unit, kvtop(sc->mem_start + i),
1395 sc->mem_start[i], (i-5) & 0xff);
1396 return (0);
1397
1398 }
1399 }
1400
1401 i = inb(sc->nic_addr + ED_PC_MISC);
1402 if (!i) {
1403 printf("ed_probe_pccard: possible failure(2)\n");
1404 }
1405
1406 /* clear any pending interupts that we may have caused */
1407 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1408
1409 return (ED_PC_IO_PORTS);
1410}
1411
| 1328/*
1329 * Probe and vendor-specific initialization routine for PCCARDs
1330 */
1331static int
1332ed_probe_pccard(isa_dev, ether)
1333 struct isa_device *isa_dev;
1334 u_char *ether;
1335{
1336 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1337 int i;
1338 u_int memsize;
1339 u_char isa16bit;
1340
1341 sc->nic_addr = isa_dev->id_iobase;
1342 sc->gone = 0;
1343 sc->is790 = 0;
1344 sc->cr_proto = ED_CR_RD2;
1345 sc->vendor = ED_VENDOR_PCCARD;
1346 sc->type = 0;
1347 sc->type_str = "PCCARD";
1348 sc->kdc.kdc_description = "PCCARD Ethernet";
1349 sc->mem_size = isa_dev->id_msize = memsize = 16384;
1350 sc->isa16bit = isa16bit = 1;
1351
1352 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1353 sc->arpcom.ac_enaddr[i] = ether[i];
1354
1355#if ED_DEBUG
1356 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
1357 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
1358#endif
1359
1360 i = inb(sc->nic_addr + ED_PC_RESET);
1361 DELAY(100000);
1362 outb(sc->nic_addr + ED_PC_RESET,i);
1363 DELAY(100000);
1364 i = inb(sc->nic_addr + ED_PC_MISC);
1365 if (!i) {
1366 int j;
1367 printf("ed_probe_pccard: possible failure\n");
1368 for (j=0;j<20 && !i;j++) {
1369 printf(".");
1370 DELAY(100000);
1371 i = inb(sc->nic_addr + ED_PC_MISC);
1372 }
1373 if (!i) {
1374 printf("dead :-(\n");
1375 return 0;
1376 }
1377 printf("\n");
1378 }
1379 /*
1380 * Set initial values for width/size.
1381 */
1382
1383 /* Make sure that we really have an 8390 based board */
1384 if (!ed_probe_generic8390(sc)) {
1385 printf("ed_probe_generic8390 failed\n");
1386 return (0);
1387 }
1388 sc->txb_cnt = 2;
1389 sc->tx_page_start = ED_PC_PAGE_OFFSET;
1390 sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE * sc->txb_cnt;
1391 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
1392
1393 sc->mem_shared = 1;
1394 sc->mem_start = (caddr_t) isa_dev->id_maddr;
1395 sc->mem_size = memsize;
1396 sc->mem_end = sc->mem_start + memsize;
1397
1398 sc->mem_ring = sc->mem_start +
1399 sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
1400
1401 /*
1402 * Now zero memory and verify that it is clear
1403 */
1404 bzero(sc->mem_start, memsize);
1405
1406 for (i = 0; i < memsize; ++i) {
1407 if (sc->mem_start[i]) {
1408 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
1409 isa_dev->id_unit, kvtop(sc->mem_start + i));
1410
1411 return (0);
1412 }
1413 sc->mem_start[i] = (i - 5) & 0xff;
1414 }
1415 for (i = 0; i < memsize; ++i) {
1416 if ((sc->mem_start[i] & 0xff) != ((i - 5) & 0xff)) {
1417 printf("ed%d: shared memory failed at %lx (%x != %x) - check configuration\n",
1418 isa_dev->id_unit, kvtop(sc->mem_start + i),
1419 sc->mem_start[i], (i-5) & 0xff);
1420 return (0);
1421
1422 }
1423 }
1424
1425 i = inb(sc->nic_addr + ED_PC_MISC);
1426 if (!i) {
1427 printf("ed_probe_pccard: possible failure(2)\n");
1428 }
1429
1430 /* clear any pending interupts that we may have caused */
1431 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1432
1433 return (ED_PC_IO_PORTS);
1434}
1435
|
| 1436#endif /* NCRD > 0 */
1437
|
1412/*
1413 * Install interface into kernel networking data structures
1414 */
1415static int
| 1438/*
1439 * Install interface into kernel networking data structures
1440 */
1441static int
|
1416ed_attach(isa_dev)
1417 struct isa_device *isa_dev;
| 1442ed_attach(sc, unit, flags)
1443 struct ed_softc *sc;
1444 int unit;
1445 int flags;
|
1418{
| 1446{
|
1419 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
| |
1420 struct ifnet *ifp = &sc->arpcom.ac_if;
1421
1422 /*
1423 * Set interface to stopped condition (reset)
1424 */
1425 ed_stop(sc);
1426
1427 if (!ifp->if_name) {
1428 /*
1429 * Initialize ifnet structure
1430 */
1431 ifp->if_softc = sc;
| 1447 struct ifnet *ifp = &sc->arpcom.ac_if;
1448
1449 /*
1450 * Set interface to stopped condition (reset)
1451 */
1452 ed_stop(sc);
1453
1454 if (!ifp->if_name) {
1455 /*
1456 * Initialize ifnet structure
1457 */
1458 ifp->if_softc = sc;
|
1432 ifp->if_unit = isa_dev->id_unit;
| 1459 ifp->if_unit = unit;
|
1433 ifp->if_name = "ed";
1434 ifp->if_output = ether_output;
1435 ifp->if_start = ed_start;
1436 ifp->if_ioctl = ed_ioctl;
1437 ifp->if_watchdog = ed_watchdog;
1438 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
1439
1440 /*
1441 * Set default state for ALTPHYS flag (used to disable the
1442 * tranceiver for AUI operation), based on compile-time
1443 * config option.
1444 */
| 1460 ifp->if_name = "ed";
1461 ifp->if_output = ether_output;
1462 ifp->if_start = ed_start;
1463 ifp->if_ioctl = ed_ioctl;
1464 ifp->if_watchdog = ed_watchdog;
1465 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
1466
1467 /*
1468 * Set default state for ALTPHYS flag (used to disable the
1469 * tranceiver for AUI operation), based on compile-time
1470 * config option.
1471 */
|
1445 if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER)
| 1472 if (flags & ED_FLAGS_DISABLE_TRANCEIVER)
|
1446 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
1447 IFF_MULTICAST | IFF_ALTPHYS);
1448 else
1449 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
1450 IFF_MULTICAST);
1451
1452 /*
1453 * Attach the interface
1454 */
1455 if_attach(ifp);
1456 ether_ifattach(ifp);
1457 }
1458 /* device attach does transition from UNCONFIGURED to IDLE state */
1459 sc->kdc.kdc_state = DC_IDLE;
1460
1461 /*
1462 * Print additional info when attached
1463 */
| 1473 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
1474 IFF_MULTICAST | IFF_ALTPHYS);
1475 else
1476 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
1477 IFF_MULTICAST);
1478
1479 /*
1480 * Attach the interface
1481 */
1482 if_attach(ifp);
1483 ether_ifattach(ifp);
1484 }
1485 /* device attach does transition from UNCONFIGURED to IDLE state */
1486 sc->kdc.kdc_state = DC_IDLE;
1487
1488 /*
1489 * Print additional info when attached
1490 */
|
1464 printf("ed%d: address %6D, ", isa_dev->id_unit,
| 1491 printf("%s%d: address %6D, ", ifp->if_name, ifp->if_unit,
|
1465 sc->arpcom.ac_enaddr, ":");
1466
1467 if (sc->type_str && (*sc->type_str != 0))
1468 printf("type %s ", sc->type_str);
1469 else
1470 printf("type unknown (0x%x) ", sc->type);
1471
1472 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)");
1473
1474 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) &&
1475 (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : "");
1476
1477 /*
1478 * If BPF is in the kernel, call the attach for it
1479 */
1480#if NBPFILTER > 0
1481 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
1482#endif
1483 return 1;
1484}
1485
| 1492 sc->arpcom.ac_enaddr, ":");
1493
1494 if (sc->type_str && (*sc->type_str != 0))
1495 printf("type %s ", sc->type_str);
1496 else
1497 printf("type unknown (0x%x) ", sc->type);
1498
1499 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)");
1500
1501 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) &&
1502 (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : "");
1503
1504 /*
1505 * If BPF is in the kernel, call the attach for it
1506 */
1507#if NBPFILTER > 0
1508 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
1509#endif
1510 return 1;
1511}
1512
|
| 1513static int
1514ed_attach_isa(isa_dev)
1515 struct isa_device *isa_dev;
1516{
1517 int unit = isa_dev->id_unit;
1518 struct ed_softc *sc = &ed_softc[unit];
1519 int flags = isa_dev->id_flags;
1520
1521 return ed_attach(sc, unit, flags);
1522}
1523
1524#if NPCI > 0
1525void *
1526ed_attach_NE2000_pci(unit, port)
1527 int unit;
1528 int port;
1529{
1530 struct ed_softc *sc = malloc(sizeof *sc, M_DEVBUF, M_NOWAIT);
1531 int isa_flags = 0;
1532
1533 if (!sc)
1534 return sc;
1535
1536 if (ed_probe_Novell_generic(sc, port, unit, isa_flags) == 0
1537 || ed_attach(sc, unit, isa_flags) == 0) {
1538 free(sc, M_DEVBUF);
1539 return NULL;
1540 }
1541 return sc;
1542}
1543#endif
1544
|
1486/*
1487 * Reset interface.
1488 */
1489static void
1490ed_reset(ifp)
1491 struct ifnet *ifp;
1492{
1493 struct ed_softc *sc = ifp->if_softc;
1494 int s;
1495
1496 if (sc->gone)
1497 return;
1498 s = splimp();
1499
1500 /*
1501 * Stop interface and re-initialize.
1502 */
1503 ed_stop(sc);
1504 ed_init(ifp);
1505
1506 (void) splx(s);
1507}
1508
1509/*
1510 * Take interface offline.
1511 */
1512static void
1513ed_stop(sc)
1514 struct ed_softc *sc;
1515{
1516 int n = 5000;
1517
1518 if (sc->gone)
1519 return;
1520 /*
1521 * Stop everything on the interface, and select page 0 registers.
1522 */
1523 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
1524
1525 /*
1526 * Wait for interface to enter stopped state, but limit # of checks to
1527 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
1528 * just in case it's an old one.
1529 */
1530 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n);
1531}
1532
1533/*
1534 * Device timeout/watchdog routine. Entered if the device neglects to
1535 * generate an interrupt after a transmit has been started on it.
1536 */
1537static void
1538ed_watchdog(ifp)
1539 struct ifnet *ifp;
1540{
1541 struct ed_softc *sc = ifp->if_softc;
1542
1543 if (sc->gone)
1544 return;
1545 log(LOG_ERR, "ed%d: device timeout\n", ifp->if_unit);
1546 ifp->if_oerrors++;
1547
1548 ed_reset(ifp);
1549}
1550
1551/*
1552 * Initialize device.
1553 */
1554static void
1555ed_init(ifp)
1556 struct ifnet *ifp;
1557{
1558 struct ed_softc *sc = ifp->if_softc;
1559 int i, s;
1560
1561 if (sc->gone)
1562 return;
1563
1564 /* address not known */
1565 if (ifp->if_addrlist == (struct ifaddr *) 0)
1566 return;
1567
1568 /*
1569 * Initialize the NIC in the exact order outlined in the NS manual.
1570 * This init procedure is "mandatory"...don't change what or when
1571 * things happen.
1572 */
1573 s = splimp();
1574
1575 /* reset transmitter flags */
1576 sc->xmit_busy = 0;
1577 ifp->if_timer = 0;
1578
1579 sc->txb_inuse = 0;
1580 sc->txb_new = 0;
1581 sc->txb_next_tx = 0;
1582
1583 /* This variable is used below - don't move this assignment */
1584 sc->next_packet = sc->rec_page_start + 1;
1585
1586 /*
1587 * Set interface for page 0, Remote DMA complete, Stopped
1588 */
1589 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
1590
1591 if (sc->isa16bit) {
1592
1593 /*
1594 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
1595 * order=80x86, word-wide DMA xfers,
1596 */
1597 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
1598 } else {
1599
1600 /*
1601 * Same as above, but byte-wide DMA xfers
1602 */
1603 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
1604 }
1605
1606 /*
1607 * Clear Remote Byte Count Registers
1608 */
1609 outb(sc->nic_addr + ED_P0_RBCR0, 0);
1610 outb(sc->nic_addr + ED_P0_RBCR1, 0);
1611
1612 /*
1613 * For the moment, don't store incoming packets in memory.
1614 */
1615 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
1616
1617 /*
1618 * Place NIC in internal loopback mode
1619 */
1620 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0);
1621
1622 /*
1623 * Initialize transmit/receive (ring-buffer) Page Start
1624 */
1625 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start);
1626 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start);
1627 /* Set lower bits of byte addressable framing to 0 */
1628 if (sc->is790)
1629 outb(sc->nic_addr + 0x09, 0);
1630
1631 /*
1632 * Initialize Receiver (ring-buffer) Page Stop and Boundry
1633 */
1634 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop);
1635 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start);
1636
1637 /*
1638 * Clear all interrupts. A '1' in each bit position clears the
1639 * corresponding flag.
1640 */
1641 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1642
1643 /*
1644 * Enable the following interrupts: receive/transmit complete,
1645 * receive/transmit error, and Receiver OverWrite.
1646 *
1647 * Counter overflow and Remote DMA complete are *not* enabled.
1648 */
1649 outb(sc->nic_addr + ED_P0_IMR,
1650 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
1651
1652 /*
1653 * Program Command Register for page 1
1654 */
1655 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1656
1657 /*
1658 * Copy out our station address
1659 */
1660 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1661 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]);
1662
1663 /*
1664 * Set Current Page pointer to next_packet (initialized above)
1665 */
1666 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet);
1667
1668 /*
1669 * Program Receiver Configuration Register and multicast filter. CR is
1670 * set to page 0 on return.
1671 */
1672 ed_setrcr(sc);
1673
1674 /*
1675 * Take interface out of loopback
1676 */
1677 outb(sc->nic_addr + ED_P0_TCR, 0);
1678
1679 /*
1680 * If this is a 3Com board, the tranceiver must be software enabled
1681 * (there is no settable hardware default).
1682 */
1683 if (sc->vendor == ED_VENDOR_3COM) {
1684 if (ifp->if_flags & IFF_ALTPHYS) {
1685 outb(sc->asic_addr + ED_3COM_CR, 0);
1686 } else {
1687 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
1688 }
1689 }
1690
1691 /*
1692 * Set 'running' flag, and clear output active flag.
1693 */
1694 ifp->if_flags |= IFF_RUNNING;
1695 ifp->if_flags &= ~IFF_OACTIVE;
1696
1697 /*
1698 * ...and attempt to start output
1699 */
1700 ed_start(ifp);
1701
1702 (void) splx(s);
1703}
1704
1705/*
1706 * This routine actually starts the transmission on the interface
1707 */
1708static inline void
1709ed_xmit(sc)
1710 struct ed_softc *sc;
1711{
1712 struct ifnet *ifp = (struct ifnet *)sc;
1713 unsigned short len;
1714
1715 if (sc->gone)
1716 return;
1717 len = sc->txb_len[sc->txb_next_tx];
1718
1719 /*
1720 * Set NIC for page 0 register access
1721 */
1722 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
1723
1724 /*
1725 * Set TX buffer start page
1726 */
1727 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start +
1728 sc->txb_next_tx * ED_TXBUF_SIZE);
1729
1730 /*
1731 * Set TX length
1732 */
1733 outb(sc->nic_addr + ED_P0_TBCR0, len);
1734 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8);
1735
1736 /*
1737 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
1738 */
1739 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
1740 sc->xmit_busy = 1;
1741
1742 /*
1743 * Point to next transmit buffer slot and wrap if necessary.
1744 */
1745 sc->txb_next_tx++;
1746 if (sc->txb_next_tx == sc->txb_cnt)
1747 sc->txb_next_tx = 0;
1748
1749 /*
1750 * Set a timer just in case we never hear from the board again
1751 */
1752 ifp->if_timer = 2;
1753}
1754
1755/*
1756 * Start output on interface.
1757 * We make two assumptions here:
1758 * 1) that the current priority is set to splimp _before_ this code
1759 * is called *and* is returned to the appropriate priority after
1760 * return
1761 * 2) that the IFF_OACTIVE flag is checked before this code is called
1762 * (i.e. that the output part of the interface is idle)
1763 */
1764static void
1765ed_start(ifp)
1766 struct ifnet *ifp;
1767{
1768 struct ed_softc *sc = ifp->if_softc;
1769 struct mbuf *m0, *m;
1770 caddr_t buffer;
1771 int len;
1772
1773 if (sc->gone) {
1774 printf("ed_start(%p) GONE\n",ifp);
1775 return;
1776 }
1777outloop:
1778
1779 /*
1780 * First, see if there are buffered packets and an idle transmitter -
1781 * should never happen at this point.
1782 */
1783 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
1784 printf("ed: packets buffered, but transmitter idle\n");
1785 ed_xmit(sc);
1786 }
1787
1788 /*
1789 * See if there is room to put another packet in the buffer.
1790 */
1791 if (sc->txb_inuse == sc->txb_cnt) {
1792
1793 /*
1794 * No room. Indicate this to the outside world and exit.
1795 */
1796 ifp->if_flags |= IFF_OACTIVE;
1797 return;
1798 }
1799 IF_DEQUEUE(&ifp->if_snd, m);
1800 if (m == 0) {
1801
1802 /*
1803 * We are using the !OACTIVE flag to indicate to the outside
1804 * world that we can accept an additional packet rather than
1805 * that the transmitter is _actually_ active. Indeed, the
1806 * transmitter may be active, but if we haven't filled all the
1807 * buffers with data then we still want to accept more.
1808 */
1809 ifp->if_flags &= ~IFF_OACTIVE;
1810 return;
1811 }
1812
1813 /*
1814 * Copy the mbuf chain into the transmit buffer
1815 */
1816
1817 m0 = m;
1818
1819 /* txb_new points to next open buffer slot */
1820 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
1821
1822 if (sc->mem_shared) {
1823
1824 /*
1825 * Special case setup for 16 bit boards...
1826 */
1827 if (sc->isa16bit) {
1828 switch (sc->vendor) {
1829
1830 /*
1831 * For 16bit 3Com boards (which have 16k of
1832 * memory), we have the xmit buffers in a
1833 * different page of memory ('page 0') - so
1834 * change pages.
1835 */
1836 case ED_VENDOR_3COM:
1837 outb(sc->asic_addr + ED_3COM_GACFR,
1838 ED_3COM_GACFR_RSEL);
1839 break;
1840
1841 /*
1842 * Enable 16bit access to shared memory on
1843 * WD/SMC boards.
1844 */
1845 case ED_VENDOR_WD_SMC:{
1846 outb(sc->asic_addr + ED_WD_LAAR,
1847 (sc->wd_laar_proto | ED_WD_LAAR_M16EN));
1848 if (sc->is790) {
1849 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
1850 }
1851 break;
1852 }
1853 }
1854 }
1855 for (len = 0; m != 0; m = m->m_next) {
1856 bcopy(mtod(m, caddr_t), buffer, m->m_len);
1857 buffer += m->m_len;
1858 len += m->m_len;
1859 }
1860
1861 /*
1862 * Restore previous shared memory access
1863 */
1864 if (sc->isa16bit) {
1865 switch (sc->vendor) {
1866 case ED_VENDOR_3COM:
1867 outb(sc->asic_addr + ED_3COM_GACFR,
1868 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1869 break;
1870 case ED_VENDOR_WD_SMC:{
1871 if (sc->is790) {
1872 outb(sc->asic_addr + ED_WD_MSR, 0x00);
1873 }
1874 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto);
1875 break;
1876 }
1877 }
1878 }
1879 } else {
1880 len = ed_pio_write_mbufs(sc, m, (int)buffer);
1881 if (len == 0)
1882 goto outloop;
1883 }
1884
1885 sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN);
1886
1887 sc->txb_inuse++;
1888
1889 /*
1890 * Point to next buffer slot and wrap if necessary.
1891 */
1892 sc->txb_new++;
1893 if (sc->txb_new == sc->txb_cnt)
1894 sc->txb_new = 0;
1895
1896 if (sc->xmit_busy == 0)
1897 ed_xmit(sc);
1898
1899 /*
1900 * Tap off here if there is a bpf listener.
1901 */
1902#if NBPFILTER > 0
1903 if (ifp->if_bpf) {
1904 bpf_mtap(ifp, m0);
1905 }
1906#endif
1907
1908 m_freem(m0);
1909
1910 /*
1911 * Loop back to the top to possibly buffer more packets
1912 */
1913 goto outloop;
1914}
1915
1916/*
1917 * Ethernet interface receiver interrupt.
1918 */
1919static inline void
1920ed_rint(sc)
1921 struct ed_softc *sc;
1922{
1923 struct ifnet *ifp = &sc->arpcom.ac_if;
1924 u_char boundry;
1925 u_short len;
1926 struct ed_ring packet_hdr;
1927 char *packet_ptr;
1928
1929 if (sc->gone)
1930 return;
1931
1932 /*
1933 * Set NIC to page 1 registers to get 'current' pointer
1934 */
1935 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
1936
1937 /*
1938 * 'sc->next_packet' is the logical beginning of the ring-buffer -
1939 * i.e. it points to where new data has been buffered. The 'CURR'
1940 * (current) register points to the logical end of the ring-buffer -
1941 * i.e. it points to where additional new data will be added. We loop
1942 * here until the logical beginning equals the logical end (or in
1943 * other words, until the ring-buffer is empty).
1944 */
1945 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) {
1946
1947 /* get pointer to this buffer's header structure */
1948 packet_ptr = sc->mem_ring +
1949 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
1950
1951 /*
1952 * The byte count includes a 4 byte header that was added by
1953 * the NIC.
1954 */
1955 if (sc->mem_shared)
1956 packet_hdr = *(struct ed_ring *) packet_ptr;
1957 else
1958 ed_pio_readmem(sc, (int)packet_ptr, (char *) &packet_hdr,
1959 sizeof(packet_hdr));
1960 len = packet_hdr.count;
1961 if (len > (ETHER_MAX_LEN + sizeof(struct ed_ring)) ||
1962 len < (ETHER_HDR_SIZE + sizeof(struct ed_ring))) {
1963 /*
1964 * Length is a wild value. There's a good chance that
1965 * this was caused by the NIC being old and buggy.
1966 * The bug is that the length low byte is duplicated in
1967 * the high byte. Try to recalculate the length based on
1968 * the pointer to the next packet.
1969 */
1970 /*
1971 * NOTE: sc->next_packet is pointing at the current packet.
1972 */
1973 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */
1974 if (packet_hdr.next_packet >= sc->next_packet) {
1975 len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE;
1976 } else {
1977 len += ((packet_hdr.next_packet - sc->rec_page_start) +
1978 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
1979 }
1980 }
1981 /*
1982 * Be fairly liberal about what we allow as a "reasonable" length
1983 * so that a [crufty] packet will make it to BPF (and can thus
1984 * be analyzed). Note that all that is really important is that
1985 * we have a length that will fit into one mbuf cluster or less;
1986 * the upper layer protocols can then figure out the length from
1987 * their own length field(s).
1988 */
1989 if ((len > sizeof(struct ed_ring)) &&
1990 (len <= MCLBYTES) &&
1991 (packet_hdr.next_packet >= sc->rec_page_start) &&
1992 (packet_hdr.next_packet < sc->rec_page_stop)) {
1993 /*
1994 * Go get packet.
1995 */
1996 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
1997 len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY);
1998 ifp->if_ipackets++;
1999 } else {
2000 /*
2001 * Really BAD. The ring pointers are corrupted.
2002 */
2003 log(LOG_ERR,
2004 "ed%d: NIC memory corrupt - invalid packet length %d\n",
2005 ifp->if_unit, len);
2006 ifp->if_ierrors++;
2007 ed_reset(ifp);
2008 return;
2009 }
2010
2011 /*
2012 * Update next packet pointer
2013 */
2014 sc->next_packet = packet_hdr.next_packet;
2015
2016 /*
2017 * Update NIC boundry pointer - being careful to keep it one
2018 * buffer behind. (as recommended by NS databook)
2019 */
2020 boundry = sc->next_packet - 1;
2021 if (boundry < sc->rec_page_start)
2022 boundry = sc->rec_page_stop - 1;
2023
2024 /*
2025 * Set NIC to page 0 registers to update boundry register
2026 */
2027 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2028
2029 outb(sc->nic_addr + ED_P0_BNRY, boundry);
2030
2031 /*
2032 * Set NIC to page 1 registers before looping to top (prepare
2033 * to get 'CURR' current pointer)
2034 */
2035 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
2036 }
2037}
2038
2039/*
2040 * Ethernet interface interrupt processor
2041 */
2042void
| 1545/*
1546 * Reset interface.
1547 */
1548static void
1549ed_reset(ifp)
1550 struct ifnet *ifp;
1551{
1552 struct ed_softc *sc = ifp->if_softc;
1553 int s;
1554
1555 if (sc->gone)
1556 return;
1557 s = splimp();
1558
1559 /*
1560 * Stop interface and re-initialize.
1561 */
1562 ed_stop(sc);
1563 ed_init(ifp);
1564
1565 (void) splx(s);
1566}
1567
1568/*
1569 * Take interface offline.
1570 */
1571static void
1572ed_stop(sc)
1573 struct ed_softc *sc;
1574{
1575 int n = 5000;
1576
1577 if (sc->gone)
1578 return;
1579 /*
1580 * Stop everything on the interface, and select page 0 registers.
1581 */
1582 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
1583
1584 /*
1585 * Wait for interface to enter stopped state, but limit # of checks to
1586 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
1587 * just in case it's an old one.
1588 */
1589 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n);
1590}
1591
1592/*
1593 * Device timeout/watchdog routine. Entered if the device neglects to
1594 * generate an interrupt after a transmit has been started on it.
1595 */
1596static void
1597ed_watchdog(ifp)
1598 struct ifnet *ifp;
1599{
1600 struct ed_softc *sc = ifp->if_softc;
1601
1602 if (sc->gone)
1603 return;
1604 log(LOG_ERR, "ed%d: device timeout\n", ifp->if_unit);
1605 ifp->if_oerrors++;
1606
1607 ed_reset(ifp);
1608}
1609
1610/*
1611 * Initialize device.
1612 */
1613static void
1614ed_init(ifp)
1615 struct ifnet *ifp;
1616{
1617 struct ed_softc *sc = ifp->if_softc;
1618 int i, s;
1619
1620 if (sc->gone)
1621 return;
1622
1623 /* address not known */
1624 if (ifp->if_addrlist == (struct ifaddr *) 0)
1625 return;
1626
1627 /*
1628 * Initialize the NIC in the exact order outlined in the NS manual.
1629 * This init procedure is "mandatory"...don't change what or when
1630 * things happen.
1631 */
1632 s = splimp();
1633
1634 /* reset transmitter flags */
1635 sc->xmit_busy = 0;
1636 ifp->if_timer = 0;
1637
1638 sc->txb_inuse = 0;
1639 sc->txb_new = 0;
1640 sc->txb_next_tx = 0;
1641
1642 /* This variable is used below - don't move this assignment */
1643 sc->next_packet = sc->rec_page_start + 1;
1644
1645 /*
1646 * Set interface for page 0, Remote DMA complete, Stopped
1647 */
1648 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
1649
1650 if (sc->isa16bit) {
1651
1652 /*
1653 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
1654 * order=80x86, word-wide DMA xfers,
1655 */
1656 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
1657 } else {
1658
1659 /*
1660 * Same as above, but byte-wide DMA xfers
1661 */
1662 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
1663 }
1664
1665 /*
1666 * Clear Remote Byte Count Registers
1667 */
1668 outb(sc->nic_addr + ED_P0_RBCR0, 0);
1669 outb(sc->nic_addr + ED_P0_RBCR1, 0);
1670
1671 /*
1672 * For the moment, don't store incoming packets in memory.
1673 */
1674 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
1675
1676 /*
1677 * Place NIC in internal loopback mode
1678 */
1679 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0);
1680
1681 /*
1682 * Initialize transmit/receive (ring-buffer) Page Start
1683 */
1684 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start);
1685 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start);
1686 /* Set lower bits of byte addressable framing to 0 */
1687 if (sc->is790)
1688 outb(sc->nic_addr + 0x09, 0);
1689
1690 /*
1691 * Initialize Receiver (ring-buffer) Page Stop and Boundry
1692 */
1693 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop);
1694 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start);
1695
1696 /*
1697 * Clear all interrupts. A '1' in each bit position clears the
1698 * corresponding flag.
1699 */
1700 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1701
1702 /*
1703 * Enable the following interrupts: receive/transmit complete,
1704 * receive/transmit error, and Receiver OverWrite.
1705 *
1706 * Counter overflow and Remote DMA complete are *not* enabled.
1707 */
1708 outb(sc->nic_addr + ED_P0_IMR,
1709 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
1710
1711 /*
1712 * Program Command Register for page 1
1713 */
1714 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1715
1716 /*
1717 * Copy out our station address
1718 */
1719 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1720 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]);
1721
1722 /*
1723 * Set Current Page pointer to next_packet (initialized above)
1724 */
1725 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet);
1726
1727 /*
1728 * Program Receiver Configuration Register and multicast filter. CR is
1729 * set to page 0 on return.
1730 */
1731 ed_setrcr(sc);
1732
1733 /*
1734 * Take interface out of loopback
1735 */
1736 outb(sc->nic_addr + ED_P0_TCR, 0);
1737
1738 /*
1739 * If this is a 3Com board, the tranceiver must be software enabled
1740 * (there is no settable hardware default).
1741 */
1742 if (sc->vendor == ED_VENDOR_3COM) {
1743 if (ifp->if_flags & IFF_ALTPHYS) {
1744 outb(sc->asic_addr + ED_3COM_CR, 0);
1745 } else {
1746 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
1747 }
1748 }
1749
1750 /*
1751 * Set 'running' flag, and clear output active flag.
1752 */
1753 ifp->if_flags |= IFF_RUNNING;
1754 ifp->if_flags &= ~IFF_OACTIVE;
1755
1756 /*
1757 * ...and attempt to start output
1758 */
1759 ed_start(ifp);
1760
1761 (void) splx(s);
1762}
1763
1764/*
1765 * This routine actually starts the transmission on the interface
1766 */
1767static inline void
1768ed_xmit(sc)
1769 struct ed_softc *sc;
1770{
1771 struct ifnet *ifp = (struct ifnet *)sc;
1772 unsigned short len;
1773
1774 if (sc->gone)
1775 return;
1776 len = sc->txb_len[sc->txb_next_tx];
1777
1778 /*
1779 * Set NIC for page 0 register access
1780 */
1781 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
1782
1783 /*
1784 * Set TX buffer start page
1785 */
1786 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start +
1787 sc->txb_next_tx * ED_TXBUF_SIZE);
1788
1789 /*
1790 * Set TX length
1791 */
1792 outb(sc->nic_addr + ED_P0_TBCR0, len);
1793 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8);
1794
1795 /*
1796 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
1797 */
1798 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
1799 sc->xmit_busy = 1;
1800
1801 /*
1802 * Point to next transmit buffer slot and wrap if necessary.
1803 */
1804 sc->txb_next_tx++;
1805 if (sc->txb_next_tx == sc->txb_cnt)
1806 sc->txb_next_tx = 0;
1807
1808 /*
1809 * Set a timer just in case we never hear from the board again
1810 */
1811 ifp->if_timer = 2;
1812}
1813
1814/*
1815 * Start output on interface.
1816 * We make two assumptions here:
1817 * 1) that the current priority is set to splimp _before_ this code
1818 * is called *and* is returned to the appropriate priority after
1819 * return
1820 * 2) that the IFF_OACTIVE flag is checked before this code is called
1821 * (i.e. that the output part of the interface is idle)
1822 */
1823static void
1824ed_start(ifp)
1825 struct ifnet *ifp;
1826{
1827 struct ed_softc *sc = ifp->if_softc;
1828 struct mbuf *m0, *m;
1829 caddr_t buffer;
1830 int len;
1831
1832 if (sc->gone) {
1833 printf("ed_start(%p) GONE\n",ifp);
1834 return;
1835 }
1836outloop:
1837
1838 /*
1839 * First, see if there are buffered packets and an idle transmitter -
1840 * should never happen at this point.
1841 */
1842 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
1843 printf("ed: packets buffered, but transmitter idle\n");
1844 ed_xmit(sc);
1845 }
1846
1847 /*
1848 * See if there is room to put another packet in the buffer.
1849 */
1850 if (sc->txb_inuse == sc->txb_cnt) {
1851
1852 /*
1853 * No room. Indicate this to the outside world and exit.
1854 */
1855 ifp->if_flags |= IFF_OACTIVE;
1856 return;
1857 }
1858 IF_DEQUEUE(&ifp->if_snd, m);
1859 if (m == 0) {
1860
1861 /*
1862 * We are using the !OACTIVE flag to indicate to the outside
1863 * world that we can accept an additional packet rather than
1864 * that the transmitter is _actually_ active. Indeed, the
1865 * transmitter may be active, but if we haven't filled all the
1866 * buffers with data then we still want to accept more.
1867 */
1868 ifp->if_flags &= ~IFF_OACTIVE;
1869 return;
1870 }
1871
1872 /*
1873 * Copy the mbuf chain into the transmit buffer
1874 */
1875
1876 m0 = m;
1877
1878 /* txb_new points to next open buffer slot */
1879 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
1880
1881 if (sc->mem_shared) {
1882
1883 /*
1884 * Special case setup for 16 bit boards...
1885 */
1886 if (sc->isa16bit) {
1887 switch (sc->vendor) {
1888
1889 /*
1890 * For 16bit 3Com boards (which have 16k of
1891 * memory), we have the xmit buffers in a
1892 * different page of memory ('page 0') - so
1893 * change pages.
1894 */
1895 case ED_VENDOR_3COM:
1896 outb(sc->asic_addr + ED_3COM_GACFR,
1897 ED_3COM_GACFR_RSEL);
1898 break;
1899
1900 /*
1901 * Enable 16bit access to shared memory on
1902 * WD/SMC boards.
1903 */
1904 case ED_VENDOR_WD_SMC:{
1905 outb(sc->asic_addr + ED_WD_LAAR,
1906 (sc->wd_laar_proto | ED_WD_LAAR_M16EN));
1907 if (sc->is790) {
1908 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
1909 }
1910 break;
1911 }
1912 }
1913 }
1914 for (len = 0; m != 0; m = m->m_next) {
1915 bcopy(mtod(m, caddr_t), buffer, m->m_len);
1916 buffer += m->m_len;
1917 len += m->m_len;
1918 }
1919
1920 /*
1921 * Restore previous shared memory access
1922 */
1923 if (sc->isa16bit) {
1924 switch (sc->vendor) {
1925 case ED_VENDOR_3COM:
1926 outb(sc->asic_addr + ED_3COM_GACFR,
1927 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1928 break;
1929 case ED_VENDOR_WD_SMC:{
1930 if (sc->is790) {
1931 outb(sc->asic_addr + ED_WD_MSR, 0x00);
1932 }
1933 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto);
1934 break;
1935 }
1936 }
1937 }
1938 } else {
1939 len = ed_pio_write_mbufs(sc, m, (int)buffer);
1940 if (len == 0)
1941 goto outloop;
1942 }
1943
1944 sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN);
1945
1946 sc->txb_inuse++;
1947
1948 /*
1949 * Point to next buffer slot and wrap if necessary.
1950 */
1951 sc->txb_new++;
1952 if (sc->txb_new == sc->txb_cnt)
1953 sc->txb_new = 0;
1954
1955 if (sc->xmit_busy == 0)
1956 ed_xmit(sc);
1957
1958 /*
1959 * Tap off here if there is a bpf listener.
1960 */
1961#if NBPFILTER > 0
1962 if (ifp->if_bpf) {
1963 bpf_mtap(ifp, m0);
1964 }
1965#endif
1966
1967 m_freem(m0);
1968
1969 /*
1970 * Loop back to the top to possibly buffer more packets
1971 */
1972 goto outloop;
1973}
1974
1975/*
1976 * Ethernet interface receiver interrupt.
1977 */
1978static inline void
1979ed_rint(sc)
1980 struct ed_softc *sc;
1981{
1982 struct ifnet *ifp = &sc->arpcom.ac_if;
1983 u_char boundry;
1984 u_short len;
1985 struct ed_ring packet_hdr;
1986 char *packet_ptr;
1987
1988 if (sc->gone)
1989 return;
1990
1991 /*
1992 * Set NIC to page 1 registers to get 'current' pointer
1993 */
1994 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
1995
1996 /*
1997 * 'sc->next_packet' is the logical beginning of the ring-buffer -
1998 * i.e. it points to where new data has been buffered. The 'CURR'
1999 * (current) register points to the logical end of the ring-buffer -
2000 * i.e. it points to where additional new data will be added. We loop
2001 * here until the logical beginning equals the logical end (or in
2002 * other words, until the ring-buffer is empty).
2003 */
2004 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) {
2005
2006 /* get pointer to this buffer's header structure */
2007 packet_ptr = sc->mem_ring +
2008 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
2009
2010 /*
2011 * The byte count includes a 4 byte header that was added by
2012 * the NIC.
2013 */
2014 if (sc->mem_shared)
2015 packet_hdr = *(struct ed_ring *) packet_ptr;
2016 else
2017 ed_pio_readmem(sc, (int)packet_ptr, (char *) &packet_hdr,
2018 sizeof(packet_hdr));
2019 len = packet_hdr.count;
2020 if (len > (ETHER_MAX_LEN + sizeof(struct ed_ring)) ||
2021 len < (ETHER_HDR_SIZE + sizeof(struct ed_ring))) {
2022 /*
2023 * Length is a wild value. There's a good chance that
2024 * this was caused by the NIC being old and buggy.
2025 * The bug is that the length low byte is duplicated in
2026 * the high byte. Try to recalculate the length based on
2027 * the pointer to the next packet.
2028 */
2029 /*
2030 * NOTE: sc->next_packet is pointing at the current packet.
2031 */
2032 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */
2033 if (packet_hdr.next_packet >= sc->next_packet) {
2034 len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE;
2035 } else {
2036 len += ((packet_hdr.next_packet - sc->rec_page_start) +
2037 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
2038 }
2039 }
2040 /*
2041 * Be fairly liberal about what we allow as a "reasonable" length
2042 * so that a [crufty] packet will make it to BPF (and can thus
2043 * be analyzed). Note that all that is really important is that
2044 * we have a length that will fit into one mbuf cluster or less;
2045 * the upper layer protocols can then figure out the length from
2046 * their own length field(s).
2047 */
2048 if ((len > sizeof(struct ed_ring)) &&
2049 (len <= MCLBYTES) &&
2050 (packet_hdr.next_packet >= sc->rec_page_start) &&
2051 (packet_hdr.next_packet < sc->rec_page_stop)) {
2052 /*
2053 * Go get packet.
2054 */
2055 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
2056 len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY);
2057 ifp->if_ipackets++;
2058 } else {
2059 /*
2060 * Really BAD. The ring pointers are corrupted.
2061 */
2062 log(LOG_ERR,
2063 "ed%d: NIC memory corrupt - invalid packet length %d\n",
2064 ifp->if_unit, len);
2065 ifp->if_ierrors++;
2066 ed_reset(ifp);
2067 return;
2068 }
2069
2070 /*
2071 * Update next packet pointer
2072 */
2073 sc->next_packet = packet_hdr.next_packet;
2074
2075 /*
2076 * Update NIC boundry pointer - being careful to keep it one
2077 * buffer behind. (as recommended by NS databook)
2078 */
2079 boundry = sc->next_packet - 1;
2080 if (boundry < sc->rec_page_start)
2081 boundry = sc->rec_page_stop - 1;
2082
2083 /*
2084 * Set NIC to page 0 registers to update boundry register
2085 */
2086 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2087
2088 outb(sc->nic_addr + ED_P0_BNRY, boundry);
2089
2090 /*
2091 * Set NIC to page 1 registers before looping to top (prepare
2092 * to get 'CURR' current pointer)
2093 */
2094 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
2095 }
2096}
2097
2098/*
2099 * Ethernet interface interrupt processor
2100 */
2101void
|
2043edintr(unit)
2044 int unit;
| 2102edintr_sc(sc)
2103 struct ed_softc *sc;
|
2045{
| 2104{
|
2046 struct ed_softc *sc = &ed_softc[unit];
| |
2047 struct ifnet *ifp = (struct ifnet *)sc;
2048 u_char isr;
2049
2050 if (sc->gone)
2051 return;
2052 /*
2053 * Set NIC to page 0 registers
2054 */
2055 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2056
2057 /*
2058 * loop until there are no more new interrupts
2059 */
2060 while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) {
2061
2062 /*
2063 * reset all the bits that we are 'acknowledging' by writing a
2064 * '1' to each bit position that was set (writing a '1'
2065 * *clears* the bit)
2066 */
2067 outb(sc->nic_addr + ED_P0_ISR, isr);
2068
2069 /*
2070 * Handle transmitter interrupts. Handle these first because
2071 * the receiver will reset the board under some conditions.
2072 */
2073 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
2074 u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f;
2075
2076 /*
2077 * Check for transmit error. If a TX completed with an
2078 * error, we end up throwing the packet away. Really
2079 * the only error that is possible is excessive
2080 * collisions, and in this case it is best to allow
2081 * the automatic mechanisms of TCP to backoff the
2082 * flow. Of course, with UDP we're screwed, but this
2083 * is expected when a network is heavily loaded.
2084 */
2085 (void) inb(sc->nic_addr + ED_P0_TSR);
2086 if (isr & ED_ISR_TXE) {
2087
2088 /*
2089 * Excessive collisions (16)
2090 */
2091 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT)
2092 && (collisions == 0)) {
2093
2094 /*
2095 * When collisions total 16, the
2096 * P0_NCR will indicate 0, and the
2097 * TSR_ABT is set.
2098 */
2099 collisions = 16;
2100 }
2101
2102 /*
2103 * update output errors counter
2104 */
2105 ifp->if_oerrors++;
2106 } else {
2107
2108 /*
2109 * Update total number of successfully
2110 * transmitted packets.
2111 */
2112 ifp->if_opackets++;
2113 }
2114
2115 /*
2116 * reset tx busy and output active flags
2117 */
2118 sc->xmit_busy = 0;
2119 ifp->if_flags &= ~IFF_OACTIVE;
2120
2121 /*
2122 * clear watchdog timer
2123 */
2124 ifp->if_timer = 0;
2125
2126 /*
2127 * Add in total number of collisions on last
2128 * transmission.
2129 */
2130 ifp->if_collisions += collisions;
2131
2132 /*
2133 * Decrement buffer in-use count if not zero (can only
2134 * be zero if a transmitter interrupt occured while
2135 * not actually transmitting). If data is ready to
2136 * transmit, start it transmitting, otherwise defer
2137 * until after handling receiver
2138 */
2139 if (sc->txb_inuse && --sc->txb_inuse)
2140 ed_xmit(sc);
2141 }
2142
2143 /*
2144 * Handle receiver interrupts
2145 */
2146 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
2147
2148 /*
2149 * Overwrite warning. In order to make sure that a
2150 * lockup of the local DMA hasn't occurred, we reset
2151 * and re-init the NIC. The NSC manual suggests only a
2152 * partial reset/re-init is necessary - but some chips
2153 * seem to want more. The DMA lockup has been seen
2154 * only with early rev chips - Methinks this bug was
2155 * fixed in later revs. -DG
2156 */
2157 if (isr & ED_ISR_OVW) {
2158 ifp->if_ierrors++;
2159#ifdef DIAGNOSTIC
2160 log(LOG_WARNING,
2161 "ed%d: warning - receiver ring buffer overrun\n",
2162 ifp->if_unit);
2163#endif
2164
2165 /*
2166 * Stop/reset/re-init NIC
2167 */
2168 ed_reset(ifp);
2169 } else {
2170
2171 /*
2172 * Receiver Error. One or more of: CRC error,
2173 * frame alignment error FIFO overrun, or
2174 * missed packet.
2175 */
2176 if (isr & ED_ISR_RXE) {
2177 ifp->if_ierrors++;
2178#ifdef ED_DEBUG
2179 printf("ed%d: receive error %x\n", ifp->if_unit,
2180 inb(sc->nic_addr + ED_P0_RSR));
2181#endif
2182 }
2183
2184 /*
2185 * Go get the packet(s) XXX - Doing this on an
2186 * error is dubious because there shouldn't be
2187 * any data to get (we've configured the
2188 * interface to not accept packets with
2189 * errors).
2190 */
2191
2192 /*
2193 * Enable 16bit access to shared memory first
2194 * on WD/SMC boards.
2195 */
2196 if (sc->isa16bit &&
2197 (sc->vendor == ED_VENDOR_WD_SMC)) {
2198
2199 outb(sc->asic_addr + ED_WD_LAAR,
2200 (sc->wd_laar_proto |=
2201 ED_WD_LAAR_M16EN));
2202 if (sc->is790) {
2203 outb(sc->asic_addr + ED_WD_MSR,
2204 ED_WD_MSR_MENB);
2205 }
2206 }
2207 ed_rint(sc);
2208
2209 /* disable 16bit access */
2210 if (sc->isa16bit &&
2211 (sc->vendor == ED_VENDOR_WD_SMC)) {
2212
2213 if (sc->is790) {
2214 outb(sc->asic_addr + ED_WD_MSR, 0x00);
2215 }
2216 outb(sc->asic_addr + ED_WD_LAAR,
2217 (sc->wd_laar_proto &=
2218 ~ED_WD_LAAR_M16EN));
2219 }
2220 }
2221 }
2222
2223 /*
2224 * If it looks like the transmitter can take more data,
2225 * attempt to start output on the interface. This is done
2226 * after handling the receiver to give the receiver priority.
2227 */
2228 if ((ifp->if_flags & IFF_OACTIVE) == 0)
2229 ed_start(ifp);
2230
2231 /*
2232 * return NIC CR to standard state: page 0, remote DMA
2233 * complete, start (toggling the TXP bit off, even if was just
2234 * set in the transmit routine, is *okay* - it is 'edge'
2235 * triggered from low to high)
2236 */
2237 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2238
2239 /*
2240 * If the Network Talley Counters overflow, read them to reset
2241 * them. It appears that old 8390's won't clear the ISR flag
2242 * otherwise - resulting in an infinite loop.
2243 */
2244 if (isr & ED_ISR_CNT) {
2245 (void) inb(sc->nic_addr + ED_P0_CNTR0);
2246 (void) inb(sc->nic_addr + ED_P0_CNTR1);
2247 (void) inb(sc->nic_addr + ED_P0_CNTR2);
2248 }
2249 }
2250}
2251
| 2105 struct ifnet *ifp = (struct ifnet *)sc;
2106 u_char isr;
2107
2108 if (sc->gone)
2109 return;
2110 /*
2111 * Set NIC to page 0 registers
2112 */
2113 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2114
2115 /*
2116 * loop until there are no more new interrupts
2117 */
2118 while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) {
2119
2120 /*
2121 * reset all the bits that we are 'acknowledging' by writing a
2122 * '1' to each bit position that was set (writing a '1'
2123 * *clears* the bit)
2124 */
2125 outb(sc->nic_addr + ED_P0_ISR, isr);
2126
2127 /*
2128 * Handle transmitter interrupts. Handle these first because
2129 * the receiver will reset the board under some conditions.
2130 */
2131 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
2132 u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f;
2133
2134 /*
2135 * Check for transmit error. If a TX completed with an
2136 * error, we end up throwing the packet away. Really
2137 * the only error that is possible is excessive
2138 * collisions, and in this case it is best to allow
2139 * the automatic mechanisms of TCP to backoff the
2140 * flow. Of course, with UDP we're screwed, but this
2141 * is expected when a network is heavily loaded.
2142 */
2143 (void) inb(sc->nic_addr + ED_P0_TSR);
2144 if (isr & ED_ISR_TXE) {
2145
2146 /*
2147 * Excessive collisions (16)
2148 */
2149 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT)
2150 && (collisions == 0)) {
2151
2152 /*
2153 * When collisions total 16, the
2154 * P0_NCR will indicate 0, and the
2155 * TSR_ABT is set.
2156 */
2157 collisions = 16;
2158 }
2159
2160 /*
2161 * update output errors counter
2162 */
2163 ifp->if_oerrors++;
2164 } else {
2165
2166 /*
2167 * Update total number of successfully
2168 * transmitted packets.
2169 */
2170 ifp->if_opackets++;
2171 }
2172
2173 /*
2174 * reset tx busy and output active flags
2175 */
2176 sc->xmit_busy = 0;
2177 ifp->if_flags &= ~IFF_OACTIVE;
2178
2179 /*
2180 * clear watchdog timer
2181 */
2182 ifp->if_timer = 0;
2183
2184 /*
2185 * Add in total number of collisions on last
2186 * transmission.
2187 */
2188 ifp->if_collisions += collisions;
2189
2190 /*
2191 * Decrement buffer in-use count if not zero (can only
2192 * be zero if a transmitter interrupt occured while
2193 * not actually transmitting). If data is ready to
2194 * transmit, start it transmitting, otherwise defer
2195 * until after handling receiver
2196 */
2197 if (sc->txb_inuse && --sc->txb_inuse)
2198 ed_xmit(sc);
2199 }
2200
2201 /*
2202 * Handle receiver interrupts
2203 */
2204 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
2205
2206 /*
2207 * Overwrite warning. In order to make sure that a
2208 * lockup of the local DMA hasn't occurred, we reset
2209 * and re-init the NIC. The NSC manual suggests only a
2210 * partial reset/re-init is necessary - but some chips
2211 * seem to want more. The DMA lockup has been seen
2212 * only with early rev chips - Methinks this bug was
2213 * fixed in later revs. -DG
2214 */
2215 if (isr & ED_ISR_OVW) {
2216 ifp->if_ierrors++;
2217#ifdef DIAGNOSTIC
2218 log(LOG_WARNING,
2219 "ed%d: warning - receiver ring buffer overrun\n",
2220 ifp->if_unit);
2221#endif
2222
2223 /*
2224 * Stop/reset/re-init NIC
2225 */
2226 ed_reset(ifp);
2227 } else {
2228
2229 /*
2230 * Receiver Error. One or more of: CRC error,
2231 * frame alignment error FIFO overrun, or
2232 * missed packet.
2233 */
2234 if (isr & ED_ISR_RXE) {
2235 ifp->if_ierrors++;
2236#ifdef ED_DEBUG
2237 printf("ed%d: receive error %x\n", ifp->if_unit,
2238 inb(sc->nic_addr + ED_P0_RSR));
2239#endif
2240 }
2241
2242 /*
2243 * Go get the packet(s) XXX - Doing this on an
2244 * error is dubious because there shouldn't be
2245 * any data to get (we've configured the
2246 * interface to not accept packets with
2247 * errors).
2248 */
2249
2250 /*
2251 * Enable 16bit access to shared memory first
2252 * on WD/SMC boards.
2253 */
2254 if (sc->isa16bit &&
2255 (sc->vendor == ED_VENDOR_WD_SMC)) {
2256
2257 outb(sc->asic_addr + ED_WD_LAAR,
2258 (sc->wd_laar_proto |=
2259 ED_WD_LAAR_M16EN));
2260 if (sc->is790) {
2261 outb(sc->asic_addr + ED_WD_MSR,
2262 ED_WD_MSR_MENB);
2263 }
2264 }
2265 ed_rint(sc);
2266
2267 /* disable 16bit access */
2268 if (sc->isa16bit &&
2269 (sc->vendor == ED_VENDOR_WD_SMC)) {
2270
2271 if (sc->is790) {
2272 outb(sc->asic_addr + ED_WD_MSR, 0x00);
2273 }
2274 outb(sc->asic_addr + ED_WD_LAAR,
2275 (sc->wd_laar_proto &=
2276 ~ED_WD_LAAR_M16EN));
2277 }
2278 }
2279 }
2280
2281 /*
2282 * If it looks like the transmitter can take more data,
2283 * attempt to start output on the interface. This is done
2284 * after handling the receiver to give the receiver priority.
2285 */
2286 if ((ifp->if_flags & IFF_OACTIVE) == 0)
2287 ed_start(ifp);
2288
2289 /*
2290 * return NIC CR to standard state: page 0, remote DMA
2291 * complete, start (toggling the TXP bit off, even if was just
2292 * set in the transmit routine, is *okay* - it is 'edge'
2293 * triggered from low to high)
2294 */
2295 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2296
2297 /*
2298 * If the Network Talley Counters overflow, read them to reset
2299 * them. It appears that old 8390's won't clear the ISR flag
2300 * otherwise - resulting in an infinite loop.
2301 */
2302 if (isr & ED_ISR_CNT) {
2303 (void) inb(sc->nic_addr + ED_P0_CNTR0);
2304 (void) inb(sc->nic_addr + ED_P0_CNTR1);
2305 (void) inb(sc->nic_addr + ED_P0_CNTR2);
2306 }
2307 }
2308}
2309
|
| 2310void
2311edintr(unit)
2312 int unit;
2313{
2314 edintr_sc (&ed_softc[unit]);
2315}
2316
|
2252/*
2253 * Process an ioctl request. This code needs some work - it looks
2254 * pretty ugly.
2255 */
2256static int
2257ed_ioctl(ifp, command, data)
2258 register struct ifnet *ifp;
2259 int command;
2260 caddr_t data;
2261{
2262 register struct ifaddr *ifa = (struct ifaddr *) data;
2263 struct ed_softc *sc = ifp->if_softc;
2264 struct ifreq *ifr = (struct ifreq *) data;
2265 int s, error = 0;
2266
2267 if (sc->gone) {
2268 ifp->if_flags &= ~IFF_RUNNING;
2269 return ENXIO;
2270 }
2271 s = splimp();
2272
2273 switch (command) {
2274
2275 case SIOCSIFADDR:
2276 ifp->if_flags |= IFF_UP;
2277 /* netifs are BUSY when UP */
2278 sc->kdc.kdc_state = DC_BUSY;
2279
2280 switch (ifa->ifa_addr->sa_family) {
2281#ifdef INET
2282 case AF_INET:
2283 ed_init(ifp); /* before arpwhohas */
2284 arp_ifinit((struct arpcom *)ifp, ifa);
2285 break;
2286#endif
2287#ifdef IPX
2288 /*
2289 * XXX - This code is probably wrong
2290 */
2291 case AF_IPX:
2292 {
2293 register struct ipx_addr *ina = &(IA_SIPX(ifa)->sipx_addr);
2294
2295 if (ipx_nullhost(*ina))
2296 ina->x_host =
2297 *(union ipx_host *) (sc->arpcom.ac_enaddr);
2298 else {
2299 bcopy((caddr_t) ina->x_host.c_host,
2300 (caddr_t) sc->arpcom.ac_enaddr,
2301 sizeof(sc->arpcom.ac_enaddr));
2302 }
2303
2304 /*
2305 * Set new address
2306 */
2307 ed_init(ifp);
2308 break;
2309 }
2310#endif
2311#ifdef NS
2312 /*
2313 * XXX - This code is probably wrong
2314 */
2315 case AF_NS:
2316 {
2317 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
2318
2319 if (ns_nullhost(*ina))
2320 ina->x_host =
2321 *(union ns_host *) (sc->arpcom.ac_enaddr);
2322 else {
2323 bcopy((caddr_t) ina->x_host.c_host,
2324 (caddr_t) sc->arpcom.ac_enaddr,
2325 sizeof(sc->arpcom.ac_enaddr));
2326 }
2327
2328 /*
2329 * Set new address
2330 */
2331 ed_init(ifp);
2332 break;
2333 }
2334#endif
2335 default:
2336 ed_init(ifp);
2337 break;
2338 }
2339 break;
2340
2341 case SIOCGIFADDR:
2342 {
2343 struct sockaddr *sa;
2344
2345 sa = (struct sockaddr *) & ifr->ifr_data;
2346 bcopy((caddr_t) sc->arpcom.ac_enaddr,
2347 (caddr_t) sa->sa_data, ETHER_ADDR_LEN);
2348 }
2349 break;
2350
2351 case SIOCSIFFLAGS:
2352
2353 /*
2354 * If the interface is marked up and stopped, then start it.
2355 * If it is marked down and running, then stop it.
2356 */
2357 if (ifp->if_flags & IFF_UP) {
2358 if ((ifp->if_flags & IFF_RUNNING) == 0)
2359 ed_init(ifp);
2360 } else {
2361 if (ifp->if_flags & IFF_RUNNING) {
2362 ed_stop(sc);
2363 ifp->if_flags &= ~IFF_RUNNING;
2364 }
2365 }
2366 /* UP controls BUSY/IDLE */
2367 sc->kdc.kdc_state = ((ifp->if_flags & IFF_UP)
2368 ? DC_BUSY
2369 : DC_IDLE);
2370
2371#if NBPFILTER > 0
2372
2373 /*
2374 * Promiscuous flag may have changed, so reprogram the RCR.
2375 */
2376 ed_setrcr(sc);
2377#endif
2378
2379 /*
2380 * An unfortunate hack to provide the (required) software
2381 * control of the tranceiver for 3Com boards. The ALTPHYS flag
2382 * disables the tranceiver if set.
2383 */
2384 if (sc->vendor == ED_VENDOR_3COM) {
2385 if (ifp->if_flags & IFF_ALTPHYS) {
2386 outb(sc->asic_addr + ED_3COM_CR, 0);
2387 } else {
2388 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
2389 }
2390 }
2391 break;
2392
2393 case SIOCADDMULTI:
2394 case SIOCDELMULTI:
2395 /*
2396 * Update out multicast list.
2397 */
2398 error = (command == SIOCADDMULTI) ?
2399 ether_addmulti(ifr, &sc->arpcom) :
2400 ether_delmulti(ifr, &sc->arpcom);
2401
2402 if (error == ENETRESET) {
2403
2404 /*
2405 * Multicast list has changed; set the hardware filter
2406 * accordingly.
2407 */
2408 ed_setrcr(sc);
2409 error = 0;
2410 }
2411 break;
2412
2413 case SIOCSIFMTU:
2414 /*
2415 * Set the interface MTU.
2416 */
2417 if (ifr->ifr_mtu > ETHERMTU) {
2418 error = EINVAL;
2419 } else {
2420 ifp->if_mtu = ifr->ifr_mtu;
2421 }
2422 break;
2423
2424 default:
2425 error = EINVAL;
2426 }
2427 (void) splx(s);
2428 return (error);
2429}
2430
2431/*
2432 * Given a source and destination address, copy 'amount' of a packet from
2433 * the ring buffer into a linear destination buffer. Takes into account
2434 * ring-wrap.
2435 */
2436static inline char *
2437ed_ring_copy(sc, src, dst, amount)
2438 struct ed_softc *sc;
2439 char *src;
2440 char *dst;
2441 u_short amount;
2442{
2443 u_short tmp_amount;
2444
2445 /* does copy wrap to lower addr in ring buffer? */
2446 if (src + amount > sc->mem_end) {
2447 tmp_amount = sc->mem_end - src;
2448
2449 /* copy amount up to end of NIC memory */
2450 if (sc->mem_shared)
2451 bcopy(src, dst, tmp_amount);
2452 else
2453 ed_pio_readmem(sc, (int)src, dst, tmp_amount);
2454
2455 amount -= tmp_amount;
2456 src = sc->mem_ring;
2457 dst += tmp_amount;
2458 }
2459 if (sc->mem_shared)
2460 bcopy(src, dst, amount);
2461 else
2462 ed_pio_readmem(sc, (int)src, dst, amount);
2463
2464 return (src + amount);
2465}
2466
2467/*
2468 * Retreive packet from shared memory and send to the next level up via
2469 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2470 */
2471static void
2472ed_get_packet(sc, buf, len, multicast)
2473 struct ed_softc *sc;
2474 char *buf;
2475 u_short len;
2476 int multicast;
2477{
2478 struct ether_header *eh;
2479 struct mbuf *m;
2480
2481 /* Allocate a header mbuf */
2482 MGETHDR(m, M_DONTWAIT, MT_DATA);
2483 if (m == NULL)
2484 return;
2485 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
2486 m->m_pkthdr.len = m->m_len = len;
2487
2488 /*
2489 * We always put the received packet in a single buffer -
2490 * either with just an mbuf header or in a cluster attached
2491 * to the header. The +2 is to compensate for the alignment
2492 * fixup below.
2493 */
2494 if ((len + 2) > MHLEN) {
2495 /* Attach an mbuf cluster */
2496 MCLGET(m, M_DONTWAIT);
2497
2498 /* Insist on getting a cluster */
2499 if ((m->m_flags & M_EXT) == 0) {
2500 m_freem(m);
2501 return;
2502 }
2503 }
2504
2505 /*
2506 * The +2 is to longword align the start of the real packet.
2507 * This is important for NFS.
2508 */
2509 m->m_data += 2;
2510 eh = mtod(m, struct ether_header *);
2511
2512 /*
2513 * Get packet, including link layer address, from interface.
2514 */
2515 ed_ring_copy(sc, buf, (char *)eh, len);
2516
2517#if NBPFILTER > 0
2518
2519 /*
2520 * Check if there's a BPF listener on this interface. If so, hand off
2521 * the raw packet to bpf.
2522 */
2523 if (sc->arpcom.ac_if.if_bpf) {
2524 bpf_mtap(&sc->arpcom.ac_if, m);
2525
2526 /*
2527 * Note that the interface cannot be in promiscuous mode if
2528 * there are no BPF listeners. And if we are in promiscuous
2529 * mode, we have to check if this packet is really ours.
2530 */
2531 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) &&
2532 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
2533 sizeof(eh->ether_dhost)) != 0 && multicast == 0) {
2534 m_freem(m);
2535 return;
2536 }
2537 }
2538#endif
2539
2540 /*
2541 * Remove link layer address.
2542 */
2543 m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header);
2544 m->m_data += sizeof(struct ether_header);
2545
2546 ether_input(&sc->arpcom.ac_if, eh, m);
2547 return;
2548}
2549
2550/*
2551 * Supporting routines
2552 */
2553
2554/*
2555 * Given a NIC memory source address and a host memory destination
2556 * address, copy 'amount' from NIC to host using Programmed I/O.
2557 * The 'amount' is rounded up to a word - okay as long as mbufs
2558 * are word sized.
2559 * This routine is currently Novell-specific.
2560 */
2561static void
2562ed_pio_readmem(sc, src, dst, amount)
2563 struct ed_softc *sc;
2564 int src;
2565 unsigned char *dst;
2566 unsigned short amount;
2567{
2568 /* select page 0 registers */
2569 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
2570
2571 /* round up to a word */
2572 if (amount & 1)
2573 ++amount;
2574
2575 /* set up DMA byte count */
2576 outb(sc->nic_addr + ED_P0_RBCR0, amount);
2577 outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8);
2578
2579 /* set up source address in NIC mem */
2580 outb(sc->nic_addr + ED_P0_RSAR0, src);
2581 outb(sc->nic_addr + ED_P0_RSAR1, src >> 8);
2582
2583 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
2584
2585 if (sc->isa16bit) {
2586 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2);
2587 } else
2588 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount);
2589
2590}
2591
2592/*
2593 * Stripped down routine for writing a linear buffer to NIC memory.
2594 * Only used in the probe routine to test the memory. 'len' must
2595 * be even.
2596 */
2597static void
2598ed_pio_writemem(sc, src, dst, len)
2599 struct ed_softc *sc;
2600 char *src;
2601 unsigned short dst;
2602 unsigned short len;
2603{
2604 int maxwait = 200; /* about 240us */
2605
2606 /* select page 0 registers */
2607 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
2608
2609 /* reset remote DMA complete flag */
2610 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
2611
2612 /* set up DMA byte count */
2613 outb(sc->nic_addr + ED_P0_RBCR0, len);
2614 outb(sc->nic_addr + ED_P0_RBCR1, len >> 8);
2615
2616 /* set up destination address in NIC mem */
2617 outb(sc->nic_addr + ED_P0_RSAR0, dst);
2618 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
2619
2620 /* set remote DMA write */
2621 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
2622
2623 if (sc->isa16bit)
2624 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2);
2625 else
2626 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len);
2627
2628 /*
2629 * Wait for remote DMA complete. This is necessary because on the
2630 * transmit side, data is handled internally by the NIC in bursts and
2631 * we can't start another remote DMA until this one completes. Not
2632 * waiting causes really bad things to happen - like the NIC
2633 * irrecoverably jamming the ISA bus.
2634 */
2635 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
2636}
2637
2638/*
2639 * Write an mbuf chain to the destination NIC memory address using
2640 * programmed I/O.
2641 */
2642static u_short
2643ed_pio_write_mbufs(sc, m, dst)
2644 struct ed_softc *sc;
2645 struct mbuf *m;
2646 int dst;
2647{
2648 struct ifnet *ifp = (struct ifnet *)sc;
2649 unsigned short total_len, dma_len;
2650 struct mbuf *mp;
2651 int maxwait = 200; /* about 240us */
2652
2653 /* First, count up the total number of bytes to copy */
2654 for (total_len = 0, mp = m; mp; mp = mp->m_next)
2655 total_len += mp->m_len;
2656
2657 dma_len = total_len;
2658 if (sc->isa16bit && (dma_len & 1))
2659 dma_len++;
2660
2661 /* select page 0 registers */
2662 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
2663
2664 /* reset remote DMA complete flag */
2665 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
2666
2667 /* set up DMA byte count */
2668 outb(sc->nic_addr + ED_P0_RBCR0, dma_len);
2669 outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8);
2670
2671 /* set up destination address in NIC mem */
2672 outb(sc->nic_addr + ED_P0_RSAR0, dst);
2673 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
2674
2675 /* set remote DMA write */
2676 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
2677
2678 /*
2679 * Transfer the mbuf chain to the NIC memory.
2680 * 16-bit cards require that data be transferred as words, and only words.
2681 * So that case requires some extra code to patch over odd-length mbufs.
2682 */
2683
2684 if (!sc->isa16bit) {
2685 /* NE1000s are easy */
2686 while (m) {
2687 if (m->m_len) {
2688 outsb(sc->asic_addr + ED_NOVELL_DATA,
2689 m->m_data, m->m_len);
2690 }
2691 m = m->m_next;
2692 }
2693 } else {
2694 /* NE2000s are a pain */
2695 unsigned char *data;
2696 int len, wantbyte;
2697 unsigned char savebyte[2];
2698
2699 wantbyte = 0;
2700
2701 while (m) {
2702 len = m->m_len;
2703 if (len) {
2704 data = mtod(m, caddr_t);
2705 /* finish the last word */
2706 if (wantbyte) {
2707 savebyte[1] = *data;
2708 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
2709 data++;
2710 len--;
2711 wantbyte = 0;
2712 }
2713 /* output contiguous words */
2714 if (len > 1) {
2715 outsw(sc->asic_addr + ED_NOVELL_DATA,
2716 data, len >> 1);
2717 data += len & ~1;
2718 len &= 1;
2719 }
2720 /* save last byte, if necessary */
2721 if (len == 1) {
2722 savebyte[0] = *data;
2723 wantbyte = 1;
2724 }
2725 }
2726 m = m->m_next;
2727 }
2728 /* spit last byte */
2729 if (wantbyte) {
2730 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
2731 }
2732 }
2733
2734 /*
2735 * Wait for remote DMA complete. This is necessary because on the
2736 * transmit side, data is handled internally by the NIC in bursts and
2737 * we can't start another remote DMA until this one completes. Not
2738 * waiting causes really bad things to happen - like the NIC
2739 * irrecoverably jamming the ISA bus.
2740 */
2741 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
2742
2743 if (!maxwait) {
2744 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n",
2745 ifp->if_unit);
2746 ed_reset(ifp);
2747 return(0);
2748 }
2749 return (total_len);
2750}
2751
2752static void
2753ed_setrcr(sc)
2754 struct ed_softc *sc;
2755{
2756 struct ifnet *ifp = (struct ifnet *)sc;
2757 int i;
2758
2759 /* set page 1 registers */
2760 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
2761
2762 if (ifp->if_flags & IFF_PROMISC) {
2763
2764 /*
2765 * Reconfigure the multicast filter.
2766 */
2767 for (i = 0; i < 8; i++)
2768 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff);
2769
2770 /*
2771 * And turn on promiscuous mode. Also enable reception of
2772 * runts and packets with CRC & alignment errors.
2773 */
2774 /* Set page 0 registers */
2775 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2776
2777 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
2778 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP);
2779 } else {
2780 /* set up multicast addresses and filter modes */
2781 if (ifp->if_flags & IFF_MULTICAST) {
2782 u_long mcaf[2];
2783
2784 if (ifp->if_flags & IFF_ALLMULTI) {
2785 mcaf[0] = 0xffffffff;
2786 mcaf[1] = 0xffffffff;
2787 } else
2788 ds_getmcaf(sc, mcaf);
2789
2790 /*
2791 * Set multicast filter on chip.
2792 */
2793 for (i = 0; i < 8; i++)
2794 outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]);
2795
2796 /* Set page 0 registers */
2797 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2798
2799 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB);
2800 } else {
2801
2802 /*
2803 * Initialize multicast address hashing registers to
2804 * not accept multicasts.
2805 */
2806 for (i = 0; i < 8; ++i)
2807 outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00);
2808
2809 /* Set page 0 registers */
2810 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2811
2812 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
2813 }
2814 }
2815
2816 /*
2817 * Start interface.
2818 */
2819 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2820}
2821
2822/*
2823 * Compute crc for ethernet address
2824 */
2825static u_long
2826ds_crc(ep)
2827 u_char *ep;
2828{
2829#define POLYNOMIAL 0x04c11db6
2830 register u_long crc = 0xffffffffL;
2831 register int carry, i, j;
2832 register u_char b;
2833
2834 for (i = 6; --i >= 0;) {
2835 b = *ep++;
2836 for (j = 8; --j >= 0;) {
2837 carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01);
2838 crc <<= 1;
2839 b >>= 1;
2840 if (carry)
2841 crc = ((crc ^ POLYNOMIAL) | carry);
2842 }
2843 }
2844 return crc;
2845#undef POLYNOMIAL
2846}
2847
2848/*
2849 * Compute the multicast address filter from the
2850 * list of multicast addresses we need to listen to.
2851 */
2852static void
2853ds_getmcaf(sc, mcaf)
2854 struct ed_softc *sc;
2855 u_long *mcaf;
2856{
2857 register u_int index;
2858 register u_char *af = (u_char *) mcaf;
2859 register struct ether_multi *enm;
2860 register struct ether_multistep step;
2861
2862 mcaf[0] = 0;
2863 mcaf[1] = 0;
2864
2865 ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
2866 while (enm != NULL) {
2867 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) {
2868 mcaf[0] = 0xffffffff;
2869 mcaf[1] = 0xffffffff;
2870 return;
2871 }
2872 index = ds_crc(enm->enm_addrlo) >> 26;
2873 af[index >> 3] |= 1 << (index & 7);
2874
2875 ETHER_NEXT_MULTI(step, enm);
2876 }
2877}
| 2317/*
2318 * Process an ioctl request. This code needs some work - it looks
2319 * pretty ugly.
2320 */
2321static int
2322ed_ioctl(ifp, command, data)
2323 register struct ifnet *ifp;
2324 int command;
2325 caddr_t data;
2326{
2327 register struct ifaddr *ifa = (struct ifaddr *) data;
2328 struct ed_softc *sc = ifp->if_softc;
2329 struct ifreq *ifr = (struct ifreq *) data;
2330 int s, error = 0;
2331
2332 if (sc->gone) {
2333 ifp->if_flags &= ~IFF_RUNNING;
2334 return ENXIO;
2335 }
2336 s = splimp();
2337
2338 switch (command) {
2339
2340 case SIOCSIFADDR:
2341 ifp->if_flags |= IFF_UP;
2342 /* netifs are BUSY when UP */
2343 sc->kdc.kdc_state = DC_BUSY;
2344
2345 switch (ifa->ifa_addr->sa_family) {
2346#ifdef INET
2347 case AF_INET:
2348 ed_init(ifp); /* before arpwhohas */
2349 arp_ifinit((struct arpcom *)ifp, ifa);
2350 break;
2351#endif
2352#ifdef IPX
2353 /*
2354 * XXX - This code is probably wrong
2355 */
2356 case AF_IPX:
2357 {
2358 register struct ipx_addr *ina = &(IA_SIPX(ifa)->sipx_addr);
2359
2360 if (ipx_nullhost(*ina))
2361 ina->x_host =
2362 *(union ipx_host *) (sc->arpcom.ac_enaddr);
2363 else {
2364 bcopy((caddr_t) ina->x_host.c_host,
2365 (caddr_t) sc->arpcom.ac_enaddr,
2366 sizeof(sc->arpcom.ac_enaddr));
2367 }
2368
2369 /*
2370 * Set new address
2371 */
2372 ed_init(ifp);
2373 break;
2374 }
2375#endif
2376#ifdef NS
2377 /*
2378 * XXX - This code is probably wrong
2379 */
2380 case AF_NS:
2381 {
2382 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
2383
2384 if (ns_nullhost(*ina))
2385 ina->x_host =
2386 *(union ns_host *) (sc->arpcom.ac_enaddr);
2387 else {
2388 bcopy((caddr_t) ina->x_host.c_host,
2389 (caddr_t) sc->arpcom.ac_enaddr,
2390 sizeof(sc->arpcom.ac_enaddr));
2391 }
2392
2393 /*
2394 * Set new address
2395 */
2396 ed_init(ifp);
2397 break;
2398 }
2399#endif
2400 default:
2401 ed_init(ifp);
2402 break;
2403 }
2404 break;
2405
2406 case SIOCGIFADDR:
2407 {
2408 struct sockaddr *sa;
2409
2410 sa = (struct sockaddr *) & ifr->ifr_data;
2411 bcopy((caddr_t) sc->arpcom.ac_enaddr,
2412 (caddr_t) sa->sa_data, ETHER_ADDR_LEN);
2413 }
2414 break;
2415
2416 case SIOCSIFFLAGS:
2417
2418 /*
2419 * If the interface is marked up and stopped, then start it.
2420 * If it is marked down and running, then stop it.
2421 */
2422 if (ifp->if_flags & IFF_UP) {
2423 if ((ifp->if_flags & IFF_RUNNING) == 0)
2424 ed_init(ifp);
2425 } else {
2426 if (ifp->if_flags & IFF_RUNNING) {
2427 ed_stop(sc);
2428 ifp->if_flags &= ~IFF_RUNNING;
2429 }
2430 }
2431 /* UP controls BUSY/IDLE */
2432 sc->kdc.kdc_state = ((ifp->if_flags & IFF_UP)
2433 ? DC_BUSY
2434 : DC_IDLE);
2435
2436#if NBPFILTER > 0
2437
2438 /*
2439 * Promiscuous flag may have changed, so reprogram the RCR.
2440 */
2441 ed_setrcr(sc);
2442#endif
2443
2444 /*
2445 * An unfortunate hack to provide the (required) software
2446 * control of the tranceiver for 3Com boards. The ALTPHYS flag
2447 * disables the tranceiver if set.
2448 */
2449 if (sc->vendor == ED_VENDOR_3COM) {
2450 if (ifp->if_flags & IFF_ALTPHYS) {
2451 outb(sc->asic_addr + ED_3COM_CR, 0);
2452 } else {
2453 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
2454 }
2455 }
2456 break;
2457
2458 case SIOCADDMULTI:
2459 case SIOCDELMULTI:
2460 /*
2461 * Update out multicast list.
2462 */
2463 error = (command == SIOCADDMULTI) ?
2464 ether_addmulti(ifr, &sc->arpcom) :
2465 ether_delmulti(ifr, &sc->arpcom);
2466
2467 if (error == ENETRESET) {
2468
2469 /*
2470 * Multicast list has changed; set the hardware filter
2471 * accordingly.
2472 */
2473 ed_setrcr(sc);
2474 error = 0;
2475 }
2476 break;
2477
2478 case SIOCSIFMTU:
2479 /*
2480 * Set the interface MTU.
2481 */
2482 if (ifr->ifr_mtu > ETHERMTU) {
2483 error = EINVAL;
2484 } else {
2485 ifp->if_mtu = ifr->ifr_mtu;
2486 }
2487 break;
2488
2489 default:
2490 error = EINVAL;
2491 }
2492 (void) splx(s);
2493 return (error);
2494}
2495
2496/*
2497 * Given a source and destination address, copy 'amount' of a packet from
2498 * the ring buffer into a linear destination buffer. Takes into account
2499 * ring-wrap.
2500 */
2501static inline char *
2502ed_ring_copy(sc, src, dst, amount)
2503 struct ed_softc *sc;
2504 char *src;
2505 char *dst;
2506 u_short amount;
2507{
2508 u_short tmp_amount;
2509
2510 /* does copy wrap to lower addr in ring buffer? */
2511 if (src + amount > sc->mem_end) {
2512 tmp_amount = sc->mem_end - src;
2513
2514 /* copy amount up to end of NIC memory */
2515 if (sc->mem_shared)
2516 bcopy(src, dst, tmp_amount);
2517 else
2518 ed_pio_readmem(sc, (int)src, dst, tmp_amount);
2519
2520 amount -= tmp_amount;
2521 src = sc->mem_ring;
2522 dst += tmp_amount;
2523 }
2524 if (sc->mem_shared)
2525 bcopy(src, dst, amount);
2526 else
2527 ed_pio_readmem(sc, (int)src, dst, amount);
2528
2529 return (src + amount);
2530}
2531
2532/*
2533 * Retreive packet from shared memory and send to the next level up via
2534 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
2535 */
2536static void
2537ed_get_packet(sc, buf, len, multicast)
2538 struct ed_softc *sc;
2539 char *buf;
2540 u_short len;
2541 int multicast;
2542{
2543 struct ether_header *eh;
2544 struct mbuf *m;
2545
2546 /* Allocate a header mbuf */
2547 MGETHDR(m, M_DONTWAIT, MT_DATA);
2548 if (m == NULL)
2549 return;
2550 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
2551 m->m_pkthdr.len = m->m_len = len;
2552
2553 /*
2554 * We always put the received packet in a single buffer -
2555 * either with just an mbuf header or in a cluster attached
2556 * to the header. The +2 is to compensate for the alignment
2557 * fixup below.
2558 */
2559 if ((len + 2) > MHLEN) {
2560 /* Attach an mbuf cluster */
2561 MCLGET(m, M_DONTWAIT);
2562
2563 /* Insist on getting a cluster */
2564 if ((m->m_flags & M_EXT) == 0) {
2565 m_freem(m);
2566 return;
2567 }
2568 }
2569
2570 /*
2571 * The +2 is to longword align the start of the real packet.
2572 * This is important for NFS.
2573 */
2574 m->m_data += 2;
2575 eh = mtod(m, struct ether_header *);
2576
2577 /*
2578 * Get packet, including link layer address, from interface.
2579 */
2580 ed_ring_copy(sc, buf, (char *)eh, len);
2581
2582#if NBPFILTER > 0
2583
2584 /*
2585 * Check if there's a BPF listener on this interface. If so, hand off
2586 * the raw packet to bpf.
2587 */
2588 if (sc->arpcom.ac_if.if_bpf) {
2589 bpf_mtap(&sc->arpcom.ac_if, m);
2590
2591 /*
2592 * Note that the interface cannot be in promiscuous mode if
2593 * there are no BPF listeners. And if we are in promiscuous
2594 * mode, we have to check if this packet is really ours.
2595 */
2596 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) &&
2597 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
2598 sizeof(eh->ether_dhost)) != 0 && multicast == 0) {
2599 m_freem(m);
2600 return;
2601 }
2602 }
2603#endif
2604
2605 /*
2606 * Remove link layer address.
2607 */
2608 m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header);
2609 m->m_data += sizeof(struct ether_header);
2610
2611 ether_input(&sc->arpcom.ac_if, eh, m);
2612 return;
2613}
2614
2615/*
2616 * Supporting routines
2617 */
2618
2619/*
2620 * Given a NIC memory source address and a host memory destination
2621 * address, copy 'amount' from NIC to host using Programmed I/O.
2622 * The 'amount' is rounded up to a word - okay as long as mbufs
2623 * are word sized.
2624 * This routine is currently Novell-specific.
2625 */
2626static void
2627ed_pio_readmem(sc, src, dst, amount)
2628 struct ed_softc *sc;
2629 int src;
2630 unsigned char *dst;
2631 unsigned short amount;
2632{
2633 /* select page 0 registers */
2634 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
2635
2636 /* round up to a word */
2637 if (amount & 1)
2638 ++amount;
2639
2640 /* set up DMA byte count */
2641 outb(sc->nic_addr + ED_P0_RBCR0, amount);
2642 outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8);
2643
2644 /* set up source address in NIC mem */
2645 outb(sc->nic_addr + ED_P0_RSAR0, src);
2646 outb(sc->nic_addr + ED_P0_RSAR1, src >> 8);
2647
2648 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
2649
2650 if (sc->isa16bit) {
2651 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2);
2652 } else
2653 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount);
2654
2655}
2656
2657/*
2658 * Stripped down routine for writing a linear buffer to NIC memory.
2659 * Only used in the probe routine to test the memory. 'len' must
2660 * be even.
2661 */
2662static void
2663ed_pio_writemem(sc, src, dst, len)
2664 struct ed_softc *sc;
2665 char *src;
2666 unsigned short dst;
2667 unsigned short len;
2668{
2669 int maxwait = 200; /* about 240us */
2670
2671 /* select page 0 registers */
2672 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
2673
2674 /* reset remote DMA complete flag */
2675 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
2676
2677 /* set up DMA byte count */
2678 outb(sc->nic_addr + ED_P0_RBCR0, len);
2679 outb(sc->nic_addr + ED_P0_RBCR1, len >> 8);
2680
2681 /* set up destination address in NIC mem */
2682 outb(sc->nic_addr + ED_P0_RSAR0, dst);
2683 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
2684
2685 /* set remote DMA write */
2686 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
2687
2688 if (sc->isa16bit)
2689 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2);
2690 else
2691 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len);
2692
2693 /*
2694 * Wait for remote DMA complete. This is necessary because on the
2695 * transmit side, data is handled internally by the NIC in bursts and
2696 * we can't start another remote DMA until this one completes. Not
2697 * waiting causes really bad things to happen - like the NIC
2698 * irrecoverably jamming the ISA bus.
2699 */
2700 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
2701}
2702
2703/*
2704 * Write an mbuf chain to the destination NIC memory address using
2705 * programmed I/O.
2706 */
2707static u_short
2708ed_pio_write_mbufs(sc, m, dst)
2709 struct ed_softc *sc;
2710 struct mbuf *m;
2711 int dst;
2712{
2713 struct ifnet *ifp = (struct ifnet *)sc;
2714 unsigned short total_len, dma_len;
2715 struct mbuf *mp;
2716 int maxwait = 200; /* about 240us */
2717
2718 /* First, count up the total number of bytes to copy */
2719 for (total_len = 0, mp = m; mp; mp = mp->m_next)
2720 total_len += mp->m_len;
2721
2722 dma_len = total_len;
2723 if (sc->isa16bit && (dma_len & 1))
2724 dma_len++;
2725
2726 /* select page 0 registers */
2727 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
2728
2729 /* reset remote DMA complete flag */
2730 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
2731
2732 /* set up DMA byte count */
2733 outb(sc->nic_addr + ED_P0_RBCR0, dma_len);
2734 outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8);
2735
2736 /* set up destination address in NIC mem */
2737 outb(sc->nic_addr + ED_P0_RSAR0, dst);
2738 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
2739
2740 /* set remote DMA write */
2741 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
2742
2743 /*
2744 * Transfer the mbuf chain to the NIC memory.
2745 * 16-bit cards require that data be transferred as words, and only words.
2746 * So that case requires some extra code to patch over odd-length mbufs.
2747 */
2748
2749 if (!sc->isa16bit) {
2750 /* NE1000s are easy */
2751 while (m) {
2752 if (m->m_len) {
2753 outsb(sc->asic_addr + ED_NOVELL_DATA,
2754 m->m_data, m->m_len);
2755 }
2756 m = m->m_next;
2757 }
2758 } else {
2759 /* NE2000s are a pain */
2760 unsigned char *data;
2761 int len, wantbyte;
2762 unsigned char savebyte[2];
2763
2764 wantbyte = 0;
2765
2766 while (m) {
2767 len = m->m_len;
2768 if (len) {
2769 data = mtod(m, caddr_t);
2770 /* finish the last word */
2771 if (wantbyte) {
2772 savebyte[1] = *data;
2773 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
2774 data++;
2775 len--;
2776 wantbyte = 0;
2777 }
2778 /* output contiguous words */
2779 if (len > 1) {
2780 outsw(sc->asic_addr + ED_NOVELL_DATA,
2781 data, len >> 1);
2782 data += len & ~1;
2783 len &= 1;
2784 }
2785 /* save last byte, if necessary */
2786 if (len == 1) {
2787 savebyte[0] = *data;
2788 wantbyte = 1;
2789 }
2790 }
2791 m = m->m_next;
2792 }
2793 /* spit last byte */
2794 if (wantbyte) {
2795 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
2796 }
2797 }
2798
2799 /*
2800 * Wait for remote DMA complete. This is necessary because on the
2801 * transmit side, data is handled internally by the NIC in bursts and
2802 * we can't start another remote DMA until this one completes. Not
2803 * waiting causes really bad things to happen - like the NIC
2804 * irrecoverably jamming the ISA bus.
2805 */
2806 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
2807
2808 if (!maxwait) {
2809 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n",
2810 ifp->if_unit);
2811 ed_reset(ifp);
2812 return(0);
2813 }
2814 return (total_len);
2815}
2816
2817static void
2818ed_setrcr(sc)
2819 struct ed_softc *sc;
2820{
2821 struct ifnet *ifp = (struct ifnet *)sc;
2822 int i;
2823
2824 /* set page 1 registers */
2825 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
2826
2827 if (ifp->if_flags & IFF_PROMISC) {
2828
2829 /*
2830 * Reconfigure the multicast filter.
2831 */
2832 for (i = 0; i < 8; i++)
2833 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff);
2834
2835 /*
2836 * And turn on promiscuous mode. Also enable reception of
2837 * runts and packets with CRC & alignment errors.
2838 */
2839 /* Set page 0 registers */
2840 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2841
2842 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
2843 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP);
2844 } else {
2845 /* set up multicast addresses and filter modes */
2846 if (ifp->if_flags & IFF_MULTICAST) {
2847 u_long mcaf[2];
2848
2849 if (ifp->if_flags & IFF_ALLMULTI) {
2850 mcaf[0] = 0xffffffff;
2851 mcaf[1] = 0xffffffff;
2852 } else
2853 ds_getmcaf(sc, mcaf);
2854
2855 /*
2856 * Set multicast filter on chip.
2857 */
2858 for (i = 0; i < 8; i++)
2859 outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]);
2860
2861 /* Set page 0 registers */
2862 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2863
2864 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB);
2865 } else {
2866
2867 /*
2868 * Initialize multicast address hashing registers to
2869 * not accept multicasts.
2870 */
2871 for (i = 0; i < 8; ++i)
2872 outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00);
2873
2874 /* Set page 0 registers */
2875 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2876
2877 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
2878 }
2879 }
2880
2881 /*
2882 * Start interface.
2883 */
2884 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2885}
2886
2887/*
2888 * Compute crc for ethernet address
2889 */
2890static u_long
2891ds_crc(ep)
2892 u_char *ep;
2893{
2894#define POLYNOMIAL 0x04c11db6
2895 register u_long crc = 0xffffffffL;
2896 register int carry, i, j;
2897 register u_char b;
2898
2899 for (i = 6; --i >= 0;) {
2900 b = *ep++;
2901 for (j = 8; --j >= 0;) {
2902 carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01);
2903 crc <<= 1;
2904 b >>= 1;
2905 if (carry)
2906 crc = ((crc ^ POLYNOMIAL) | carry);
2907 }
2908 }
2909 return crc;
2910#undef POLYNOMIAL
2911}
2912
2913/*
2914 * Compute the multicast address filter from the
2915 * list of multicast addresses we need to listen to.
2916 */
2917static void
2918ds_getmcaf(sc, mcaf)
2919 struct ed_softc *sc;
2920 u_long *mcaf;
2921{
2922 register u_int index;
2923 register u_char *af = (u_char *) mcaf;
2924 register struct ether_multi *enm;
2925 register struct ether_multistep step;
2926
2927 mcaf[0] = 0;
2928 mcaf[1] = 0;
2929
2930 ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
2931 while (enm != NULL) {
2932 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) {
2933 mcaf[0] = 0xffffffff;
2934 mcaf[1] = 0xffffffff;
2935 return;
2936 }
2937 index = ds_crc(enm->enm_addrlo) >> 26;
2938 af[index >> 3] |= 1 << (index & 7);
2939
2940 ETHER_NEXT_MULTI(step, enm);
2941 }
2942}
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