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if_em.c (131455) if_em.c (134619)
1/**************************************************************************
2
3Copyright (c) 2001-2003, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 17 unchanged lines hidden (view full) ---

26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
1/**************************************************************************
2
3Copyright (c) 2001-2003, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 17 unchanged lines hidden (view full) ---

26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/*$FreeBSD: head/sys/dev/em/if_em.c 131455 2004-07-02 12:16:02Z mlaier $*/
34/*$FreeBSD: head/sys/dev/em/if_em.c 134619 2004-09-01 23:22:41Z pdeuskar $*/
35
36#include <dev/em/if_em.h>
37
38/*********************************************************************
39 * Set this to one to display debug statistics
40 *********************************************************************/
41int em_display_debug_stats = 0;
42
43/*********************************************************************
44 * Linked list of board private structures for all NICs found
45 *********************************************************************/
46
47struct adapter *em_adapter_list = NULL;
48
49
50/*********************************************************************
51 * Driver version
52 *********************************************************************/
53
35
36#include <dev/em/if_em.h>
37
38/*********************************************************************
39 * Set this to one to display debug statistics
40 *********************************************************************/
41int em_display_debug_stats = 0;
42
43/*********************************************************************
44 * Linked list of board private structures for all NICs found
45 *********************************************************************/
46
47struct adapter *em_adapter_list = NULL;
48
49
50/*********************************************************************
51 * Driver version
52 *********************************************************************/
53
54char em_driver_version[] = "1.7.25";
54char em_driver_version[] = "1.7.35";
55
56
57/*********************************************************************
58 * PCI Device ID Table
59 *
60 * Used by probe to select devices to load on
61 * Last field stores an index into em_strings
62 * Last entry must be all 0s

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75 { 0x8086, 0x100C, PCI_ANY_ID, PCI_ANY_ID, 0},
76 { 0x8086, 0x100D, PCI_ANY_ID, PCI_ANY_ID, 0},
77 { 0x8086, 0x100E, PCI_ANY_ID, PCI_ANY_ID, 0},
78 { 0x8086, 0x100F, PCI_ANY_ID, PCI_ANY_ID, 0},
79 { 0x8086, 0x1010, PCI_ANY_ID, PCI_ANY_ID, 0},
80 { 0x8086, 0x1011, PCI_ANY_ID, PCI_ANY_ID, 0},
81 { 0x8086, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0},
82 { 0x8086, 0x1013, PCI_ANY_ID, PCI_ANY_ID, 0},
55
56
57/*********************************************************************
58 * PCI Device ID Table
59 *
60 * Used by probe to select devices to load on
61 * Last field stores an index into em_strings
62 * Last entry must be all 0s

--- 12 unchanged lines hidden (view full) ---

75 { 0x8086, 0x100C, PCI_ANY_ID, PCI_ANY_ID, 0},
76 { 0x8086, 0x100D, PCI_ANY_ID, PCI_ANY_ID, 0},
77 { 0x8086, 0x100E, PCI_ANY_ID, PCI_ANY_ID, 0},
78 { 0x8086, 0x100F, PCI_ANY_ID, PCI_ANY_ID, 0},
79 { 0x8086, 0x1010, PCI_ANY_ID, PCI_ANY_ID, 0},
80 { 0x8086, 0x1011, PCI_ANY_ID, PCI_ANY_ID, 0},
81 { 0x8086, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0},
82 { 0x8086, 0x1013, PCI_ANY_ID, PCI_ANY_ID, 0},
83 { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0},
84 { 0x8086, 0x1015, PCI_ANY_ID, PCI_ANY_ID, 0},
85 { 0x8086, 0x1016, PCI_ANY_ID, PCI_ANY_ID, 0},
86 { 0x8086, 0x1017, PCI_ANY_ID, PCI_ANY_ID, 0},
87 { 0x8086, 0x1018, PCI_ANY_ID, PCI_ANY_ID, 0},
88 { 0x8086, 0x1019, PCI_ANY_ID, PCI_ANY_ID, 0},
89 { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0},
90 { 0x8086, 0x101D, PCI_ANY_ID, PCI_ANY_ID, 0},
91 { 0x8086, 0x101E, PCI_ANY_ID, PCI_ANY_ID, 0},
92 { 0x8086, 0x1026, PCI_ANY_ID, PCI_ANY_ID, 0},
93 { 0x8086, 0x1027, PCI_ANY_ID, PCI_ANY_ID, 0},
94 { 0x8086, 0x1028, PCI_ANY_ID, PCI_ANY_ID, 0},
95 { 0x8086, 0x1075, PCI_ANY_ID, PCI_ANY_ID, 0},
96 { 0x8086, 0x1076, PCI_ANY_ID, PCI_ANY_ID, 0},
97 { 0x8086, 0x1077, PCI_ANY_ID, PCI_ANY_ID, 0},
98 { 0x8086, 0x1078, PCI_ANY_ID, PCI_ANY_ID, 0},
99 { 0x8086, 0x1079, PCI_ANY_ID, PCI_ANY_ID, 0},
100 { 0x8086, 0x107A, PCI_ANY_ID, PCI_ANY_ID, 0},
101 { 0x8086, 0x107B, PCI_ANY_ID, PCI_ANY_ID, 0},
83 { 0x8086, 0x1015, PCI_ANY_ID, PCI_ANY_ID, 0},
84 { 0x8086, 0x1016, PCI_ANY_ID, PCI_ANY_ID, 0},
85 { 0x8086, 0x1017, PCI_ANY_ID, PCI_ANY_ID, 0},
86 { 0x8086, 0x1018, PCI_ANY_ID, PCI_ANY_ID, 0},
87 { 0x8086, 0x1019, PCI_ANY_ID, PCI_ANY_ID, 0},
88 { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0},
89 { 0x8086, 0x101D, PCI_ANY_ID, PCI_ANY_ID, 0},
90 { 0x8086, 0x101E, PCI_ANY_ID, PCI_ANY_ID, 0},
91 { 0x8086, 0x1026, PCI_ANY_ID, PCI_ANY_ID, 0},
92 { 0x8086, 0x1027, PCI_ANY_ID, PCI_ANY_ID, 0},
93 { 0x8086, 0x1028, PCI_ANY_ID, PCI_ANY_ID, 0},
94 { 0x8086, 0x1075, PCI_ANY_ID, PCI_ANY_ID, 0},
95 { 0x8086, 0x1076, PCI_ANY_ID, PCI_ANY_ID, 0},
96 { 0x8086, 0x1077, PCI_ANY_ID, PCI_ANY_ID, 0},
97 { 0x8086, 0x1078, PCI_ANY_ID, PCI_ANY_ID, 0},
98 { 0x8086, 0x1079, PCI_ANY_ID, PCI_ANY_ID, 0},
99 { 0x8086, 0x107A, PCI_ANY_ID, PCI_ANY_ID, 0},
100 { 0x8086, 0x107B, PCI_ANY_ID, PCI_ANY_ID, 0},
101 { 0x8086, 0x107C, PCI_ANY_ID, PCI_ANY_ID, 0},
102 /* required last entry */
103 { 0, 0, 0, 0, 0}
104};
105
106/*********************************************************************
107 * Table of branding strings for all supported NICs.
108 *********************************************************************/
109

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737 if (mask & IFCAP_VLAN_HWTAGGING) {
738 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
739 reinit = 1;
740 }
741 if (reinit && (ifp->if_flags & IFF_RUNNING))
742 em_init(adapter);
743 break;
744 default:
102 /* required last entry */
103 { 0, 0, 0, 0, 0}
104};
105
106/*********************************************************************
107 * Table of branding strings for all supported NICs.
108 *********************************************************************/
109

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737 if (mask & IFCAP_VLAN_HWTAGGING) {
738 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
739 reinit = 1;
740 }
741 if (reinit && (ifp->if_flags & IFF_RUNNING))
742 em_init(adapter);
743 break;
744 default:
745 IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)\n", (int)command);
745 IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)", (int)command);
746 error = EINVAL;
747 }
748
749 return(error);
750}
751
752/*********************************************************************
753 * Watchdog entry point

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792 * return 0 on success, positive on failure
793 **********************************************************************/
794
795static void
796em_init_locked(struct adapter * adapter)
797{
798 struct ifnet *ifp;
799
746 error = EINVAL;
747 }
748
749 return(error);
750}
751
752/*********************************************************************
753 * Watchdog entry point

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792 * return 0 on success, positive on failure
793 **********************************************************************/
794
795static void
796em_init_locked(struct adapter * adapter)
797{
798 struct ifnet *ifp;
799
800 uint32_t pba;
800 ifp = &adapter->interface_data.ac_if;
801
802 INIT_DEBUGOUT("em_init: begin");
803
804 mtx_assert(&adapter->mtx, MA_OWNED);
805
806 em_stop(adapter);
807
801 ifp = &adapter->interface_data.ac_if;
802
803 INIT_DEBUGOUT("em_init: begin");
804
805 mtx_assert(&adapter->mtx, MA_OWNED);
806
807 em_stop(adapter);
808
809 /* Packet Buffer Allocation (PBA)
810 * Writing PBA sets the receive portion of the buffer
811 * the remainder is used for the transmit buffer.
812 *
813 * Devices before the 82547 had a Packet Buffer of 64K.
814 * Default allocation: PBA=48K for Rx, leaving 16K for Tx.
815 * After the 82547 the buffer was reduced to 40K.
816 * Default allocation: PBA=30K for Rx, leaving 10K for Tx.
817 * Note: default does not leave enough room for Jumbo Frame >10k.
818 */
819 if(adapter->hw.mac_type < em_82547) {
820 /* Total FIFO is 64K */
821 if(adapter->rx_buffer_len > EM_RXBUFFER_8192)
822 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
823 else
824 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
825 } else {
826 /* Total FIFO is 40K */
827 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192) {
828 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
829 } else {
830 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
831 }
832 adapter->tx_fifo_head = 0;
833 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
834 adapter->tx_fifo_size = (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
835 }
836 INIT_DEBUGOUT1("em_init: pba=%dK",pba);
837 E1000_WRITE_REG(&adapter->hw, PBA, pba);
838
808 /* Get the latest mac address, User can use a LAA */
809 bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr,
810 ETHER_ADDR_LEN);
811
812 /* Initialize the hardware */
813 if (em_hardware_init(adapter)) {
814 printf("em%d: Unable to initialize the hardware\n",
815 adapter->unit);

--- 317 unchanged lines hidden (view full) ---

1133 if (error)
1134 return;
1135 KASSERT(nsegs <= EM_MAX_SCATTER,
1136 ("Too many DMA segments returned when mapping tx packet"));
1137 q->nsegs = nsegs;
1138 bcopy(seg, q->segs, nsegs * sizeof(seg[0]));
1139}
1140
839 /* Get the latest mac address, User can use a LAA */
840 bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr,
841 ETHER_ADDR_LEN);
842
843 /* Initialize the hardware */
844 if (em_hardware_init(adapter)) {
845 printf("em%d: Unable to initialize the hardware\n",
846 adapter->unit);

--- 317 unchanged lines hidden (view full) ---

1164 if (error)
1165 return;
1166 KASSERT(nsegs <= EM_MAX_SCATTER,
1167 ("Too many DMA segments returned when mapping tx packet"));
1168 q->nsegs = nsegs;
1169 bcopy(seg, q->segs, nsegs * sizeof(seg[0]));
1170}
1171
1141#define EM_FIFO_HDR 0x10
1142#define EM_82547_PKT_THRESH 0x3e0
1143#define EM_82547_TX_FIFO_SIZE 0x2800
1144#define EM_82547_TX_FIFO_BEGIN 0xf00
1145/*********************************************************************
1146 *
1147 * This routine maps the mbufs to tx descriptors.
1148 *
1149 * return 0 on success, positive on failure
1150 **********************************************************************/
1151static int
1152em_encap(struct adapter *adapter, struct mbuf *m_head)

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1351 tx_desc = &adapter->tx_desc_base[hw_tdt];
1352 length += tx_desc->lower.flags.length;
1353 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1354 if(++hw_tdt == adapter->num_tx_desc)
1355 hw_tdt = 0;
1356
1357 if(eop) {
1358 if (em_82547_fifo_workaround(adapter, length)) {
1172/*********************************************************************
1173 *
1174 * This routine maps the mbufs to tx descriptors.
1175 *
1176 * return 0 on success, positive on failure
1177 **********************************************************************/
1178static int
1179em_encap(struct adapter *adapter, struct mbuf *m_head)

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1378 tx_desc = &adapter->tx_desc_base[hw_tdt];
1379 length += tx_desc->lower.flags.length;
1380 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1381 if(++hw_tdt == adapter->num_tx_desc)
1382 hw_tdt = 0;
1383
1384 if(eop) {
1385 if (em_82547_fifo_workaround(adapter, length)) {
1359 adapter->tx_fifo_wrk++;
1386 adapter->tx_fifo_wrk_cnt++;
1360 callout_reset(&adapter->tx_fifo_timer, 1,
1361 em_82547_move_tail, adapter);
1362 break;
1363 }
1364 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1365 em_82547_update_fifo_head(adapter, length);
1366 length = 0;
1367 }

--- 14 unchanged lines hidden (view full) ---

1382static int
1383em_82547_fifo_workaround(struct adapter *adapter, int len)
1384{
1385 int fifo_space, fifo_pkt_len;
1386
1387 fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR);
1388
1389 if (adapter->link_duplex == HALF_DUPLEX) {
1387 callout_reset(&adapter->tx_fifo_timer, 1,
1388 em_82547_move_tail, adapter);
1389 break;
1390 }
1391 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1392 em_82547_update_fifo_head(adapter, length);
1393 length = 0;
1394 }

--- 14 unchanged lines hidden (view full) ---

1409static int
1410em_82547_fifo_workaround(struct adapter *adapter, int len)
1411{
1412 int fifo_space, fifo_pkt_len;
1413
1414 fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR);
1415
1416 if (adapter->link_duplex == HALF_DUPLEX) {
1390 fifo_space = EM_82547_TX_FIFO_SIZE - adapter->tx_fifo_head;
1417 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1391
1392 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1393 if (em_82547_tx_fifo_reset(adapter)) {
1394 return(0);
1395 }
1396 else {
1397 return(1);
1398 }

--- 5 unchanged lines hidden (view full) ---

1404
1405static void
1406em_82547_update_fifo_head(struct adapter *adapter, int len)
1407{
1408 int fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR);
1409
1410 /* tx_fifo_head is always 16 byte aligned */
1411 adapter->tx_fifo_head += fifo_pkt_len;
1418
1419 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1420 if (em_82547_tx_fifo_reset(adapter)) {
1421 return(0);
1422 }
1423 else {
1424 return(1);
1425 }

--- 5 unchanged lines hidden (view full) ---

1431
1432static void
1433em_82547_update_fifo_head(struct adapter *adapter, int len)
1434{
1435 int fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR);
1436
1437 /* tx_fifo_head is always 16 byte aligned */
1438 adapter->tx_fifo_head += fifo_pkt_len;
1412 if (adapter->tx_fifo_head >= EM_82547_TX_FIFO_SIZE) {
1413 adapter->tx_fifo_head -= EM_82547_TX_FIFO_SIZE;
1439 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) {
1440 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1414 }
1415
1416 return;
1417}
1418
1419
1420static int
1421em_82547_tx_fifo_reset(struct adapter *adapter)

--- 8 unchanged lines hidden (view full) ---

1430 E1000_READ_REG(&adapter->hw, TDFHS)) &&
1431 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) {
1432
1433 /* Disable TX unit */
1434 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1435 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1436
1437 /* Reset FIFO pointers */
1441 }
1442
1443 return;
1444}
1445
1446
1447static int
1448em_82547_tx_fifo_reset(struct adapter *adapter)

--- 8 unchanged lines hidden (view full) ---

1457 E1000_READ_REG(&adapter->hw, TDFHS)) &&
1458 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) {
1459
1460 /* Disable TX unit */
1461 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1462 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1463
1464 /* Reset FIFO pointers */
1438 E1000_WRITE_REG(&adapter->hw, TDFT, EM_82547_TX_FIFO_BEGIN);
1439 E1000_WRITE_REG(&adapter->hw, TDFH, EM_82547_TX_FIFO_BEGIN);
1440 E1000_WRITE_REG(&adapter->hw, TDFTS, EM_82547_TX_FIFO_BEGIN);
1441 E1000_WRITE_REG(&adapter->hw, TDFHS, EM_82547_TX_FIFO_BEGIN);
1465 E1000_WRITE_REG(&adapter->hw, TDFT, adapter->tx_head_addr);
1466 E1000_WRITE_REG(&adapter->hw, TDFH, adapter->tx_head_addr);
1467 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr);
1468 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr);
1442
1443 /* Re-enable TX unit */
1444 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1445 E1000_WRITE_FLUSH(&adapter->hw);
1446
1447 adapter->tx_fifo_head = 0;
1469
1470 /* Re-enable TX unit */
1471 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1472 E1000_WRITE_FLUSH(&adapter->hw);
1473
1474 adapter->tx_fifo_head = 0;
1448 adapter->tx_fifo_reset++;
1475 adapter->tx_fifo_reset_cnt++;
1449
1450 return(TRUE);
1451 }
1452 else {
1453 return(FALSE);
1454 }
1455}
1456
1457static void
1458em_set_promisc(struct adapter * adapter)
1459{
1460
1461 u_int32_t reg_rctl;
1476
1477 return(TRUE);
1478 }
1479 else {
1480 return(FALSE);
1481 }
1482}
1483
1484static void
1485em_set_promisc(struct adapter * adapter)
1486{
1487
1488 u_int32_t reg_rctl;
1489 u_int32_t ctrl;
1462 struct ifnet *ifp = &adapter->interface_data.ac_if;
1463
1464 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1490 struct ifnet *ifp = &adapter->interface_data.ac_if;
1491
1492 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1493 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
1465
1466 if (ifp->if_flags & IFF_PROMISC) {
1467 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1468 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1494
1495 if (ifp->if_flags & IFF_PROMISC) {
1496 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1497 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1498
1499 /* Disable VLAN stripping in promiscous mode
1500 * This enables bridging of vlan tagged frames to occur
1501 * and also allows vlan tags to be seen in tcpdump
1502 */
1503 ctrl &= ~E1000_CTRL_VME;
1504 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
1505
1469 } else if (ifp->if_flags & IFF_ALLMULTI) {
1470 reg_rctl |= E1000_RCTL_MPE;
1471 reg_rctl &= ~E1000_RCTL_UPE;
1472 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1473 }
1474
1475 return;
1476}

--- 4 unchanged lines hidden (view full) ---

1481 u_int32_t reg_rctl;
1482
1483 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1484
1485 reg_rctl &= (~E1000_RCTL_UPE);
1486 reg_rctl &= (~E1000_RCTL_MPE);
1487 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1488
1506 } else if (ifp->if_flags & IFF_ALLMULTI) {
1507 reg_rctl |= E1000_RCTL_MPE;
1508 reg_rctl &= ~E1000_RCTL_UPE;
1509 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1510 }
1511
1512 return;
1513}

--- 4 unchanged lines hidden (view full) ---

1518 u_int32_t reg_rctl;
1519
1520 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1521
1522 reg_rctl &= (~E1000_RCTL_UPE);
1523 reg_rctl &= (~E1000_RCTL_MPE);
1524 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1525
1526 em_enable_vlans(adapter);
1489 return;
1490}
1491
1492
1493/*********************************************************************
1494 * Multicast Update
1495 *
1496 * This routine is called whenever multicast address list is updated.

--- 1667 unchanged lines hidden (view full) ---

3164 **********************************************************************/
3165static void
3166em_print_debug_info(struct adapter *adapter)
3167{
3168 int unit = adapter->unit;
3169 uint8_t *hw_addr = adapter->hw.hw_addr;
3170
3171 printf("em%d: Adapter hardware address = %p \n", unit, hw_addr);
1527 return;
1528}
1529
1530
1531/*********************************************************************
1532 * Multicast Update
1533 *
1534 * This routine is called whenever multicast address list is updated.

--- 1667 unchanged lines hidden (view full) ---

3202 **********************************************************************/
3203static void
3204em_print_debug_info(struct adapter *adapter)
3205{
3206 int unit = adapter->unit;
3207 uint8_t *hw_addr = adapter->hw.hw_addr;
3208
3209 printf("em%d: Adapter hardware address = %p \n", unit, hw_addr);
3210 printf("em%d:CTRL = 0x%x\n", unit,
3211 E1000_READ_REG(&adapter->hw, CTRL));
3212 printf("em%d:RCTL = 0x%x PS=(0x8402)\n", unit,
3213 E1000_READ_REG(&adapter->hw, RCTL));
3172 printf("em%d:tx_int_delay = %d, tx_abs_int_delay = %d\n", unit,
3173 E1000_READ_REG(&adapter->hw, TIDV),
3174 E1000_READ_REG(&adapter->hw, TADV));
3175 printf("em%d:rx_int_delay = %d, rx_abs_int_delay = %d\n", unit,
3176 E1000_READ_REG(&adapter->hw, RDTR),
3177 E1000_READ_REG(&adapter->hw, RADV));
3178
3179#ifdef DBG_STATS
3180 printf("em%d: Packets not Avail = %ld\n", unit,
3181 adapter->no_pkts_avail);
3182 printf("em%d: CleanTxInterrupts = %ld\n", unit,
3183 adapter->clean_tx_interrupts);
3184#endif
3185 printf("em%d: fifo workaround = %lld, fifo_reset = %lld\n", unit,
3214 printf("em%d:tx_int_delay = %d, tx_abs_int_delay = %d\n", unit,
3215 E1000_READ_REG(&adapter->hw, TIDV),
3216 E1000_READ_REG(&adapter->hw, TADV));
3217 printf("em%d:rx_int_delay = %d, rx_abs_int_delay = %d\n", unit,
3218 E1000_READ_REG(&adapter->hw, RDTR),
3219 E1000_READ_REG(&adapter->hw, RADV));
3220
3221#ifdef DBG_STATS
3222 printf("em%d: Packets not Avail = %ld\n", unit,
3223 adapter->no_pkts_avail);
3224 printf("em%d: CleanTxInterrupts = %ld\n", unit,
3225 adapter->clean_tx_interrupts);
3226#endif
3227 printf("em%d: fifo workaround = %lld, fifo_reset = %lld\n", unit,
3186 (long long)adapter->tx_fifo_wrk,
3187 (long long)adapter->tx_fifo_reset);
3228 (long long)adapter->tx_fifo_wrk_cnt,
3229 (long long)adapter->tx_fifo_reset_cnt);
3188 printf("em%d: hw tdh = %d, hw tdt = %d\n", unit,
3189 E1000_READ_REG(&adapter->hw, TDH),
3190 E1000_READ_REG(&adapter->hw, TDT));
3191 printf("em%d: Num Tx descriptors avail = %d\n", unit,
3192 adapter->num_tx_desc_avail);
3193 printf("em%d: Tx Descriptors not avail1 = %ld\n", unit,
3194 adapter->no_tx_desc_avail1);
3195 printf("em%d: Tx Descriptors not avail2 = %ld\n", unit,

--- 159 unchanged lines hidden --- 		3230 printf("em%d: hw tdh = %d, hw tdt = %d\n", unit,
3231 E1000_READ_REG(&adapter->hw, TDH),
3232 E1000_READ_REG(&adapter->hw, TDT));
3233 printf("em%d: Num Tx descriptors avail = %d\n", unit,
3234 adapter->num_tx_desc_avail);
3235 printf("em%d: Tx Descriptors not avail1 = %ld\n", unit,
3236 adapter->no_tx_desc_avail1);
3237 printf("em%d: Tx Descriptors not avail2 = %ld\n", unit,

--- 159 unchanged lines hidden ---