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radeon_state.c (189499) radeon_state.c (196470)
1/*-
2 * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

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22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Gareth Hughes <gareth@valinux.com>
26 * Kevin E. Martin <martin@valinux.com>
27 */
28
29#include <sys/cdefs.h>
1/*-
2 * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

--- 13 unchanged lines hidden (view full) ---

22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Gareth Hughes <gareth@valinux.com>
26 * Kevin E. Martin <martin@valinux.com>
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/drm/radeon_state.c 189499 2009-03-07 21:36:57Z rnoland $");
30__FBSDID("$FreeBSD: head/sys/dev/drm/radeon_state.c 196470 2009-08-23 14:55:57Z rnoland $");
31
32#include "dev/drm/drmP.h"
33#include "dev/drm/drm.h"
34#include "dev/drm/drm_sarea.h"
35#include "dev/drm/radeon_drm.h"
36#include "dev/drm/radeon_drv.h"
37
38/* ================================================================

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1536 (numverts << RADEON_NUM_VERTICES_SHIFT));
1537
1538 ADVANCE_RING();
1539
1540 i++;
1541 } while (i < nbox);
1542}
1543
31
32#include "dev/drm/drmP.h"
33#include "dev/drm/drm.h"
34#include "dev/drm/drm_sarea.h"
35#include "dev/drm/radeon_drm.h"
36#include "dev/drm/radeon_drv.h"
37
38/* ================================================================

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1536 (numverts << RADEON_NUM_VERTICES_SHIFT));
1537
1538 ADVANCE_RING();
1539
1540 i++;
1541 } while (i < nbox);
1542}
1543
1544static void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_buf *buf)
1544void radeon_cp_discard_buffer(struct drm_device *dev, struct drm_buf *buf)
1545{
1546 drm_radeon_private_t *dev_priv = dev->dev_private;
1547 drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
1548 RING_LOCALS;
1549
1550 buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
1551
1552 /* Emit the vertex buffer age */

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2197
2198 LOCK_TEST_WITH_RETURN(dev, file_priv);
2199
2200 RING_SPACE_TEST_WITH_RETURN(dev_priv);
2201
2202 if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
2203 sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
2204
1545{
1546 drm_radeon_private_t *dev_priv = dev->dev_private;
1547 drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
1548 RING_LOCALS;
1549
1550 buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
1551
1552 /* Emit the vertex buffer age */

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2197
2198 LOCK_TEST_WITH_RETURN(dev, file_priv);
2199
2200 RING_SPACE_TEST_WITH_RETURN(dev_priv);
2201
2202 if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
2203 sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
2204
2205 radeon_cp_dispatch_swap(dev);
2205 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
2206 r600_cp_dispatch_swap(dev);
2207 else
2208 radeon_cp_dispatch_swap(dev);
2206 sarea_priv->ctx_owner = 0;
2207
2208 COMMIT_RING();
2209 return 0;
2210}
2211
2212static int radeon_cp_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv)
2213{

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2394 if (DRM_COPY_FROM_USER(&image,
2395 (drm_radeon_tex_image_t __user *) tex->image,
2396 sizeof(image)))
2397 return -EFAULT;
2398
2399 RING_SPACE_TEST_WITH_RETURN(dev_priv);
2400 VB_AGE_TEST_WITH_RETURN(dev_priv);
2401
2209 sarea_priv->ctx_owner = 0;
2210
2211 COMMIT_RING();
2212 return 0;
2213}
2214
2215static int radeon_cp_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv)
2216{

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2397 if (DRM_COPY_FROM_USER(&image,
2398 (drm_radeon_tex_image_t __user *) tex->image,
2399 sizeof(image)))
2400 return -EFAULT;
2401
2402 RING_SPACE_TEST_WITH_RETURN(dev_priv);
2403 VB_AGE_TEST_WITH_RETURN(dev_priv);
2404
2402 ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image);
2405 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
2406 ret = r600_cp_dispatch_texture(dev, file_priv, tex, &image);
2407 else
2408 ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image);
2403
2404 return ret;
2405}
2406
2407static int radeon_cp_stipple(struct drm_device *dev, void *data, struct drm_file *file_priv)
2408{
2409 drm_radeon_private_t *dev_priv = dev->dev_private;
2410 drm_radeon_stipple_t *stipple = data;

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3151 radeon_mem_release(file_priv, dev_priv->fb_heap);
3152 radeon_surfaces_release(file_priv, dev_priv);
3153 }
3154}
3155
3156void radeon_driver_lastclose(struct drm_device *dev)
3157{
3158 radeon_surfaces_release(PCIGART_FILE_PRIV, dev->dev_private);
2409
2410 return ret;
2411}
2412
2413static int radeon_cp_stipple(struct drm_device *dev, void *data, struct drm_file *file_priv)
2414{
2415 drm_radeon_private_t *dev_priv = dev->dev_private;
2416 drm_radeon_stipple_t *stipple = data;

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3157 radeon_mem_release(file_priv, dev_priv->fb_heap);
3158 radeon_surfaces_release(file_priv, dev_priv);
3159 }
3160}
3161
3162void radeon_driver_lastclose(struct drm_device *dev)
3163{
3164 radeon_surfaces_release(PCIGART_FILE_PRIV, dev->dev_private);
3165 if (dev->dev_private) {
3166 drm_radeon_private_t *dev_priv = dev->dev_private;
3167
3168 if (dev_priv->sarea_priv &&
3169 dev_priv->sarea_priv->pfCurrentPage != 0)
3170 radeon_cp_dispatch_flip(dev);
3171 }
3172
3159 radeon_do_release(dev);
3160}
3161
3162int radeon_driver_open(struct drm_device *dev, struct drm_file *file_priv)
3163{
3164 drm_radeon_private_t *dev_priv = dev->dev_private;
3165 struct drm_radeon_driver_file_fields *radeon_priv;
3166

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3211 DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip, DRM_AUTH),
3212 DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH),
3213 DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free, DRM_AUTH),
3214 DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3215 DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH),
3216 DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH),
3217 DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH),
3218 DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH),
3173 radeon_do_release(dev);
3174}
3175
3176int radeon_driver_open(struct drm_device *dev, struct drm_file *file_priv)
3177{
3178 drm_radeon_private_t *dev_priv = dev->dev_private;
3179 struct drm_radeon_driver_file_fields *radeon_priv;
3180

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3225 DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip, DRM_AUTH),
3226 DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH),
3227 DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free, DRM_AUTH),
3228 DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3229 DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH),
3230 DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH),
3231 DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH),
3232 DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH),
3219 DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH)
3233 DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH),
3234 DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH)
3220};
3221
3222int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
3235};
3236
3237int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);