| radeon_state.c (119098) | radeon_state.c (119895) |
|---|---|
| 1/* radeon_state.c -- State support for Radeon -*- linux-c -*- 2 * 3 * Copyright 2000 VA Linux Systems, Inc., Fremont, California. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 12 unchanged lines hidden (view full) --- 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Gareth Hughes <gareth@valinux.com> 27 * Kevin E. Martin <martin@valinux.com> 28 * | 1/* radeon_state.c -- State support for Radeon -*- linux-c -*- 2 * 3 * Copyright 2000 VA Linux Systems, Inc., Fremont, California. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation --- 12 unchanged lines hidden (view full) --- 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Gareth Hughes <gareth@valinux.com> 27 * Kevin E. Martin <martin@valinux.com> 28 * |
| 29 * $FreeBSD: head/sys/dev/drm/radeon_state.c 119098 2003-08-19 02:57:31Z anholt $ | 29 * $FreeBSD: head/sys/dev/drm/radeon_state.c 119895 2003-09-09 00:24:31Z anholt $ |
| 30 */ 31 32#include "dev/drm/radeon.h" 33#include "dev/drm/drmP.h" 34#include "dev/drm/drm.h" 35#include "dev/drm/drm_sarea.h" 36#include "dev/drm/radeon_drm.h" 37#include "dev/drm/radeon_drv.h" --- 852 unchanged lines hidden (view full) --- 890 891static void radeon_cp_dispatch_vertex( drm_device_t *dev, 892 drm_buf_t *buf, 893 drm_radeon_tcl_prim_t *prim ) 894 895{ 896 drm_radeon_private_t *dev_priv = dev->dev_private; 897 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; | 30 */ 31 32#include "dev/drm/radeon.h" 33#include "dev/drm/drmP.h" 34#include "dev/drm/drm.h" 35#include "dev/drm/drm_sarea.h" 36#include "dev/drm/radeon_drm.h" 37#include "dev/drm/radeon_drv.h" --- 852 unchanged lines hidden (view full) --- 890 891static void radeon_cp_dispatch_vertex( drm_device_t *dev, 892 drm_buf_t *buf, 893 drm_radeon_tcl_prim_t *prim ) 894 895{ 896 drm_radeon_private_t *dev_priv = dev->dev_private; 897 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; |
| 898 int offset = dev_priv->agp_buffers_offset + buf->offset + prim->start; | 898 int offset = dev_priv->gart_buffers_offset + buf->offset + prim->start; |
| 899 int numverts = (int)prim->numverts; 900 int nbox = sarea_priv->nbox; 901 int i = 0; 902 RING_LOCALS; 903 904 DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n", 905 prim->prim, 906 prim->vc_format, --- 56 unchanged lines hidden (view full) --- 963 int start, int end ) 964{ 965 drm_radeon_private_t *dev_priv = dev->dev_private; 966 RING_LOCALS; 967 DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", 968 buf->idx, start, end ); 969 970 if ( start != end ) { | 899 int numverts = (int)prim->numverts; 900 int nbox = sarea_priv->nbox; 901 int i = 0; 902 RING_LOCALS; 903 904 DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n", 905 prim->prim, 906 prim->vc_format, --- 56 unchanged lines hidden (view full) --- 963 int start, int end ) 964{ 965 drm_radeon_private_t *dev_priv = dev->dev_private; 966 RING_LOCALS; 967 DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n", 968 buf->idx, start, end ); 969 970 if ( start != end ) { |
| 971 int offset = (dev_priv->agp_buffers_offset | 971 int offset = (dev_priv->gart_buffers_offset |
| 972 + buf->offset + start); 973 int dwords = (end - start + 3) / sizeof(u32); 974 975 /* Indirect buffer data must be an even number of 976 * dwords, so if we've been given an odd number we must 977 * pad the data with a Type-2 CP packet. 978 */ 979 if ( dwords & 1 ) { --- 16 unchanged lines hidden (view full) --- 996 997 998static void radeon_cp_dispatch_indices( drm_device_t *dev, 999 drm_buf_t *elt_buf, 1000 drm_radeon_tcl_prim_t *prim ) 1001{ 1002 drm_radeon_private_t *dev_priv = dev->dev_private; 1003 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; | 972 + buf->offset + start); 973 int dwords = (end - start + 3) / sizeof(u32); 974 975 /* Indirect buffer data must be an even number of 976 * dwords, so if we've been given an odd number we must 977 * pad the data with a Type-2 CP packet. 978 */ 979 if ( dwords & 1 ) { --- 16 unchanged lines hidden (view full) --- 996 997 998static void radeon_cp_dispatch_indices( drm_device_t *dev, 999 drm_buf_t *elt_buf, 1000 drm_radeon_tcl_prim_t *prim ) 1001{ 1002 drm_radeon_private_t *dev_priv = dev->dev_private; 1003 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; |
| 1004 int offset = dev_priv->agp_buffers_offset + prim->offset; | 1004 int offset = dev_priv->gart_buffers_offset + prim->offset; |
| 1005 u32 *data; 1006 int dwords; 1007 int i = 0; 1008 int start = prim->start + RADEON_INDEX_PRIM_OFFSET; 1009 int count = (prim->finish - start) / sizeof(u16); 1010 int nbox = sarea_priv->nbox; 1011 1012 DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n", --- 1143 unchanged lines hidden (view full) --- 2156 } 2157 2158 DRM_COPY_FROM_USER_IOCTL( param, (drm_radeon_getparam_t *)data, 2159 sizeof(param) ); 2160 2161 DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID ); 2162 2163 switch( param.param ) { | 1005 u32 *data; 1006 int dwords; 1007 int i = 0; 1008 int start = prim->start + RADEON_INDEX_PRIM_OFFSET; 1009 int count = (prim->finish - start) / sizeof(u16); 1010 int nbox = sarea_priv->nbox; 1011 1012 DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n", --- 1143 unchanged lines hidden (view full) --- 2156 } 2157 2158 DRM_COPY_FROM_USER_IOCTL( param, (drm_radeon_getparam_t *)data, 2159 sizeof(param) ); 2160 2161 DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID ); 2162 2163 switch( param.param ) { |
| 2164 case RADEON_PARAM_AGP_BUFFER_OFFSET: 2165 value = dev_priv->agp_buffers_offset; | 2164 case RADEON_PARAM_GART_BUFFER_OFFSET: 2165 value = dev_priv->gart_buffers_offset; |
| 2166 break; 2167 case RADEON_PARAM_LAST_FRAME: 2168 dev_priv->stats.last_frame_reads++; 2169 value = GET_SCRATCH( 0 ); 2170 break; 2171 case RADEON_PARAM_LAST_DISPATCH: 2172 value = GET_SCRATCH( 1 ); 2173 break; 2174 case RADEON_PARAM_LAST_CLEAR: 2175 dev_priv->stats.last_clear_reads++; 2176 value = GET_SCRATCH( 2 ); 2177 break; 2178 case RADEON_PARAM_IRQ_NR: 2179 value = dev->irq; 2180 break; | 2166 break; 2167 case RADEON_PARAM_LAST_FRAME: 2168 dev_priv->stats.last_frame_reads++; 2169 value = GET_SCRATCH( 0 ); 2170 break; 2171 case RADEON_PARAM_LAST_DISPATCH: 2172 value = GET_SCRATCH( 1 ); 2173 break; 2174 case RADEON_PARAM_LAST_CLEAR: 2175 dev_priv->stats.last_clear_reads++; 2176 value = GET_SCRATCH( 2 ); 2177 break; 2178 case RADEON_PARAM_IRQ_NR: 2179 value = dev->irq; 2180 break; |
| 2181 case RADEON_PARAM_AGP_BASE: 2182 value = dev_priv->agp_vm_start; | 2181 case RADEON_PARAM_GART_BASE: 2182 value = dev_priv->gart_vm_start; |
| 2183 break; 2184 case RADEON_PARAM_REGISTER_HANDLE: 2185 value = dev_priv->mmio_offset; 2186 break; 2187 case RADEON_PARAM_STATUS_HANDLE: 2188 value = dev_priv->ring_rptr_offset; 2189 break; 2190 case RADEON_PARAM_SAREA_HANDLE: 2191 /* The lock is the first dword in the sarea. */ 2192 value = (int)dev->lock.hw_lock; 2193 break; | 2183 break; 2184 case RADEON_PARAM_REGISTER_HANDLE: 2185 value = dev_priv->mmio_offset; 2186 break; 2187 case RADEON_PARAM_STATUS_HANDLE: 2188 value = dev_priv->ring_rptr_offset; 2189 break; 2190 case RADEON_PARAM_SAREA_HANDLE: 2191 /* The lock is the first dword in the sarea. */ 2192 value = (int)dev->lock.hw_lock; 2193 break; |
| 2194 case RADEON_PARAM_AGP_TEX_HANDLE: 2195 value = dev_priv->agp_textures_offset; | 2194 case RADEON_PARAM_GART_TEX_HANDLE: 2195 value = dev_priv->gart_textures_offset; |
| 2196 break; 2197 default: 2198 return DRM_ERR(EINVAL); 2199 } 2200 2201 if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) { 2202 DRM_ERROR( "copy_to_user\n" ); 2203 return DRM_ERR(EFAULT); 2204 } 2205 2206 return 0; 2207} | 2196 break; 2197 default: 2198 return DRM_ERR(EINVAL); 2199 } 2200 2201 if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) { 2202 DRM_ERROR( "copy_to_user\n" ); 2203 return DRM_ERR(EFAULT); 2204 } 2205 2206 return 0; 2207} |