30c30
< * $FreeBSD: head/sys/dev/drm/radeon_cp.c 119098 2003-08-19 02:57:31Z anholt $
---
> * $FreeBSD: head/sys/dev/drm/radeon_cp.c 119895 2003-09-09 00:24:31Z anholt $
860c860
< (dev_priv->agp_vm_start - 1) & 0xffff0000 );
---
> (dev_priv->gart_vm_start - 1) & 0xffff0000 );
861a862
> #if __REALLY_HAVE_AGP
864,867c865,867
< (((dev_priv->agp_vm_start - 1 +
< dev_priv->agp_size) & 0xffff0000) |
< (dev_priv->agp_vm_start >> 16)) );
< }
---
> (((dev_priv->gart_vm_start - 1 +
> dev_priv->gart_size) & 0xffff0000) |
> (dev_priv->gart_vm_start >> 16)) );
869,870d868
< #if __REALLY_HAVE_AGP
< if ( !dev_priv->is_pci )
873,874c871,872
< + dev_priv->agp_vm_start);
< else
---
> + dev_priv->gart_vm_start);
> } else
878c876
< + dev_priv->agp_vm_start);
---
> + dev_priv->gart_vm_start);
896c894
< + dev_priv->agp_vm_start);
---
> + dev_priv->gart_vm_start);
994,996c992,994
< RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->agp_vm_start );
< RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->agp_vm_start
< + dev_priv->agp_size - 1);
---
> RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->gart_vm_start );
> RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->gart_vm_start
> + dev_priv->gart_size - 1);
998c996
< /* Turn off AGP aperture -- is this required for PCIGART?
---
> /* Turn off AGP aperture -- is this required for PCI GART?
1122c1120
< dev_priv->agp_textures_offset = init->agp_textures_offset;
---
> dev_priv->gart_textures_offset = init->gart_textures_offset;
1167,1171c1165,1168
< if ( !dev_priv->is_pci ) {
< DRM_FIND_MAP( dev_priv->agp_textures,
< init->agp_textures_offset );
< if(!dev_priv->agp_textures) {
< DRM_ERROR("could not find agp texture region!\n");
---
> if ( init->gart_textures_offset ) {
> DRM_FIND_MAP( dev_priv->gart_textures, init->gart_textures_offset );
> if ( !dev_priv->gart_textures ) {
> DRM_ERROR("could not find GART texture region!\n");
1213,1214c1210,1211
< dev_priv->agp_size = init->agp_size;
< dev_priv->agp_vm_start = RADEON_READ( RADEON_CONFIG_APER_SIZE );
---
> dev_priv->gart_size = init->gart_size;
> dev_priv->gart_vm_start = RADEON_READ( RADEON_CONFIG_APER_SIZE );
1217c1214
< dev_priv->agp_buffers_offset = (dev_priv->buffers->offset
---
> dev_priv->gart_buffers_offset = (dev_priv->buffers->offset
1219c1216
< + dev_priv->agp_vm_start);
---
> + dev_priv->gart_vm_start);
1222c1219
< dev_priv->agp_buffers_offset = (dev_priv->buffers->offset
---
> dev_priv->gart_buffers_offset = (dev_priv->buffers->offset
1224c1221
< + dev_priv->agp_vm_start);
---
> + dev_priv->gart_vm_start);
1226,1231c1223,1228
< DRM_DEBUG( "dev_priv->agp_size %d\n",
< dev_priv->agp_size );
< DRM_DEBUG( "dev_priv->agp_vm_start 0x%x\n",
< dev_priv->agp_vm_start );
< DRM_DEBUG( "dev_priv->agp_buffers_offset 0x%lx\n",
< dev_priv->agp_buffers_offset );
---
> DRM_DEBUG( "dev_priv->gart_size %d\n",
> dev_priv->gart_size );
> DRM_DEBUG( "dev_priv->gart_vm_start 0x%x\n",
> dev_priv->gart_vm_start );
> DRM_DEBUG( "dev_priv->gart_buffers_offset 0x%lx\n",
> dev_priv->gart_buffers_offset );
1468c1465
< radeon_mem_takedown( &(dev_priv->agp_heap) );
---
> radeon_mem_takedown( &(dev_priv->gart_heap) );