| r600_cp.c (196142) | r600_cp.c (196470) |
|---|---|
| 1/*- 2 * Copyright 2008-2009 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, --- 13 unchanged lines hidden (view full) --- 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Dave Airlie <airlied@redhat.com> 26 * Alex Deucher <alexander.deucher@amd.com> 27 */ 28 29#include <sys/cdefs.h> | 1/*- 2 * Copyright 2008-2009 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, --- 13 unchanged lines hidden (view full) --- 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Dave Airlie <airlied@redhat.com> 26 * Alex Deucher <alexander.deucher@amd.com> 27 */ 28 29#include <sys/cdefs.h> |
| 30__FBSDID("$FreeBSD: head/sys/dev/drm/r600_cp.c 196142 2009-08-12 12:57:02Z rnoland $"); | 30__FBSDID("$FreeBSD: head/sys/dev/drm/r600_cp.c 196470 2009-08-23 14:55:57Z rnoland $"); |
| 31 32#include "dev/drm/drmP.h" 33#include "dev/drm/drm.h" 34#include "dev/drm/radeon_drm.h" 35#include "dev/drm/radeon_drv.h" 36 37#include "dev/drm/r600_microcode.h" 38 --- 1799 unchanged lines hidden (view full) --- 1838 r600_do_cleanup_cp(dev); 1839 return -EINVAL; 1840 } 1841 1842 /* Enable vblank on CRTC1 for older X servers 1843 */ 1844 dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1; 1845 | 31 32#include "dev/drm/drmP.h" 33#include "dev/drm/drm.h" 34#include "dev/drm/radeon_drm.h" 35#include "dev/drm/radeon_drv.h" 36 37#include "dev/drm/r600_microcode.h" 38 --- 1799 unchanged lines hidden (view full) --- 1838 r600_do_cleanup_cp(dev); 1839 return -EINVAL; 1840 } 1841 1842 /* Enable vblank on CRTC1 for older X servers 1843 */ 1844 dev_priv->vblank_crtc = DRM_RADEON_VBLANK_CRTC1; 1845 |
| 1846 dev_priv->do_boxes = 0; |
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| 1846 dev_priv->cp_mode = init->cp_mode; 1847 1848 /* We don't support anything other than bus-mastering ring mode, 1849 * but the ring can be in either AGP or PCI space for the ring 1850 * read pointer. 1851 */ 1852 if ((init->cp_mode != RADEON_CSQ_PRIBM_INDDIS) && 1853 (init->cp_mode != RADEON_CSQ_PRIBM_INDBM)) { --- 241 unchanged lines hidden (view full) --- 2095 2096 r600_cp_init_ring_buffer(dev, dev_priv, file_priv); 2097 2098 dev_priv->last_buf = 0; 2099 2100 r600_do_engine_reset(dev); 2101 r600_test_writeback(dev_priv); 2102 | 1847 dev_priv->cp_mode = init->cp_mode; 1848 1849 /* We don't support anything other than bus-mastering ring mode, 1850 * but the ring can be in either AGP or PCI space for the ring 1851 * read pointer. 1852 */ 1853 if ((init->cp_mode != RADEON_CSQ_PRIBM_INDDIS) && 1854 (init->cp_mode != RADEON_CSQ_PRIBM_INDBM)) { --- 241 unchanged lines hidden (view full) --- 2096 2097 r600_cp_init_ring_buffer(dev, dev_priv, file_priv); 2098 2099 dev_priv->last_buf = 0; 2100 2101 r600_do_engine_reset(dev); 2102 r600_test_writeback(dev_priv); 2103 |
| 2104 r600_cs_init(dev); 2105 |
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| 2103 return 0; 2104} 2105 2106int r600_do_resume_cp(struct drm_device *dev, struct drm_file *file_priv) 2107{ 2108 drm_radeon_private_t *dev_priv = dev->dev_private; 2109 2110 DRM_DEBUG("\n"); --- 116 unchanged lines hidden (view full) --- 2227 OUT_RING((offset & 0xfffffffc)); 2228 OUT_RING((upper_32_bits(offset) & 0xff)); 2229 OUT_RING(dwords); 2230 ADVANCE_RING(); 2231 } 2232 2233 return 0; 2234} | 2106 return 0; 2107} 2108 2109int r600_do_resume_cp(struct drm_device *dev, struct drm_file *file_priv) 2110{ 2111 drm_radeon_private_t *dev_priv = dev->dev_private; 2112 2113 DRM_DEBUG("\n"); --- 116 unchanged lines hidden (view full) --- 2230 OUT_RING((offset & 0xfffffffc)); 2231 OUT_RING((upper_32_bits(offset) & 0xff)); 2232 OUT_RING(dwords); 2233 ADVANCE_RING(); 2234 } 2235 2236 return 0; 2237} |
| 2238 2239void r600_cp_dispatch_swap(struct drm_device * dev) 2240{ 2241 drm_radeon_private_t *dev_priv = dev->dev_private; 2242 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; 2243 int nbox = sarea_priv->nbox; 2244 struct drm_clip_rect *pbox = sarea_priv->boxes; 2245 int i, cpp, src_pitch, dst_pitch; 2246 uint64_t src, dst; 2247 RING_LOCALS; 2248 DRM_DEBUG("\n"); 2249 2250 if (dev_priv->color_fmt == RADEON_COLOR_FORMAT_ARGB8888) 2251 cpp = 4; 2252 else 2253 cpp = 2; 2254 2255 if (dev_priv->sarea_priv->pfCurrentPage == 0) { 2256 src_pitch = dev_priv->back_pitch; 2257 dst_pitch = dev_priv->front_pitch; 2258 src = dev_priv->back_offset + dev_priv->fb_location; 2259 dst = dev_priv->front_offset + dev_priv->fb_location; 2260 } else { 2261 src_pitch = dev_priv->front_pitch; 2262 dst_pitch = dev_priv->back_pitch; 2263 src = dev_priv->front_offset + dev_priv->fb_location; 2264 dst = dev_priv->back_offset + dev_priv->fb_location; 2265 } 2266 2267 if (r600_prepare_blit_copy(dev)) { 2268 DRM_ERROR("unable to allocate vertex buffer for swap buffer\n"); 2269 return; 2270 } 2271 for (i = 0; i < nbox; i++) { 2272 int x = pbox[i].x1; 2273 int y = pbox[i].y1; 2274 int w = pbox[i].x2 - x; 2275 int h = pbox[i].y2 - y; 2276 2277 DRM_DEBUG("%d,%d-%d,%d\n", x, y, w, h); 2278 2279 r600_blit_swap(dev, 2280 src, dst, 2281 x, y, x, y, w, h, 2282 src_pitch, dst_pitch, cpp); 2283 } 2284 r600_done_blit_copy(dev); 2285 2286 /* Increment the frame counter. The client-side 3D driver must 2287 * throttle the framerate by waiting for this value before 2288 * performing the swapbuffer ioctl. 2289 */ 2290 dev_priv->sarea_priv->last_frame++; 2291 2292 BEGIN_RING(3); 2293 R600_FRAME_AGE(dev_priv->sarea_priv->last_frame); 2294 ADVANCE_RING(); 2295} 2296 2297int r600_cp_dispatch_texture(struct drm_device * dev, 2298 struct drm_file *file_priv, 2299 drm_radeon_texture_t * tex, 2300 drm_radeon_tex_image_t * image) 2301{ 2302 drm_radeon_private_t *dev_priv = dev->dev_private; 2303 struct drm_buf *buf; 2304 u32 *buffer; 2305 const u8 __user *data; 2306 int size, pass_size; 2307 u64 src_offset, dst_offset; 2308 2309 if (!radeon_check_offset(dev_priv, tex->offset)) { 2310 DRM_ERROR("Invalid destination offset\n"); 2311 return -EINVAL; 2312 } 2313 2314 /* this might fail for zero-sized uploads - are those illegal? */ 2315 if (!radeon_check_offset(dev_priv, tex->offset + tex->height * tex->pitch - 1)) { 2316 DRM_ERROR("Invalid final destination offset\n"); 2317 return -EINVAL; 2318 } 2319 2320 size = tex->height * tex->pitch; 2321 2322 if (size == 0) 2323 return 0; 2324 2325 dst_offset = tex->offset; 2326 2327 r600_prepare_blit_copy(dev); 2328 do { 2329 data = (const u8 __user *)image->data; 2330 pass_size = size; 2331 2332 buf = radeon_freelist_get(dev); 2333 if (!buf) { 2334 DRM_DEBUG("EAGAIN\n"); 2335 if (DRM_COPY_TO_USER(tex->image, image, sizeof(*image))) 2336 return -EFAULT; 2337 return -EAGAIN; 2338 } 2339 2340 if (pass_size > buf->total) 2341 pass_size = buf->total; 2342 2343 /* Dispatch the indirect buffer. 2344 */ 2345 buffer = 2346 (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset); 2347 2348 if (DRM_COPY_FROM_USER(buffer, data, pass_size)) { 2349 DRM_ERROR("EFAULT on pad, %d bytes\n", pass_size); 2350 return -EFAULT; 2351 } 2352 2353 buf->file_priv = file_priv; 2354 buf->used = pass_size; 2355 src_offset = dev_priv->gart_buffers_offset + buf->offset; 2356 2357 r600_blit_copy(dev, src_offset, dst_offset, pass_size); 2358 2359 radeon_cp_discard_buffer(dev, buf); 2360 2361 /* Update the input parameters for next time */ 2362 image->data = (const u8 __user *)image->data + pass_size; 2363 dst_offset += pass_size; 2364 size -= pass_size; 2365 } while (size > 0); 2366 r600_done_blit_copy(dev); 2367 2368 return 0; 2369} |
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