| if_dcreg.h (57901) | if_dcreg.h (61110) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/dev/dc/if_dcreg.h 57901 2000-03-11 05:20:56Z msmith $ | 32 * $FreeBSD: head/sys/dev/dc/if_dcreg.h 61110 2000-05-31 05:40:53Z wpaul $ |
| 33 */ 34 35/* 36 * 21143 and clone common register definitions. 37 */ 38 39#define DC_BUSCTL 0x00 /* bus control */ 40#define DC_TXSTART 0x08 /* tx start demand */ --- 625 unchanged lines hidden (view full) --- 666#define DC_TX_USE_TX_INTR 0x00000008 667#define DC_RX_FILTER_TULIP 0x00000010 668#define DC_TX_INTR_FIRSTFRAG 0x00000020 669#define DC_PNIC_RX_BUG_WAR 0x00000040 670#define DC_TX_FIXED_RING 0x00000080 671#define DC_TX_STORENFWD 0x00000100 672#define DC_REDUCED_MII_POLL 0x00000200 673#define DC_TX_INTR_ALWAYS 0x00000400 | 33 */ 34 35/* 36 * 21143 and clone common register definitions. 37 */ 38 39#define DC_BUSCTL 0x00 /* bus control */ 40#define DC_TXSTART 0x08 /* tx start demand */ --- 625 unchanged lines hidden (view full) --- 666#define DC_TX_USE_TX_INTR 0x00000008 667#define DC_RX_FILTER_TULIP 0x00000010 668#define DC_TX_INTR_FIRSTFRAG 0x00000020 669#define DC_PNIC_RX_BUG_WAR 0x00000040 670#define DC_TX_FIXED_RING 0x00000080 671#define DC_TX_STORENFWD 0x00000100 672#define DC_REDUCED_MII_POLL 0x00000200 673#define DC_TX_INTR_ALWAYS 0x00000400 |
| 674#define DC_21143_NWAY 0x00000800 |
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| 674 675/* 676 * register space access macros 677 */ 678#define CSR_WRITE_4(sc, reg, val) \ 679 bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val) 680 681#define CSR_READ_4(sc, reg) \ --- 233 unchanged lines hidden --- | 675 676/* 677 * register space access macros 678 */ 679#define CSR_WRITE_4(sc, reg, val) \ 680 bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val) 681 682#define CSR_READ_4(sc, reg) \ --- 233 unchanged lines hidden --- |