| adapter.h (220643) | adapter.h (220649) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/cxgbe/adapter.h 220643 2011-04-14 20:06:23Z np $ | 27 * $FreeBSD: head/sys/dev/cxgbe/adapter.h 220649 2011-04-15 03:09:27Z np $ |
| 28 * 29 */ 30 31#ifndef __T4_ADAPTER_H__ 32#define __T4_ADAPTER_H__ 33 34#include <sys/bus.h> 35#include <sys/rman.h> --- 186 unchanged lines hidden (view full) --- 222}; 223 224typedef void (iq_intr_handler_t)(void *); 225 226enum { 227 /* iq flags */ 228 IQ_ALLOCATED = (1 << 1), /* firmware resources allocated */ 229 IQ_STARTED = (1 << 2), /* started */ | 28 * 29 */ 30 31#ifndef __T4_ADAPTER_H__ 32#define __T4_ADAPTER_H__ 33 34#include <sys/bus.h> 35#include <sys/rman.h> --- 186 unchanged lines hidden (view full) --- 222}; 223 224typedef void (iq_intr_handler_t)(void *); 225 226enum { 227 /* iq flags */ 228 IQ_ALLOCATED = (1 << 1), /* firmware resources allocated */ 229 IQ_STARTED = (1 << 2), /* started */ |
| 230 231 /* iq state */ 232 IQS_DISABLED = 0, 233 IQS_BUSY = 1, 234 IQS_IDLE = 2, |
|
| 230}; 231 232/* 233 * Ingress Queue: T4 is producer, driver is consumer. 234 */ 235struct sge_iq { 236 bus_dma_tag_t desc_tag; 237 bus_dmamap_t desc_map; 238 bus_addr_t ba; /* bus address of descriptor ring */ 239 char lockname[16]; 240 uint32_t flags; 241 uint16_t abs_id; /* absolute SGE id for the iq */ 242 int8_t intr_pktc_idx; /* packet count threshold index */ 243 int8_t pad0; 244 iq_intr_handler_t *handler; 245 __be64 *desc; /* KVA of descriptor ring */ 246 | 235}; 236 237/* 238 * Ingress Queue: T4 is producer, driver is consumer. 239 */ 240struct sge_iq { 241 bus_dma_tag_t desc_tag; 242 bus_dmamap_t desc_map; 243 bus_addr_t ba; /* bus address of descriptor ring */ 244 char lockname[16]; 245 uint32_t flags; 246 uint16_t abs_id; /* absolute SGE id for the iq */ 247 int8_t intr_pktc_idx; /* packet count threshold index */ 248 int8_t pad0; 249 iq_intr_handler_t *handler; 250 __be64 *desc; /* KVA of descriptor ring */ 251 |
| 247 struct mtx iq_lock; | 252 volatile uint32_t state; |
| 248 struct adapter *adapter; 249 const __be64 *cdesc; /* current descriptor */ 250 uint8_t gen; /* generation bit */ 251 uint8_t intr_params; /* interrupt holdoff parameters */ 252 uint8_t intr_next; /* holdoff for next interrupt */ 253 uint8_t esize; /* size (bytes) of each entry in the queue */ 254 uint16_t qsize; /* size (# of entries) of the queue */ 255 uint16_t cidx; /* consumer index */ --- 184 unchanged lines hidden (view full) --- 440#define ADAPTER_LOCK_ASSERT_OWNED(sc) mtx_assert(&(sc)->sc_lock, MA_OWNED) 441#define ADAPTER_LOCK_ASSERT_NOTOWNED(sc) mtx_assert(&(sc)->sc_lock, MA_NOTOWNED) 442 443#define PORT_LOCK(pi) mtx_lock(&(pi)->pi_lock) 444#define PORT_UNLOCK(pi) mtx_unlock(&(pi)->pi_lock) 445#define PORT_LOCK_ASSERT_OWNED(pi) mtx_assert(&(pi)->pi_lock, MA_OWNED) 446#define PORT_LOCK_ASSERT_NOTOWNED(pi) mtx_assert(&(pi)->pi_lock, MA_NOTOWNED) 447 | 253 struct adapter *adapter; 254 const __be64 *cdesc; /* current descriptor */ 255 uint8_t gen; /* generation bit */ 256 uint8_t intr_params; /* interrupt holdoff parameters */ 257 uint8_t intr_next; /* holdoff for next interrupt */ 258 uint8_t esize; /* size (bytes) of each entry in the queue */ 259 uint16_t qsize; /* size (# of entries) of the queue */ 260 uint16_t cidx; /* consumer index */ --- 184 unchanged lines hidden (view full) --- 445#define ADAPTER_LOCK_ASSERT_OWNED(sc) mtx_assert(&(sc)->sc_lock, MA_OWNED) 446#define ADAPTER_LOCK_ASSERT_NOTOWNED(sc) mtx_assert(&(sc)->sc_lock, MA_NOTOWNED) 447 448#define PORT_LOCK(pi) mtx_lock(&(pi)->pi_lock) 449#define PORT_UNLOCK(pi) mtx_unlock(&(pi)->pi_lock) 450#define PORT_LOCK_ASSERT_OWNED(pi) mtx_assert(&(pi)->pi_lock, MA_OWNED) 451#define PORT_LOCK_ASSERT_NOTOWNED(pi) mtx_assert(&(pi)->pi_lock, MA_NOTOWNED) 452 |
| 448#define IQ_LOCK(iq) mtx_lock(&(iq)->iq_lock) 449#define IQ_UNLOCK(iq) mtx_unlock(&(iq)->iq_lock) 450#define IQ_LOCK_ASSERT_OWNED(iq) mtx_assert(&(iq)->iq_lock, MA_OWNED) 451#define IQ_LOCK_ASSERT_NOTOWNED(iq) mtx_assert(&(iq)->iq_lock, MA_NOTOWNED) 452 | |
| 453#define FL_LOCK(fl) mtx_lock(&(fl)->fl_lock) 454#define FL_TRYLOCK(fl) mtx_trylock(&(fl)->fl_lock) 455#define FL_UNLOCK(fl) mtx_unlock(&(fl)->fl_lock) 456#define FL_LOCK_ASSERT_OWNED(fl) mtx_assert(&(fl)->fl_lock, MA_OWNED) 457#define FL_LOCK_ASSERT_NOTOWNED(fl) mtx_assert(&(fl)->fl_lock, MA_NOTOWNED) 458 | 453#define FL_LOCK(fl) mtx_lock(&(fl)->fl_lock) 454#define FL_TRYLOCK(fl) mtx_trylock(&(fl)->fl_lock) 455#define FL_UNLOCK(fl) mtx_unlock(&(fl)->fl_lock) 456#define FL_LOCK_ASSERT_OWNED(fl) mtx_assert(&(fl)->fl_lock, MA_OWNED) 457#define FL_LOCK_ASSERT_NOTOWNED(fl) mtx_assert(&(fl)->fl_lock, MA_NOTOWNED) 458 |
| 459#define RXQ_LOCK(rxq) IQ_LOCK(&(rxq)->iq) 460#define RXQ_UNLOCK(rxq) IQ_UNLOCK(&(rxq)->iq) 461#define RXQ_LOCK_ASSERT_OWNED(rxq) IQ_LOCK_ASSERT_OWNED(&(rxq)->iq) 462#define RXQ_LOCK_ASSERT_NOTOWNED(rxq) IQ_LOCK_ASSERT_NOTOWNED(&(rxq)->iq) 463 | |
| 464#define RXQ_FL_LOCK(rxq) FL_LOCK(&(rxq)->fl) 465#define RXQ_FL_UNLOCK(rxq) FL_UNLOCK(&(rxq)->fl) 466#define RXQ_FL_LOCK_ASSERT_OWNED(rxq) FL_LOCK_ASSERT_OWNED(&(rxq)->fl) 467#define RXQ_FL_LOCK_ASSERT_NOTOWNED(rxq) FL_LOCK_ASSERT_NOTOWNED(&(rxq)->fl) 468 469#define EQ_LOCK(eq) mtx_lock(&(eq)->eq_lock) 470#define EQ_TRYLOCK(eq) mtx_trylock(&(eq)->eq_lock) 471#define EQ_UNLOCK(eq) mtx_unlock(&(eq)->eq_lock) --- 109 unchanged lines hidden (view full) --- 581int t4_teardown_adapter_iqs(struct adapter *); 582int t4_setup_eth_queues(struct port_info *); 583int t4_teardown_eth_queues(struct port_info *); 584void t4_intr_all(void *); 585void t4_intr_fwd(void *); 586void t4_intr_err(void *); 587void t4_intr_evt(void *); 588void t4_intr_data(void *); | 459#define RXQ_FL_LOCK(rxq) FL_LOCK(&(rxq)->fl) 460#define RXQ_FL_UNLOCK(rxq) FL_UNLOCK(&(rxq)->fl) 461#define RXQ_FL_LOCK_ASSERT_OWNED(rxq) FL_LOCK_ASSERT_OWNED(&(rxq)->fl) 462#define RXQ_FL_LOCK_ASSERT_NOTOWNED(rxq) FL_LOCK_ASSERT_NOTOWNED(&(rxq)->fl) 463 464#define EQ_LOCK(eq) mtx_lock(&(eq)->eq_lock) 465#define EQ_TRYLOCK(eq) mtx_trylock(&(eq)->eq_lock) 466#define EQ_UNLOCK(eq) mtx_unlock(&(eq)->eq_lock) --- 109 unchanged lines hidden (view full) --- 576int t4_teardown_adapter_iqs(struct adapter *); 577int t4_setup_eth_queues(struct port_info *); 578int t4_teardown_eth_queues(struct port_info *); 579void t4_intr_all(void *); 580void t4_intr_fwd(void *); 581void t4_intr_err(void *); 582void t4_intr_evt(void *); 583void t4_intr_data(void *); |
| 584void t4_evt_rx(void *); 585void t4_eth_rx(void *); |
|
| 589int t4_eth_tx(struct ifnet *, struct sge_txq *, struct mbuf *); 590void t4_update_fl_bufsize(struct ifnet *); 591 592#endif | 586int t4_eth_tx(struct ifnet *, struct sge_txq *, struct mbuf *); 587void t4_update_fl_bufsize(struct ifnet *); 588 589#endif |