ar5416reg.h (222300) | ar5416reg.h (222301) |
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1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * | 1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * |
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416reg.h 222300 2011-05-26 08:35:47Z adrian $ | 17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416reg.h 222301 2011-05-26 09:15:33Z adrian $ |
18 */ 19#ifndef _DEV_ATH_AR5416REG_H 20#define _DEV_ATH_AR5416REG_H 21 22#include <dev/ath/ath_hal/ar5212/ar5212reg.h> 23 24/* 25 * Register added starting with the AR5416 --- 188 unchanged lines hidden (view full) --- 214#define AR_AHB_EXACT_WR_EN 0x00000000 /* write exact bytes */ 215#define AR_AHB_BUF_WR_EN 0x00000001 /* buffer write upto cacheline*/ 216#define AR_AHB_EXACT_RD_EN 0x00000000 /* read exact bytes */ 217#define AR_AHB_CACHELINE_RD_EN 0x00000002 /* read upto end of cacheline */ 218#define AR_AHB_PREFETCH_RD_EN 0x00000004 /* prefetch upto page boundary*/ 219#define AR_AHB_PAGE_SIZE_1K 0x00000000 /* set page-size as 1k */ 220#define AR_AHB_PAGE_SIZE_2K 0x00000008 /* set page-size as 2k */ 221#define AR_AHB_PAGE_SIZE_4K 0x00000010 /* set page-size as 4k */ | 18 */ 19#ifndef _DEV_ATH_AR5416REG_H 20#define _DEV_ATH_AR5416REG_H 21 22#include <dev/ath/ath_hal/ar5212/ar5212reg.h> 23 24/* 25 * Register added starting with the AR5416 --- 188 unchanged lines hidden (view full) --- 214#define AR_AHB_EXACT_WR_EN 0x00000000 /* write exact bytes */ 215#define AR_AHB_BUF_WR_EN 0x00000001 /* buffer write upto cacheline*/ 216#define AR_AHB_EXACT_RD_EN 0x00000000 /* read exact bytes */ 217#define AR_AHB_CACHELINE_RD_EN 0x00000002 /* read upto end of cacheline */ 218#define AR_AHB_PREFETCH_RD_EN 0x00000004 /* prefetch upto page boundary*/ 219#define AR_AHB_PAGE_SIZE_1K 0x00000000 /* set page-size as 1k */ 220#define AR_AHB_PAGE_SIZE_2K 0x00000008 /* set page-size as 2k */ 221#define AR_AHB_PAGE_SIZE_4K 0x00000010 /* set page-size as 4k */ |
222/* Kiwi */ 223#define AR_AHB_CUSTOM_BURST_EN 0x000000C0 /* set Custom Burst Mode */ 224#define AR_AHB_CUSTOM_BURST_EN_S 6 /* set Custom Burst Mode */ 225#define AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL 3 /* set both bits in Async FIFO mode */ |
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222 223/* MAC PCU Registers */ 224#define AR_STA_ID1_PRESERVE_SEQNUM 0x20000000 /* Don't replace seq num */ 225 226/* Extended PCU DIAG_SW control fields */ 227#define AR_DIAG_DUAL_CHAIN_INFO 0x01000000 /* dual chain channel info */ 228#define AR_DIAG_RX_ABORT 0x02000000 /* abort rx */ 229#define AR_DIAG_SATURATE_CCNT 0x04000000 /* sat. cycle cnts (no shift) */ --- 216 unchanged lines hidden (view full) --- 446#define AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE 0x00000002 447#define AR_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT 0x00000004 448/* 449 * This bit enables the Multicast search based on both MAC Address and Key ID. 450 * If bit is 0, then Multicast search is based on MAC address only. 451 * For Merlin and above only. 452 */ 453#define AR_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE 0x00000040 | 226 227/* MAC PCU Registers */ 228#define AR_STA_ID1_PRESERVE_SEQNUM 0x20000000 /* Don't replace seq num */ 229 230/* Extended PCU DIAG_SW control fields */ 231#define AR_DIAG_DUAL_CHAIN_INFO 0x01000000 /* dual chain channel info */ 232#define AR_DIAG_RX_ABORT 0x02000000 /* abort rx */ 233#define AR_DIAG_SATURATE_CCNT 0x04000000 /* sat. cycle cnts (no shift) */ --- 216 unchanged lines hidden (view full) --- 450#define AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE 0x00000002 451#define AR_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT 0x00000004 452/* 453 * This bit enables the Multicast search based on both MAC Address and Key ID. 454 * If bit is 0, then Multicast search is based on MAC address only. 455 * For Merlin and above only. 456 */ 457#define AR_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE 0x00000040 |
458#define AR_PCU_MISC_MODE2_ENABLE_AGGWEP 0x00020000 /* Kiwi or later? */ |
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454#define AR_PCU_MISC_MODE2_HWWAR1 0x00100000 455#define AR_PCU_MISC_MODE2_HWWAR2 0x02000000 456 | 459#define AR_PCU_MISC_MODE2_HWWAR1 0x00100000 460#define AR_PCU_MISC_MODE2_HWWAR2 0x02000000 461 |
462/* For Kiwi */ 463#define AR_MAC_PCU_ASYNC_FIFO_REG3 0x8358 464#define AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL 0x00000400 465#define AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET 0x80000000 466 467/* TSF2. For Kiwi only */ 468#define AR_TSF2_L32 0x8390 469#define AR_TSF2_U32 0x8394 470 471/* MAC Direct Connect Control. For Kiwi only */ 472#define AR_DIRECT_CONNECT 0x83A0 473#define AR_DC_AP_STA_EN 0x00000001 474 |
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457/* GPIO Interrupt */ 458#define AR_INTR_GPIO 0x3FF00000 /* gpio interrupted */ 459#define AR_INTR_GPIO_S 20 460 461#define AR_GPIO_OUT_CTRL 0x000003FF /* 0 = out, 1 = in */ 462#define AR_GPIO_OUT_VAL 0x000FFC00 463#define AR_GPIO_OUT_VAL_S 10 464#define AR_GPIO_INTR_CTRL 0x3FF00000 --- 18 unchanged lines hidden (view full) --- 483#define AR_GPIO_JTAG_DISABLE 0x00020000 484 485#define AR_2040_JOINED_RX_CLEAR 0x00000001 /* use ctl + ext rx_clear for cca */ 486 487#define AR_PCU_TXBUF_CTRL_SIZE_MASK 0x7FF 488#define AR_PCU_TXBUF_CTRL_USABLE_SIZE 0x700 489#define AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE 0x380 490 | 475/* GPIO Interrupt */ 476#define AR_INTR_GPIO 0x3FF00000 /* gpio interrupted */ 477#define AR_INTR_GPIO_S 20 478 479#define AR_GPIO_OUT_CTRL 0x000003FF /* 0 = out, 1 = in */ 480#define AR_GPIO_OUT_VAL 0x000FFC00 481#define AR_GPIO_OUT_VAL_S 10 482#define AR_GPIO_INTR_CTRL 0x3FF00000 --- 18 unchanged lines hidden (view full) --- 501#define AR_GPIO_JTAG_DISABLE 0x00020000 502 503#define AR_2040_JOINED_RX_CLEAR 0x00000001 /* use ctl + ext rx_clear for cca */ 504 505#define AR_PCU_TXBUF_CTRL_SIZE_MASK 0x7FF 506#define AR_PCU_TXBUF_CTRL_USABLE_SIZE 0x700 507#define AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE 0x380 508 |
509/* IFS, SIFS, slot, etc for Async FIFO mode (Kiwi) */ 510#define AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR 0x000003AB 511#define AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR 0x16001D56 512#define AR_USEC_ASYNC_FIFO_DUR 0x12e00074 513#define AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR 0x00000420 514#define AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR 0x0000A5EB 515 516/* Used by Kiwi Async FIFO */ 517#define AR_MAC_PCU_LOGIC_ANALYZER 0x8264 518#define AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768 0x20000000 519 |
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491/* Eeprom defines */ 492#define AR_EEPROM_STATUS_DATA_VAL 0x0000ffff 493#define AR_EEPROM_STATUS_DATA_VAL_S 0 494#define AR_EEPROM_STATUS_DATA_BUSY 0x00010000 495#define AR_EEPROM_STATUS_DATA_BUSY_ACCESS 0x00020000 496#define AR_EEPROM_STATUS_DATA_PROT_ACCESS 0x00040000 497#define AR_EEPROM_STATUS_DATA_ABSENT_ACCESS 0x00080000 498 --- 62 unchanged lines hidden (view full) --- 561#define AR_XSREV_VERSION_MERLIN 0x80 /* Merlin Version */ 562#define AR_XSREV_REVISION_MERLIN_10 0 /* Merlin 1.0 */ 563#define AR_XSREV_REVISION_MERLIN_20 1 /* Merlin 2.0 */ 564#define AR_XSREV_REVISION_MERLIN_21 2 /* Merlin 2.1 */ 565#define AR_XSREV_VERSION_KITE 0xC0 /* Kite Version */ 566#define AR_XSREV_REVISION_KITE_10 0 /* Kite 1.0 */ 567#define AR_XSREV_REVISION_KITE_11 1 /* Kite 1.1 */ 568#define AR_XSREV_REVISION_KITE_12 2 /* Kite 1.2 */ | 520/* Eeprom defines */ 521#define AR_EEPROM_STATUS_DATA_VAL 0x0000ffff 522#define AR_EEPROM_STATUS_DATA_VAL_S 0 523#define AR_EEPROM_STATUS_DATA_BUSY 0x00010000 524#define AR_EEPROM_STATUS_DATA_BUSY_ACCESS 0x00020000 525#define AR_EEPROM_STATUS_DATA_PROT_ACCESS 0x00040000 526#define AR_EEPROM_STATUS_DATA_ABSENT_ACCESS 0x00080000 527 --- 62 unchanged lines hidden (view full) --- 590#define AR_XSREV_VERSION_MERLIN 0x80 /* Merlin Version */ 591#define AR_XSREV_REVISION_MERLIN_10 0 /* Merlin 1.0 */ 592#define AR_XSREV_REVISION_MERLIN_20 1 /* Merlin 2.0 */ 593#define AR_XSREV_REVISION_MERLIN_21 2 /* Merlin 2.1 */ 594#define AR_XSREV_VERSION_KITE 0xC0 /* Kite Version */ 595#define AR_XSREV_REVISION_KITE_10 0 /* Kite 1.0 */ 596#define AR_XSREV_REVISION_KITE_11 1 /* Kite 1.1 */ 597#define AR_XSREV_REVISION_KITE_12 2 /* Kite 1.2 */ |
569#define AR_XSREV_VERSION_KIWI 0x180 /* Kite Version */ | 598#define AR_XSREV_VERSION_KIWI 0x180 /* Kiwi (AR9287) */ |
570#define AR_XSREV_REVISION_KIWI_10 0 571#define AR_XSREV_REVISION_KIWI_11 1 572#define AR_XSREV_REVISION_KIWI_12 2 573#define AR_XSREV_REVISION_KIWI_13 3 574 575/* Owl (AR5416) */ 576#define AR_SREV_OWL(_ah) \ 577 ((AH_PRIVATE((_ah))->ah_macVersion == AR_XSREV_VERSION_OWL_PCI) || \ --- 106 unchanged lines hidden --- | 599#define AR_XSREV_REVISION_KIWI_10 0 600#define AR_XSREV_REVISION_KIWI_11 1 601#define AR_XSREV_REVISION_KIWI_12 2 602#define AR_XSREV_REVISION_KIWI_13 3 603 604/* Owl (AR5416) */ 605#define AR_SREV_OWL(_ah) \ 606 ((AH_PRIVATE((_ah))->ah_macVersion == AR_XSREV_VERSION_OWL_PCI) || \ --- 106 unchanged lines hidden --- |