ar5416_interrupts.c (225925) | ar5416_interrupts.c (227365) |
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1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * | 1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * |
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c 225925 2011-10-02 14:08:56Z adrian $ | 17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c 227365 2011-11-08 22:50:28Z adrian $ |
18 */ 19#include "opt_ah.h" 20 21#include "ah.h" 22#include "ah_internal.h" 23 24#include "ar5416/ar5416.h" 25#include "ar5416/ar5416reg.h" --- 39 unchanged lines hidden (view full) --- 65 * interrupts pending, as well as an unmasked value 66 */ 67HAL_BOOL 68ar5416GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked) 69{ 70 uint32_t isr, isr0, isr1, sync_cause = 0; 71 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; 72 | 18 */ 19#include "opt_ah.h" 20 21#include "ah.h" 22#include "ah_internal.h" 23 24#include "ar5416/ar5416.h" 25#include "ar5416/ar5416reg.h" --- 39 unchanged lines hidden (view full) --- 65 * interrupts pending, as well as an unmasked value 66 */ 67HAL_BOOL 68ar5416GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked) 69{ 70 uint32_t isr, isr0, isr1, sync_cause = 0; 71 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; 72 |
73#ifdef AH_INTERRUPT_DEBUGGING |
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73 /* | 74 /* |
75 * Blank the interrupt debugging area regardless. 76 */ 77 bzero(&ah->ah_intrstate, sizeof(ah->ah_intrstate)); 78#endif 79 80 /* |
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74 * Verify there's a mac interrupt and the RTC is on. 75 */ 76 if (AR_SREV_HOWL(ah)) { 77 *masked = 0; 78 isr = OS_REG_READ(ah, AR_ISR); 79 } else { 80 if ((OS_REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) && 81 (OS_REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M) == AR_RTC_STATUS_ON) 82 isr = OS_REG_READ(ah, AR_ISR); 83 else 84 isr = 0; 85 sync_cause = OS_REG_READ(ah, AR_INTR_SYNC_CAUSE); 86 sync_cause &= AR_INTR_SYNC_DEFAULT; 87 *masked = 0; 88 89 if (isr == 0 && sync_cause == 0) 90 return AH_FALSE; 91 } 92 | 81 * Verify there's a mac interrupt and the RTC is on. 82 */ 83 if (AR_SREV_HOWL(ah)) { 84 *masked = 0; 85 isr = OS_REG_READ(ah, AR_ISR); 86 } else { 87 if ((OS_REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) && 88 (OS_REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M) == AR_RTC_STATUS_ON) 89 isr = OS_REG_READ(ah, AR_ISR); 90 else 91 isr = 0; 92 sync_cause = OS_REG_READ(ah, AR_INTR_SYNC_CAUSE); 93 sync_cause &= AR_INTR_SYNC_DEFAULT; 94 *masked = 0; 95 96 if (isr == 0 && sync_cause == 0) 97 return AH_FALSE; 98 } 99 |
100#ifdef AH_INTERRUPT_DEBUGGING 101 ah->ah_intrstate[0] = isr; 102 ah->ah_intrstate[1] = OS_REG_READ(ah, AR_ISR_S0); 103 ah->ah_intrstate[2] = OS_REG_READ(ah, AR_ISR_S1); 104 ah->ah_intrstate[3] = OS_REG_READ(ah, AR_ISR_S2); 105 ah->ah_intrstate[4] = OS_REG_READ(ah, AR_ISR_S3); 106 ah->ah_intrstate[5] = OS_REG_READ(ah, AR_ISR_S4); 107 ah->ah_intrstate[6] = OS_REG_READ(ah, AR_ISR_S5); 108#endif 109 |
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93 if (isr != 0) { 94 struct ath_hal_5212 *ahp = AH5212(ah); 95 uint32_t mask2; 96 97 mask2 = 0; 98 if (isr & AR_ISR_BCNMISC) { 99 uint32_t isr2 = OS_REG_READ(ah, AR_ISR_S2); 100 if (isr2 & AR_ISR_S2_TIM) --- 249 unchanged lines hidden --- | 110 if (isr != 0) { 111 struct ath_hal_5212 *ahp = AH5212(ah); 112 uint32_t mask2; 113 114 mask2 = 0; 115 if (isr & AR_ISR_BCNMISC) { 116 uint32_t isr2 = OS_REG_READ(ah, AR_ISR_S2); 117 if (isr2 & AR_ISR_S2_TIM) --- 249 unchanged lines hidden --- |