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ar5416_cal.c (203682) ar5416_cal.c (203882)
1/*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
1/*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c 203682 2010-02-08 20:12:01Z rpaulo $
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c 203882 2010-02-14 16:26:32Z rpaulo $
18 */
19#include "opt_ah.h"
20
21#include "ah.h"
22#include "ah_internal.h"
23#include "ah_devid.h"
24
25#include "ah_eeprom_v14.h"

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167HAL_BOOL
168ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan)
169{
170 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
171 HAL_CHANNEL_INTERNAL *ichan;
172
173 ichan = ath_hal_checkchannel(ah, chan);
174 HALASSERT(ichan != AH_NULL);
18 */
19#include "opt_ah.h"
20
21#include "ah.h"
22#include "ah_internal.h"
23#include "ah_devid.h"
24
25#include "ah_eeprom_v14.h"

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167HAL_BOOL
168ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan)
169{
170 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
171 HAL_CHANNEL_INTERNAL *ichan;
172
173 ichan = ath_hal_checkchannel(ah, chan);
174 HALASSERT(ichan != AH_NULL);
175 if (AR_SREV_KITE_12_OR_LATER(ah)) {
176 OS_REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
177 if (IEEE80211_IS_CHAN_HT20(chan)) {
178 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
179 AR_PHY_CL_CAL_ENABLE);
180 OS_REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
181 AR_PHY_PARALLEL_CAL_ENABLE);
182 OS_REG_SET_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
183 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
184 AR_PHY_AGC_CONTROL_FLTR_CAL);
185 OS_REG_CLR_BIT(ah, AR_PHY_TPCRG1,
186 AR_PHY_TPCRG1_PD_CAL_ENABLE);
187 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
188 AR_PHY_AGC_CONTROL_CAL);
189 /* Poll for offset calibration complete */
190 if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL,
191 AR_PHY_AGC_CONTROL_CAL, 0)) {
192 HALDEBUG(ah, HAL_DEBUG_ANY,
193 "%s: HT offset calibration failed to "
194 "complete in 1ms; noisy environment?\n",
195 __func__);
196 return AH_FALSE;
197 }
198 OS_REG_CLR_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
199 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
200 AR_PHY_PARALLEL_CAL_ENABLE);
201 }
202 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
203 OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
204 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
205 AR_PHY_AGC_CONTROL_FLTR_CAL);
206 OS_REG_SET_BIT(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE);
207 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
208
175
209 /* Poll for offset calibration complete */
210 if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL,
211 AR_PHY_AGC_CONTROL_CAL, 0)) {
212 HALDEBUG(ah, HAL_DEBUG_ANY,
213 "%s: offset calibration did not complete in 1ms; "
214 "noisy environment?\n", __func__);
215 return AH_FALSE;
216 }
217 OS_REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
218 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
219 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
220 AR_PHY_AGC_CONTROL_FLTR_CAL);
221 } else if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
176 if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
222 /* Enable Rx Filter Cal */
223 OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
224 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
225 AR_PHY_AGC_CONTROL_FLTR_CAL);
226
227 /* Clear the carrier leak cal bit */
228 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
229

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246
247 OS_REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
248 }
249
250 /* Calibrate the AGC */
251 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
252
253 /* Poll for offset calibration complete */
177 /* Enable Rx Filter Cal */
178 OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
179 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
180 AR_PHY_AGC_CONTROL_FLTR_CAL);
181
182 /* Clear the carrier leak cal bit */
183 OS_REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
184

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201
202 OS_REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
203 }
204
205 /* Calibrate the AGC */
206 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
207
208 /* Poll for offset calibration complete */
254 if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL,
255 AR_PHY_AGC_CONTROL_CAL, 0)) {
209 if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
256 HALDEBUG(ah, HAL_DEBUG_ANY,
210 HALDEBUG(ah, HAL_DEBUG_ANY,
257 "%s: AGC offset calibration did not complete in 1ms; "
211 "%s: offset calibration did not complete in 1ms; "
258 "noisy environment?\n", __func__);
259 return AH_FALSE;
260 }
261
262 /*
263 * Do NF calibration after DC offset and other CALs.
264 * Per system engineers, noise floor value can sometimes be 20 dB
265 * higher than normal value if DC offset and noise floor cal are

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607 val = OS_REG_READ(ah, ar5416_cca_regs[i]);
608 val &= 0xFFFFFE00;
609 val |= (((uint32_t)(-50) << 1) & 0x1ff);
610 OS_REG_WRITE(ah, ar5416_cca_regs[i], val);
611 }
612}
613
614void
212 "noisy environment?\n", __func__);
213 return AH_FALSE;
214 }
215
216 /*
217 * Do NF calibration after DC offset and other CALs.
218 * Per system engineers, noise floor value can sometimes be 20 dB
219 * higher than normal value if DC offset and noise floor cal are

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561 val = OS_REG_READ(ah, ar5416_cca_regs[i]);
562 val &= 0xFFFFFE00;
563 val |= (((uint32_t)(-50) << 1) & 0x1ff);
564 OS_REG_WRITE(ah, ar5416_cca_regs[i], val);
565 }
566}
567
568void
615ar5416InitNfHistBuff(struct ath_hal *ah, struct ar5212NfCalHist *h)
569ar5416InitNfHistBuff(struct ar5212NfCalHist *h)
616{
617 int i, j;
570{
571 int i, j;
618 int16_t privNF;
619
572
620 if (AR_SREV_KITE(ah))
621 privNF = AR9285_CCA_MAX_GOOD_VALUE;
622 else
623 privNF = AR5416_CCA_MAX_GOOD_VALUE;
624
625 for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
626 h[i].currIndex = 0;
627 h[i].privNF = AR5416_CCA_MAX_GOOD_VALUE;
628 h[i].invalidNFcount = AR512_NF_CAL_HIST_MAX;
629 for (j = 0; j < AR512_NF_CAL_HIST_MAX; j ++)
630 h[i].nfCalBuffer[j] = AR5416_CCA_MAX_GOOD_VALUE;
631 }
632}

--- 70 unchanged lines hidden --- 		573 for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
574 h[i].currIndex = 0;
575 h[i].privNF = AR5416_CCA_MAX_GOOD_VALUE;
576 h[i].invalidNFcount = AR512_NF_CAL_HIST_MAX;
577 for (j = 0; j < AR512_NF_CAL_HIST_MAX; j ++)
578 h[i].nfCalBuffer[j] = AR5416_CCA_MAX_GOOD_VALUE;
579 }
580}

--- 70 unchanged lines hidden ---