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1/*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2005-2006 Atheros Communications, Inc.
4 * All rights reserved.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 * $FreeBSD: head/sys/dev/ath/ath_hal/ah_regdomain.c 199491 2009-11-18 18:48:18Z rpaulo $
18 * $FreeBSD: head/sys/dev/ath/ath_hal/ah_regdomain.c 219394 2011-03-08 07:42:09Z adrian $
19 */
20#include "opt_ah.h"
21
22#include "ah.h"
23
24#include <net80211/_ieee80211.h>
25#include <net80211/ieee80211_regdomain.h>
26
27#include "ah_internal.h"
28#include "ah_eeprom.h"
29#include "ah_devid.h"
30
31#include "ah_regdomain.h"
32
33/*
34 * XXX this code needs a audit+review
35 */
36
37/* used throughout this file... */
38#define N(a) (sizeof (a) / sizeof (a[0]))
39
40#define HAL_MODE_11A_TURBO HAL_MODE_108A
41#define HAL_MODE_11G_TURBO HAL_MODE_108G
42
43/*
44 * BMLEN defines the size of the bitmask used to hold frequency
45 * band specifications. Note this must agree with the BM macro
46 * definition that's used to setup initializers. See also further
47 * comments below.
48 */
47#define BMLEN 2 /* 2 x 64 bits in each channel bitmask */
48typedef uint64_t chanbmask_t[BMLEN];
49
49/* BMLEN is now defined in ah_regdomain.h */
50#define W0(_a) \
51 (((_a) >= 0 && (_a) < 64 ? (((uint64_t) 1)<<(_a)) : (uint64_t) 0))
52#define W1(_a) \
53 (((_a) > 63 && (_a) < 128 ? (((uint64_t) 1)<<((_a)-64)) : (uint64_t) 0))
54#define BM1(_fa) { W0(_fa), W1(_fa) }
55#define BM2(_fa, _fb) { W0(_fa) | W0(_fb), W1(_fa) | W1(_fb) }
56#define BM3(_fa, _fb, _fc) \
57 { W0(_fa) | W0(_fb) | W0(_fc), W1(_fa) | W1(_fb) | W1(_fc) }

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309#define PSCAN_MKK3 0x0000000000008000ULL
310#define PSCAN_DEFER 0x7FFFFFFFFFFFFFFFULL
311#define IS_ECM_CHAN 0x8000000000000000ULL
312
313/*
314 * THE following table is the mapping of regdomain pairs specified by
315 * an 8 bit regdomain value to the individual unitary reg domains
316 */
317typedef struct regDomainPair {
318 HAL_REG_DOMAIN regDmnEnum; /* 16 bit reg domain pair */
319 HAL_REG_DOMAIN regDmn5GHz; /* 5GHz reg domain */
320 HAL_REG_DOMAIN regDmn2GHz; /* 2GHz reg domain */
321 uint32_t flags5GHz; /* Requirements flags (AdHoc
322 disallow, noise floor cal needed,
323 etc) */
324 uint32_t flags2GHz; /* Requirements flags (AdHoc
325 disallow, noise floor cal needed,
326 etc) */
327 uint64_t pscanMask; /* Passive Scan flags which
328 can override unitary domain
329 passive scan flags. This
330 value is used as a mask on
331 the unitary flags*/
332 uint16_t singleCC; /* Country code of single country if
333 a one-on-one mapping exists */
334} REG_DMN_PAIR_MAPPING;
335
317static REG_DMN_PAIR_MAPPING regDomainPairs[] = {
318 {NO_ENUMRD, DEBUG_REG_DMN, DEBUG_REG_DMN, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT },
319 {NULL1_WORLD, NULL1, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT },
320 {NULL1_ETSIB, NULL1, ETSIB, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT },
321 {NULL1_ETSIC, NULL1, ETSIC, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT },
322
323 {FCC2_FCCA, FCC2, FCCA, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT },
324 {FCC2_WORLD, FCC2, WORLD, NO_REQ, NO_REQ, PSCAN_DEFER, CTRY_DEFAULT },

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422 * bands with the complete matrix of all possible flags and settings
423 * for each band if it is used in ANY reg domain.
424 */
425
426#define DEF_REGDMN FCC1_FCCA
427#define COUNTRY_ERD_FLAG 0x8000
428#define WORLDWIDE_ROAMING_FLAG 0x4000
429
449typedef struct {
450 HAL_CTRY_CODE countryCode;
451 HAL_REG_DOMAIN regDmnEnum;
452} COUNTRY_CODE_TO_ENUM_RD;
453
430static COUNTRY_CODE_TO_ENUM_RD allCountries[] = {
431 { CTRY_DEBUG, NO_ENUMRD },
432 { CTRY_DEFAULT, DEF_REGDMN },
433 { CTRY_ALBANIA, NULL1_WORLD },
434 { CTRY_ALGERIA, NULL1_WORLD },
435 { CTRY_ARGENTINA, APL3_WORLD },
436 { CTRY_ARMENIA, ETSI4_WORLD },
437 { CTRY_AUSTRALIA, FCC2_WORLD },

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585 * 1/2 and 1/4 rate channels into a separate table).
586 *
587 * Beware of ordering; the indices are defined relative to the preceding
588 * entry so if things get off there will be confusion. A good way to
589 * check the indices is to collect them in a switch statement in a stub
590 * function so the compiler checks for duplicates.
591 */
592
617typedef struct {
618 uint16_t lowChannel; /* Low channel center in MHz */
619 uint16_t highChannel; /* High Channel center in MHz */
620 uint8_t powerDfs; /* Max power (dBm) for channel
621 range when using DFS */
622 uint8_t antennaMax; /* Max allowed antenna gain */
623 uint8_t channelBW; /* Bandwidth of the channel */
624 uint8_t channelSep; /* Channel separation within
625 the band */
626 uint64_t useDfs; /* Use DFS in the RegDomain
627 if corresponding bit is set */
628 uint64_t usePassScan; /* Use Passive Scan in the RegDomain
629 if corresponding bit is set */
630} REG_DMN_FREQ_BAND;
631
593/*
594 * 5GHz 11A channel tags
595 */
596static REG_DMN_FREQ_BAND regDmn5GhzFreq[] = {
597 { 4915, 4925, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2 },
598#define F1_4915_4925 0
599 { 4935, 4945, 23, 0, 10, 5, NO_DFS, PSCAN_MKK2 },
600#define F1_4935_4945 AFTER(F1_4915_4925)

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965 { 2437, 2437, 20, 6, 40, 40, NO_DFS, NO_PSCAN },
966#define T2_2437_2437 AFTER(T1_2437_2437)
967 { 2437, 2437, 18, 6, 40, 40, NO_DFS, PSCAN_WWR },
968#define T3_2437_2437 AFTER(T2_2437_2437)
969 { 2512, 2732, 5, 6, 40, 40, NO_DFS, NO_PSCAN },
970#define T1_2512_2732 AFTER(T3_2437_2437)
971};
972
1012typedef struct regDomain {
1013 uint16_t regDmnEnum; /* value from EnumRd table */
1014 uint8_t conformanceTestLimit;
1015 uint32_t flags; /* Requirement flags (AdHoc disallow,
1016 noise floor cal needed, etc) */
1017 uint64_t dfsMask; /* DFS bitmask for 5Ghz tables */
1018 uint64_t pscan; /* Bitmask for passive scan */
1019 chanbmask_t chan11a; /* 11a channels */
1020 chanbmask_t chan11a_turbo; /* 11a static turbo channels */
1021 chanbmask_t chan11a_dyn_turbo; /* 11a dynamic turbo channels */
1022 chanbmask_t chan11a_half; /* 11a 1/2 width channels */
1023 chanbmask_t chan11a_quarter; /* 11a 1/4 width channels */
1024 chanbmask_t chan11b; /* 11b channels */
1025 chanbmask_t chan11g; /* 11g channels */
1026 chanbmask_t chan11g_turbo; /* 11g dynamic turbo channels */
1027 chanbmask_t chan11g_half; /* 11g 1/2 width channels */
1028 chanbmask_t chan11g_quarter; /* 11g 1/4 width channels */
1029} REG_DOMAIN;
1030
973static REG_DOMAIN regDomains[] = {
974
975 {.regDmnEnum = DEBUG_REG_DMN,
976 .conformanceTestLimit = FCC,
977 .dfsMask = DFS_FCC3,
978 .chan11a = BM4(F1_4950_4980,
979 F1_5120_5240,
980 F1_5260_5700,

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1650 WG1_2467_2467),
1651 .chan11g_turbo = BM1(T3_2437_2437)},
1652
1653 {.regDmnEnum = NULL1,
1654 .conformanceTestLimit = NO_CTL,
1655 }
1656};
1657
1716struct cmode {
1717 u_int mode;
1718 u_int flags;
1719};
1720
1658static const struct cmode modes[] = {
1659 { HAL_MODE_TURBO, IEEE80211_CHAN_ST },
1660 { HAL_MODE_11A, IEEE80211_CHAN_A },
1661 { HAL_MODE_11B, IEEE80211_CHAN_B },
1662 { HAL_MODE_11G, IEEE80211_CHAN_G },
1663 { HAL_MODE_11G_TURBO, IEEE80211_CHAN_108G },
1664 { HAL_MODE_11A_TURBO, IEEE80211_CHAN_108A },
1665 { HAL_MODE_11A_QUARTER_RATE,

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