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ata-pci.c (85350) ata-pci.c (85352)
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 85350 2001-10-23 09:25:57Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 85352 2001-10-23 09:57:49Z sos $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/disk.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/bio.h>
38#include <sys/malloc.h>
39#include <sys/devicestat.h>
40#include <sys/sysctl.h>
41#include <machine/stdarg.h>
42#include <machine/resource.h>
43#include <machine/bus.h>
44#ifdef __alpha__
45#include <machine/md_var.h>
46#endif
47#include <sys/rman.h>
48#include <pci/pcivar.h>
49#include <pci/pcireg.h>
50#include <dev/ata/ata-all.h>
51
52/* device structures */
53struct ata_pci_softc {
54 struct resource *bmio;
55 int bmaddr;
56 struct resource *irq;
57 int irqcnt;
58};
59
60/* prototypes */
61void ata_via686b(device_t);
62
63/* misc defines */
64#define IOMASK 0xfffffffc
65#define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \
66 (pci_get_progif(dev) & 0x05) != 0x05)
67
68int
69ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid)
70{
71 device_t *children, child;
72 int nchildren, i;
73
74 if (device_get_children(device_get_parent(dev), &children, &nchildren))
75 return 0;
76
77 for (i = 0; i < nchildren; i++) {
78 child = children[i];
79
80 /* check that it's on the same silicon and the device we want */
81 if (pci_get_slot(dev) == pci_get_slot(child) &&
82 pci_get_devid(child) == devid && pci_get_revid(child) >= revid) {
83 free(children, M_TEMP);
84 return 1;
85 }
86 }
87 free(children, M_TEMP);
88 return 0;
89}
90
91void
92ata_via686b(device_t dev)
93{
94 device_t *children, child;
95 int nchildren, i;
96
97 if (device_get_children(device_get_parent(dev), &children, &nchildren))
98 return;
99
100 for (i = 0; i < nchildren; i++) {
101 child = children[i];
102
103 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */
104 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */
105 pci_write_config(child, 0x75, 0x83, 1);
106 pci_write_config(child, 0x76,
107 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1);
108 device_printf(dev, "VIA '686b southbridge fix applied\n");
109 break;
110 }
111 }
112 free(children, M_TEMP);
113}
114
115static const char *
116ata_pci_match(device_t dev)
117{
118 if (pci_get_class(dev) != PCIC_STORAGE)
119 return NULL;
120
121 switch (pci_get_devid(dev)) {
122 /* supported chipsets */
123 case 0x12308086:
124 return "Intel PIIX ATA controller";
125
126 case 0x70108086:
127 return "Intel PIIX3 ATA controller";
128
129 case 0x71118086:
130 case 0x71998086:
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/disk.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/bio.h>
38#include <sys/malloc.h>
39#include <sys/devicestat.h>
40#include <sys/sysctl.h>
41#include <machine/stdarg.h>
42#include <machine/resource.h>
43#include <machine/bus.h>
44#ifdef __alpha__
45#include <machine/md_var.h>
46#endif
47#include <sys/rman.h>
48#include <pci/pcivar.h>
49#include <pci/pcireg.h>
50#include <dev/ata/ata-all.h>
51
52/* device structures */
53struct ata_pci_softc {
54 struct resource *bmio;
55 int bmaddr;
56 struct resource *irq;
57 int irqcnt;
58};
59
60/* prototypes */
61void ata_via686b(device_t);
62
63/* misc defines */
64#define IOMASK 0xfffffffc
65#define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \
66 (pci_get_progif(dev) & 0x05) != 0x05)
67
68int
69ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid)
70{
71 device_t *children, child;
72 int nchildren, i;
73
74 if (device_get_children(device_get_parent(dev), &children, &nchildren))
75 return 0;
76
77 for (i = 0; i < nchildren; i++) {
78 child = children[i];
79
80 /* check that it's on the same silicon and the device we want */
81 if (pci_get_slot(dev) == pci_get_slot(child) &&
82 pci_get_devid(child) == devid && pci_get_revid(child) >= revid) {
83 free(children, M_TEMP);
84 return 1;
85 }
86 }
87 free(children, M_TEMP);
88 return 0;
89}
90
91void
92ata_via686b(device_t dev)
93{
94 device_t *children, child;
95 int nchildren, i;
96
97 if (device_get_children(device_get_parent(dev), &children, &nchildren))
98 return;
99
100 for (i = 0; i < nchildren; i++) {
101 child = children[i];
102
103 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */
104 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */
105 pci_write_config(child, 0x75, 0x83, 1);
106 pci_write_config(child, 0x76,
107 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1);
108 device_printf(dev, "VIA '686b southbridge fix applied\n");
109 break;
110 }
111 }
112 free(children, M_TEMP);
113}
114
115static const char *
116ata_pci_match(device_t dev)
117{
118 if (pci_get_class(dev) != PCIC_STORAGE)
119 return NULL;
120
121 switch (pci_get_devid(dev)) {
122 /* supported chipsets */
123 case 0x12308086:
124 return "Intel PIIX ATA controller";
125
126 case 0x70108086:
127 return "Intel PIIX3 ATA controller";
128
129 case 0x71118086:
130 case 0x71998086:
131 case 0x84ca8086:
131 return "Intel PIIX4 ATA33 controller";
132
133 case 0x24218086:
134 return "Intel ICH0 ATA33 controller";
135
136 case 0x24118086:
132 return "Intel PIIX4 ATA33 controller";
133
134 case 0x24218086:
135 return "Intel ICH0 ATA33 controller";
136
137 case 0x24118086:
138 case 0x76018086:
137 return "Intel ICH ATA66 controller";
138
139 case 0x244a8086:
140 case 0x244b8086:
141 return "Intel ICH2 ATA100 controller";
142
139 return "Intel ICH ATA66 controller";
140
141 case 0x244a8086:
142 case 0x244b8086:
143 return "Intel ICH2 ATA100 controller";
144
145 case 0x248a8086:
146 case 0x248b8086:
147 return "Intel ICH3 ATA100 controller";
148
143 case 0x522910b9:
144 if (pci_get_revid(dev) < 0x20)
145 return "AcerLabs Aladdin ATA controller";
146 else
147 return "AcerLabs Aladdin ATA33 controller";
148
149 case 0x05711106:
150 if (ata_find_dev(dev, 0x05861106, 0x02))
151 return "VIA 82C586 ATA33 controller";
152 if (ata_find_dev(dev, 0x05861106, 0))
153 return "VIA 82C586 ATA controller";
154 if (ata_find_dev(dev, 0x05961106, 0x12))
155 return "VIA 82C596 ATA66 controller";
156 if (ata_find_dev(dev, 0x05961106, 0))
157 return "VIA 82C596 ATA33 controller";
158 if (ata_find_dev(dev, 0x06861106, 0x40) ||
159 ata_find_dev(dev, 0x30741106, 0))
160 return "VIA 82C686 ATA100 controller";
161 if (ata_find_dev(dev, 0x06861106, 0))
162 return "VIA 82C686 ATA66 controller";
163 return "VIA Apollo ATA controller";
164
165 case 0x55131039:
166 return "SiS 5591 ATA33 controller";
167
168 case 0x06491095:
169 return "CMD 649 ATA100 controller";
170
171 case 0x06481095:
172 return "CMD 648 ATA66 controller";
173
174 case 0x06461095:
175 return "CMD 646 ATA controller";
176
177 case 0xc6931080:
178 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE)
179 return "Cypress 82C693 ATA controller";
180 break;
181
182 case 0x01021078:
183 return "Cyrix 5530 ATA33 controller";
184
185 case 0x74091022:
186 return "AMD 756 ATA66 controller";
187
188 case 0x74111022:
189 return "AMD 766 ATA100 controller";
190
191 case 0x02111166:
192 return "ServerWorks ROSB4 ATA33 controller";
193
194 case 0x4d33105a:
195 return "Promise ATA33 controller";
196
197 case 0x4d38105a:
198 return "Promise ATA66 controller";
199
200 case 0x0d30105a:
201 case 0x4d30105a:
202 return "Promise ATA100 controller";
203
204 case 0x4d68105a:
205 case 0x6268105a:
206 return "Promise TX2 ATA100 controller";
207
208 case 0x4d69105a:
209 return "Promise ATA133 controller";
210
211 case 0x00041103:
212 switch (pci_get_revid(dev)) {
213 case 0x00:
214 case 0x01:
215 return "HighPoint HPT366 ATA66 controller";
216 case 0x02:
217 return "HighPoint HPT368 ATA66 controller";
218 case 0x03:
219 case 0x04:
220 return "HighPoint HPT370 ATA100 controller";
221 case 0x05:
222 return "HighPoint HPT372 ATA133 controller";
223 default:
224 return "Unknown revision HighPoint ATA controller";
225 }
226
227 /* unsupported but known chipsets, generic DMA only */
228 case 0x10001042:
229 case 0x10011042:
230 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible";
231
232 case 0x06401095:
233 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible";
234
235 /* unknown chipsets, try generic DMA if it seems possible */
236 default:
237 if (pci_get_class(dev) == PCIC_STORAGE &&
238 (pci_get_subclass(dev) == PCIS_STORAGE_IDE))
239 return "Generic PCI ATA controller";
240 }
241 return NULL;
242}
243
244static int
245ata_pci_probe(device_t dev)
246{
247 const char *desc = ata_pci_match(dev);
248
249 if (desc) {
250 device_set_desc(dev, desc);
251 return 0;
252 }
253 else
254 return ENXIO;
255}
256
257static int
258ata_pci_add_child(device_t dev, int unit)
259{
260 device_t child;
261
262 /* check if this is located at one of the std addresses */
263 if (ATA_MASTERDEV(dev)) {
264 if (!(child = device_add_child(dev, "ata", unit)))
265 return ENOMEM;
266 }
267 else {
268 if (!(child = device_add_child(dev, "ata", 2)))
269 return ENOMEM;
270 }
271 return 0;
272}
273
274static int
275ata_pci_attach(device_t dev)
276{
277 struct ata_pci_softc *sc = device_get_softc(dev);
278 u_int8_t class, subclass;
279 u_int32_t type, cmd;
280 int rid;
281
282 /* set up vendor-specific stuff */
283 type = pci_get_devid(dev);
284 class = pci_get_class(dev);
285 subclass = pci_get_subclass(dev);
286 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
287
288 if (!(cmd & PCIM_CMD_PORTEN)) {
289 device_printf(dev, "ATA channel disabled by BIOS\n");
290 return 0;
291 }
292
293 /* is busmastering supported ? */
294 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) ==
295 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) {
296
297 /* is there a valid port range to connect to ? */
298 rid = 0x20;
299 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
300 0, ~0, 1, RF_ACTIVE);
301 if (!sc->bmio)
302 device_printf(dev, "Busmastering DMA not configured\n");
303 }
304 else
305 device_printf(dev, "Busmastering DMA not supported\n");
306
307 /* do extra chipset specific setups */
308 switch (type) {
309 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
310 pci_write_config(dev, 0x53,
311 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
312 break;
313
314 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */
315 case 0x4d30105a:
316 case 0x0d30105a:
317 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a);
318 /* FALLTHROUGH */
319
320 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */
321 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01);
322 break;
323
324 case 0x00041103: /* HighPoint */
325 switch (pci_get_revid(dev)) {
326 case 0x00: /* HPT 366 */
327 case 0x01:
328 /* turn off interrupt prediction */
329 pci_write_config(dev, 0x51,
330 (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
331 break;
332
333 case 0x02: /* HPT 368 */
334 case 0x03: /* HPT 370 */
335 case 0x04:
336 case 0x05: /* HPT 372 */
337 /* turn off interrupt prediction */
338 pci_write_config(dev, 0x51,
339 (pci_read_config(dev, 0x51, 1) & ~0x02), 1);
340 pci_write_config(dev, 0x55,
341 (pci_read_config(dev, 0x55, 1) & ~0x02), 1);
342 /* turn on interrupts */
343 pci_write_config(dev, 0x5a,
344 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
345
346 }
347 break;
348
349 case 0x05711106: /* VIA 82C586, '596, '686 default setup */
350 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */
351 if ((ata_find_dev(dev, 0x06861106, 0) &&
352 !ata_find_dev(dev, 0x06861106, 0x40)) ||
353 ata_find_dev(dev, 0x05961106, 0x12))
354 pci_write_config(dev, 0x50, 0x030b030b, 4);
355
356 /* the '686b might need the data corruption fix */
357 if (ata_find_dev(dev, 0x06861106, 0x40))
358 ata_via686b(dev);
359
360 /* FALLTHROUGH */
361
362 case 0x74091022: /* AMD 756 default setup */
363 case 0x74111022: /* AMD 766 default setup */
364
365 /* set prefetch, postwrite */
366 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
367
368 /* set fifo configuration half'n'half */
369 pci_write_config(dev, 0x43,
370 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1);
371
372 /* set status register read retry */
373 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1);
374
375 /* set DMA read & end-of-sector fifo flush */
376 pci_write_config(dev, 0x46,
377 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
378
379 /* set sector size */
380 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
381 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
382 break;
383
384 case 0x10001042: /* RZ 100? known bad, no DMA */
385 case 0x10011042:
386 case 0x06401095: /* CMD 640 known bad, no DMA */
387 sc->bmio = NULL;
388 device_printf(dev, "Busmastering DMA disabled\n");
389 }
390
391 if (sc->bmio) {
392 sc->bmaddr = rman_get_start(sc->bmio);
393 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
394 SYS_RES_IOPORT, rid, sc->bmio);
395 sc->bmio = NULL;
396 }
397
398 /*
399 * the Cypress chip is a mess, it contains two ATA functions, but
400 * both channels are visible on the first one.
401 * simply ignore the second function for now, as the right
402 * solution (ignoring the second channel on the first function)
403 * doesn't work with the crappy ATA interrupt setup on the alpha.
404 */
405 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1)
406 return 0;
407
408 ata_pci_add_child(dev, 0);
409
410 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
411 ata_pci_add_child(dev, 1);
412
413 return bus_generic_attach(dev);
414}
415
416static int
417ata_pci_intr(struct ata_softc *scp)
418{
419 u_int8_t dmastat;
420
421 /*
422 * since we might share the IRQ with another device, and in some
423 * cases with our twin channel, we only want to process interrupts
424 * that we know this channel generated.
425 */
426 switch (scp->chiptype) {
427 case 0x00041103: /* HighPoint HPT366/368/370/372 */
428 if (((dmastat = ata_dmastatus(scp)) &
429 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT)
430 return 1;
431 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
432 DELAY(1);
433 return 0;
434
435 case 0x06481095: /* CMD 648 */
436 case 0x06491095: /* CMD 649 */
437 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) &
438 (scp->channel ? 0x08 : 0x04)))
439 return 1;
440 break;
441
442 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */
443 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
444 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
445 case 0x0d30105a: /* Promise OEM ATA100 */
446 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) &
447 (scp->channel ? 0x00004000 : 0x00000400)))
448 return 1;
449 break;
450
451 case 0x4d68105a: /* Promise TX2 ATA100 */
452 case 0x6268105a: /* Promise TX2v2 ATA100 */
453 case 0x4d69105a: /* Promise ATA133 */
454 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b);
455 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20))
456 return 1;
457 break;
458 }
459
460 if (scp->flags & ATA_DMA_ACTIVE) {
461 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
462 return 1;
463 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
464 DELAY(1);
465 }
466 return 0;
467}
468
469static int
470ata_pci_print_child(device_t dev, device_t child)
471{
472 struct ata_softc *scp = device_get_softc(child);
473 int retval = 0;
474
475 retval += bus_print_child_header(dev, child);
476 retval += printf(": at 0x%lx", rman_get_start(scp->r_io));
477
478 if (ATA_MASTERDEV(dev))
479 retval += printf(" irq %d", 14 + scp->channel);
480
481 retval += bus_print_child_footer(dev, child);
482
483 return retval;
484}
485
486static struct resource *
487ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
488 u_long start, u_long end, u_long count, u_int flags)
489{
490 struct ata_pci_softc *sc = device_get_softc(dev);
491 struct resource *res = NULL;
492 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
493 int myrid;
494
495 if (type == SYS_RES_IOPORT) {
496 switch (*rid) {
497 case ATA_IOADDR_RID:
498 if (ATA_MASTERDEV(dev)) {
499 myrid = 0;
500 start = (channel ? ATA_SECONDARY : ATA_PRIMARY);
501 end = start + ATA_IOSIZE - 1;
502 count = ATA_IOSIZE;
503 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
504 SYS_RES_IOPORT, &myrid,
505 start, end, count, flags);
506 }
507 else {
508 myrid = 0x10 + 8 * channel;
509 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
510 SYS_RES_IOPORT, &myrid,
511 start, end, count, flags);
512 }
513 break;
514
515 case ATA_ALTADDR_RID:
516 if (ATA_MASTERDEV(dev)) {
517 myrid = 0;
518 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
519 end = start + ATA_ALTIOSIZE - 1;
520 count = ATA_ALTIOSIZE;
521 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
522 SYS_RES_IOPORT, &myrid,
523 start, end, count, flags);
524 }
525 else {
526 myrid = 0x14 + 8 * channel;
527 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
528 SYS_RES_IOPORT, &myrid,
529 start, end, count, flags);
530 if (res) {
531 start = rman_get_start(res) + 2;
532 end = rman_get_start(res) + ATA_ALTIOSIZE - 1;
533 count = ATA_ALTIOSIZE;
534 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
535 SYS_RES_IOPORT, myrid, res);
536 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
537 SYS_RES_IOPORT, &myrid,
538 start, end, count, flags);
539 }
540 }
541 break;
542
543 case ATA_BMADDR_RID:
544 if (sc->bmaddr) {
545 myrid = 0x20;
546 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE);
547 end = start + ATA_BMIOSIZE - 1;
548 count = ATA_BMIOSIZE;
549 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
550 SYS_RES_IOPORT, &myrid,
551 start, end, count, flags);
552 }
553 }
554 return res;
555 }
556
557 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
558 if (ATA_MASTERDEV(dev)) {
559#ifdef __alpha__
560 return alpha_platform_alloc_ide_intr(channel);
561#else
562 int irq = (channel == 0 ? 14 : 15);
563
564 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
565 SYS_RES_IRQ, rid, irq, irq, 1, flags);
566#endif
567 }
568 else {
569 /* primary and secondary channels share interrupt, keep track */
570 if (!sc->irq)
571 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
572 SYS_RES_IRQ, rid, 0, ~0, 1, flags);
573 sc->irqcnt++;
574 return sc->irq;
575 }
576 }
577 return 0;
578}
579
580static int
581ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
582 struct resource *r)
583{
584 struct ata_pci_softc *sc = device_get_softc(dev);
585 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
586
587 if (type == SYS_RES_IOPORT) {
588 switch (rid) {
589 case ATA_IOADDR_RID:
590 if (ATA_MASTERDEV(dev))
591 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
592 SYS_RES_IOPORT, 0x0, r);
593 else
594 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
595 SYS_RES_IOPORT, 0x10+8*channel, r);
596 break;
597
598 case ATA_ALTADDR_RID:
599 if (ATA_MASTERDEV(dev))
600 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
601 SYS_RES_IOPORT, 0x0, r);
602 else
603 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
604 SYS_RES_IOPORT, 0x14+8*channel, r);
605 break;
606
607 case ATA_BMADDR_RID:
608 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
609 SYS_RES_IOPORT, 0x20, r);
610 default:
611 return ENOENT;
612 }
613 }
614 if (type == SYS_RES_IRQ) {
615 if (rid != ATA_IRQ_RID)
616 return ENOENT;
617
618 if (ATA_MASTERDEV(dev)) {
619#ifdef __alpha__
620 return alpha_platform_release_ide_intr(channel, r);
621#else
622 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
623 SYS_RES_IRQ, rid, r);
624#endif
625 }
626 else {
627 /* primary and secondary channels share interrupt, keep track */
628 if (--sc->irqcnt)
629 return 0;
630 sc->irq = 0;
631 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
632 SYS_RES_IRQ, rid, r);
633 }
634 }
635 return EINVAL;
636}
637
638static int
639ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
640 int flags, driver_intr_t *intr, void *arg,
641 void **cookiep)
642{
643 if (ATA_MASTERDEV(dev)) {
644#ifdef __alpha__
645 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep);
646#else
647 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
648 flags, intr, arg, cookiep);
649#endif
650 }
651 else
652 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq,
653 flags, intr, arg, cookiep);
654}
655
656static int
657ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
658 void *cookie)
659{
660 if (ATA_MASTERDEV(dev)) {
661#ifdef __alpha__
662 return alpha_platform_teardown_ide_intr(child, irq, cookie);
663#else
664 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
665#endif
666 }
667 else
668 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie);
669}
670
671static device_method_t ata_pci_methods[] = {
672 /* device interface */
673 DEVMETHOD(device_probe, ata_pci_probe),
674 DEVMETHOD(device_attach, ata_pci_attach),
675 DEVMETHOD(device_shutdown, bus_generic_shutdown),
676 DEVMETHOD(device_suspend, bus_generic_suspend),
677 DEVMETHOD(device_resume, bus_generic_resume),
678
679 /* bus methods */
680 DEVMETHOD(bus_print_child, ata_pci_print_child),
681 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
682 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
683 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
684 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
685 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
686 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
687 { 0, 0 }
688};
689
690static driver_t ata_pci_driver = {
691 "atapci",
692 ata_pci_methods,
693 sizeof(struct ata_pci_softc),
694};
695
696static devclass_t ata_pci_devclass;
697
698DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
699
700static int
701ata_pcisub_probe(device_t dev)
702{
703 struct ata_softc *scp = device_get_softc(dev);
704 device_t *children;
705 int count, i;
706
707 /* find channel number on this controller */
708 device_get_children(device_get_parent(dev), &children, &count);
709 for (i = 0; i < count; i++) {
710 if (children[i] == dev)
711 scp->channel = i;
712 }
713 free(children, M_TEMP);
714 scp->chiptype = pci_get_devid(device_get_parent(dev));
715 scp->intr_func = ata_pci_intr;
716 return ata_probe(dev);
717}
718
719static device_method_t ata_pcisub_methods[] = {
720 /* device interface */
721 DEVMETHOD(device_probe, ata_pcisub_probe),
722 DEVMETHOD(device_attach, ata_attach),
723 DEVMETHOD(device_detach, ata_detach),
724 DEVMETHOD(device_resume, ata_resume),
725 { 0, 0 }
726};
727
728static driver_t ata_pcisub_driver = {
729 "ata",
730 ata_pcisub_methods,
731 sizeof(struct ata_softc),
732};
733
734DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
149 case 0x522910b9:
150 if (pci_get_revid(dev) < 0x20)
151 return "AcerLabs Aladdin ATA controller";
152 else
153 return "AcerLabs Aladdin ATA33 controller";
154
155 case 0x05711106:
156 if (ata_find_dev(dev, 0x05861106, 0x02))
157 return "VIA 82C586 ATA33 controller";
158 if (ata_find_dev(dev, 0x05861106, 0))
159 return "VIA 82C586 ATA controller";
160 if (ata_find_dev(dev, 0x05961106, 0x12))
161 return "VIA 82C596 ATA66 controller";
162 if (ata_find_dev(dev, 0x05961106, 0))
163 return "VIA 82C596 ATA33 controller";
164 if (ata_find_dev(dev, 0x06861106, 0x40) ||
165 ata_find_dev(dev, 0x30741106, 0))
166 return "VIA 82C686 ATA100 controller";
167 if (ata_find_dev(dev, 0x06861106, 0))
168 return "VIA 82C686 ATA66 controller";
169 return "VIA Apollo ATA controller";
170
171 case 0x55131039:
172 return "SiS 5591 ATA33 controller";
173
174 case 0x06491095:
175 return "CMD 649 ATA100 controller";
176
177 case 0x06481095:
178 return "CMD 648 ATA66 controller";
179
180 case 0x06461095:
181 return "CMD 646 ATA controller";
182
183 case 0xc6931080:
184 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE)
185 return "Cypress 82C693 ATA controller";
186 break;
187
188 case 0x01021078:
189 return "Cyrix 5530 ATA33 controller";
190
191 case 0x74091022:
192 return "AMD 756 ATA66 controller";
193
194 case 0x74111022:
195 return "AMD 766 ATA100 controller";
196
197 case 0x02111166:
198 return "ServerWorks ROSB4 ATA33 controller";
199
200 case 0x4d33105a:
201 return "Promise ATA33 controller";
202
203 case 0x4d38105a:
204 return "Promise ATA66 controller";
205
206 case 0x0d30105a:
207 case 0x4d30105a:
208 return "Promise ATA100 controller";
209
210 case 0x4d68105a:
211 case 0x6268105a:
212 return "Promise TX2 ATA100 controller";
213
214 case 0x4d69105a:
215 return "Promise ATA133 controller";
216
217 case 0x00041103:
218 switch (pci_get_revid(dev)) {
219 case 0x00:
220 case 0x01:
221 return "HighPoint HPT366 ATA66 controller";
222 case 0x02:
223 return "HighPoint HPT368 ATA66 controller";
224 case 0x03:
225 case 0x04:
226 return "HighPoint HPT370 ATA100 controller";
227 case 0x05:
228 return "HighPoint HPT372 ATA133 controller";
229 default:
230 return "Unknown revision HighPoint ATA controller";
231 }
232
233 /* unsupported but known chipsets, generic DMA only */
234 case 0x10001042:
235 case 0x10011042:
236 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible";
237
238 case 0x06401095:
239 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible";
240
241 /* unknown chipsets, try generic DMA if it seems possible */
242 default:
243 if (pci_get_class(dev) == PCIC_STORAGE &&
244 (pci_get_subclass(dev) == PCIS_STORAGE_IDE))
245 return "Generic PCI ATA controller";
246 }
247 return NULL;
248}
249
250static int
251ata_pci_probe(device_t dev)
252{
253 const char *desc = ata_pci_match(dev);
254
255 if (desc) {
256 device_set_desc(dev, desc);
257 return 0;
258 }
259 else
260 return ENXIO;
261}
262
263static int
264ata_pci_add_child(device_t dev, int unit)
265{
266 device_t child;
267
268 /* check if this is located at one of the std addresses */
269 if (ATA_MASTERDEV(dev)) {
270 if (!(child = device_add_child(dev, "ata", unit)))
271 return ENOMEM;
272 }
273 else {
274 if (!(child = device_add_child(dev, "ata", 2)))
275 return ENOMEM;
276 }
277 return 0;
278}
279
280static int
281ata_pci_attach(device_t dev)
282{
283 struct ata_pci_softc *sc = device_get_softc(dev);
284 u_int8_t class, subclass;
285 u_int32_t type, cmd;
286 int rid;
287
288 /* set up vendor-specific stuff */
289 type = pci_get_devid(dev);
290 class = pci_get_class(dev);
291 subclass = pci_get_subclass(dev);
292 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
293
294 if (!(cmd & PCIM_CMD_PORTEN)) {
295 device_printf(dev, "ATA channel disabled by BIOS\n");
296 return 0;
297 }
298
299 /* is busmastering supported ? */
300 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) ==
301 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) {
302
303 /* is there a valid port range to connect to ? */
304 rid = 0x20;
305 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
306 0, ~0, 1, RF_ACTIVE);
307 if (!sc->bmio)
308 device_printf(dev, "Busmastering DMA not configured\n");
309 }
310 else
311 device_printf(dev, "Busmastering DMA not supported\n");
312
313 /* do extra chipset specific setups */
314 switch (type) {
315 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
316 pci_write_config(dev, 0x53,
317 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
318 break;
319
320 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */
321 case 0x4d30105a:
322 case 0x0d30105a:
323 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a);
324 /* FALLTHROUGH */
325
326 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */
327 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01);
328 break;
329
330 case 0x00041103: /* HighPoint */
331 switch (pci_get_revid(dev)) {
332 case 0x00: /* HPT 366 */
333 case 0x01:
334 /* turn off interrupt prediction */
335 pci_write_config(dev, 0x51,
336 (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
337 break;
338
339 case 0x02: /* HPT 368 */
340 case 0x03: /* HPT 370 */
341 case 0x04:
342 case 0x05: /* HPT 372 */
343 /* turn off interrupt prediction */
344 pci_write_config(dev, 0x51,
345 (pci_read_config(dev, 0x51, 1) & ~0x02), 1);
346 pci_write_config(dev, 0x55,
347 (pci_read_config(dev, 0x55, 1) & ~0x02), 1);
348 /* turn on interrupts */
349 pci_write_config(dev, 0x5a,
350 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
351
352 }
353 break;
354
355 case 0x05711106: /* VIA 82C586, '596, '686 default setup */
356 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */
357 if ((ata_find_dev(dev, 0x06861106, 0) &&
358 !ata_find_dev(dev, 0x06861106, 0x40)) ||
359 ata_find_dev(dev, 0x05961106, 0x12))
360 pci_write_config(dev, 0x50, 0x030b030b, 4);
361
362 /* the '686b might need the data corruption fix */
363 if (ata_find_dev(dev, 0x06861106, 0x40))
364 ata_via686b(dev);
365
366 /* FALLTHROUGH */
367
368 case 0x74091022: /* AMD 756 default setup */
369 case 0x74111022: /* AMD 766 default setup */
370
371 /* set prefetch, postwrite */
372 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
373
374 /* set fifo configuration half'n'half */
375 pci_write_config(dev, 0x43,
376 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1);
377
378 /* set status register read retry */
379 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1);
380
381 /* set DMA read & end-of-sector fifo flush */
382 pci_write_config(dev, 0x46,
383 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
384
385 /* set sector size */
386 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
387 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
388 break;
389
390 case 0x10001042: /* RZ 100? known bad, no DMA */
391 case 0x10011042:
392 case 0x06401095: /* CMD 640 known bad, no DMA */
393 sc->bmio = NULL;
394 device_printf(dev, "Busmastering DMA disabled\n");
395 }
396
397 if (sc->bmio) {
398 sc->bmaddr = rman_get_start(sc->bmio);
399 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
400 SYS_RES_IOPORT, rid, sc->bmio);
401 sc->bmio = NULL;
402 }
403
404 /*
405 * the Cypress chip is a mess, it contains two ATA functions, but
406 * both channels are visible on the first one.
407 * simply ignore the second function for now, as the right
408 * solution (ignoring the second channel on the first function)
409 * doesn't work with the crappy ATA interrupt setup on the alpha.
410 */
411 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1)
412 return 0;
413
414 ata_pci_add_child(dev, 0);
415
416 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
417 ata_pci_add_child(dev, 1);
418
419 return bus_generic_attach(dev);
420}
421
422static int
423ata_pci_intr(struct ata_softc *scp)
424{
425 u_int8_t dmastat;
426
427 /*
428 * since we might share the IRQ with another device, and in some
429 * cases with our twin channel, we only want to process interrupts
430 * that we know this channel generated.
431 */
432 switch (scp->chiptype) {
433 case 0x00041103: /* HighPoint HPT366/368/370/372 */
434 if (((dmastat = ata_dmastatus(scp)) &
435 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT)
436 return 1;
437 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
438 DELAY(1);
439 return 0;
440
441 case 0x06481095: /* CMD 648 */
442 case 0x06491095: /* CMD 649 */
443 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) &
444 (scp->channel ? 0x08 : 0x04)))
445 return 1;
446 break;
447
448 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */
449 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
450 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
451 case 0x0d30105a: /* Promise OEM ATA100 */
452 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) &
453 (scp->channel ? 0x00004000 : 0x00000400)))
454 return 1;
455 break;
456
457 case 0x4d68105a: /* Promise TX2 ATA100 */
458 case 0x6268105a: /* Promise TX2v2 ATA100 */
459 case 0x4d69105a: /* Promise ATA133 */
460 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b);
461 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20))
462 return 1;
463 break;
464 }
465
466 if (scp->flags & ATA_DMA_ACTIVE) {
467 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
468 return 1;
469 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
470 DELAY(1);
471 }
472 return 0;
473}
474
475static int
476ata_pci_print_child(device_t dev, device_t child)
477{
478 struct ata_softc *scp = device_get_softc(child);
479 int retval = 0;
480
481 retval += bus_print_child_header(dev, child);
482 retval += printf(": at 0x%lx", rman_get_start(scp->r_io));
483
484 if (ATA_MASTERDEV(dev))
485 retval += printf(" irq %d", 14 + scp->channel);
486
487 retval += bus_print_child_footer(dev, child);
488
489 return retval;
490}
491
492static struct resource *
493ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
494 u_long start, u_long end, u_long count, u_int flags)
495{
496 struct ata_pci_softc *sc = device_get_softc(dev);
497 struct resource *res = NULL;
498 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
499 int myrid;
500
501 if (type == SYS_RES_IOPORT) {
502 switch (*rid) {
503 case ATA_IOADDR_RID:
504 if (ATA_MASTERDEV(dev)) {
505 myrid = 0;
506 start = (channel ? ATA_SECONDARY : ATA_PRIMARY);
507 end = start + ATA_IOSIZE - 1;
508 count = ATA_IOSIZE;
509 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
510 SYS_RES_IOPORT, &myrid,
511 start, end, count, flags);
512 }
513 else {
514 myrid = 0x10 + 8 * channel;
515 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
516 SYS_RES_IOPORT, &myrid,
517 start, end, count, flags);
518 }
519 break;
520
521 case ATA_ALTADDR_RID:
522 if (ATA_MASTERDEV(dev)) {
523 myrid = 0;
524 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
525 end = start + ATA_ALTIOSIZE - 1;
526 count = ATA_ALTIOSIZE;
527 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
528 SYS_RES_IOPORT, &myrid,
529 start, end, count, flags);
530 }
531 else {
532 myrid = 0x14 + 8 * channel;
533 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
534 SYS_RES_IOPORT, &myrid,
535 start, end, count, flags);
536 if (res) {
537 start = rman_get_start(res) + 2;
538 end = rman_get_start(res) + ATA_ALTIOSIZE - 1;
539 count = ATA_ALTIOSIZE;
540 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
541 SYS_RES_IOPORT, myrid, res);
542 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
543 SYS_RES_IOPORT, &myrid,
544 start, end, count, flags);
545 }
546 }
547 break;
548
549 case ATA_BMADDR_RID:
550 if (sc->bmaddr) {
551 myrid = 0x20;
552 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE);
553 end = start + ATA_BMIOSIZE - 1;
554 count = ATA_BMIOSIZE;
555 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
556 SYS_RES_IOPORT, &myrid,
557 start, end, count, flags);
558 }
559 }
560 return res;
561 }
562
563 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
564 if (ATA_MASTERDEV(dev)) {
565#ifdef __alpha__
566 return alpha_platform_alloc_ide_intr(channel);
567#else
568 int irq = (channel == 0 ? 14 : 15);
569
570 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
571 SYS_RES_IRQ, rid, irq, irq, 1, flags);
572#endif
573 }
574 else {
575 /* primary and secondary channels share interrupt, keep track */
576 if (!sc->irq)
577 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
578 SYS_RES_IRQ, rid, 0, ~0, 1, flags);
579 sc->irqcnt++;
580 return sc->irq;
581 }
582 }
583 return 0;
584}
585
586static int
587ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
588 struct resource *r)
589{
590 struct ata_pci_softc *sc = device_get_softc(dev);
591 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
592
593 if (type == SYS_RES_IOPORT) {
594 switch (rid) {
595 case ATA_IOADDR_RID:
596 if (ATA_MASTERDEV(dev))
597 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
598 SYS_RES_IOPORT, 0x0, r);
599 else
600 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
601 SYS_RES_IOPORT, 0x10+8*channel, r);
602 break;
603
604 case ATA_ALTADDR_RID:
605 if (ATA_MASTERDEV(dev))
606 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
607 SYS_RES_IOPORT, 0x0, r);
608 else
609 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
610 SYS_RES_IOPORT, 0x14+8*channel, r);
611 break;
612
613 case ATA_BMADDR_RID:
614 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
615 SYS_RES_IOPORT, 0x20, r);
616 default:
617 return ENOENT;
618 }
619 }
620 if (type == SYS_RES_IRQ) {
621 if (rid != ATA_IRQ_RID)
622 return ENOENT;
623
624 if (ATA_MASTERDEV(dev)) {
625#ifdef __alpha__
626 return alpha_platform_release_ide_intr(channel, r);
627#else
628 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
629 SYS_RES_IRQ, rid, r);
630#endif
631 }
632 else {
633 /* primary and secondary channels share interrupt, keep track */
634 if (--sc->irqcnt)
635 return 0;
636 sc->irq = 0;
637 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
638 SYS_RES_IRQ, rid, r);
639 }
640 }
641 return EINVAL;
642}
643
644static int
645ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
646 int flags, driver_intr_t *intr, void *arg,
647 void **cookiep)
648{
649 if (ATA_MASTERDEV(dev)) {
650#ifdef __alpha__
651 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep);
652#else
653 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
654 flags, intr, arg, cookiep);
655#endif
656 }
657 else
658 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq,
659 flags, intr, arg, cookiep);
660}
661
662static int
663ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
664 void *cookie)
665{
666 if (ATA_MASTERDEV(dev)) {
667#ifdef __alpha__
668 return alpha_platform_teardown_ide_intr(child, irq, cookie);
669#else
670 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
671#endif
672 }
673 else
674 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie);
675}
676
677static device_method_t ata_pci_methods[] = {
678 /* device interface */
679 DEVMETHOD(device_probe, ata_pci_probe),
680 DEVMETHOD(device_attach, ata_pci_attach),
681 DEVMETHOD(device_shutdown, bus_generic_shutdown),
682 DEVMETHOD(device_suspend, bus_generic_suspend),
683 DEVMETHOD(device_resume, bus_generic_resume),
684
685 /* bus methods */
686 DEVMETHOD(bus_print_child, ata_pci_print_child),
687 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
688 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
689 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
690 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
691 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
692 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
693 { 0, 0 }
694};
695
696static driver_t ata_pci_driver = {
697 "atapci",
698 ata_pci_methods,
699 sizeof(struct ata_pci_softc),
700};
701
702static devclass_t ata_pci_devclass;
703
704DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
705
706static int
707ata_pcisub_probe(device_t dev)
708{
709 struct ata_softc *scp = device_get_softc(dev);
710 device_t *children;
711 int count, i;
712
713 /* find channel number on this controller */
714 device_get_children(device_get_parent(dev), &children, &count);
715 for (i = 0; i < count; i++) {
716 if (children[i] == dev)
717 scp->channel = i;
718 }
719 free(children, M_TEMP);
720 scp->chiptype = pci_get_devid(device_get_parent(dev));
721 scp->intr_func = ata_pci_intr;
722 return ata_probe(dev);
723}
724
725static device_method_t ata_pcisub_methods[] = {
726 /* device interface */
727 DEVMETHOD(device_probe, ata_pcisub_probe),
728 DEVMETHOD(device_attach, ata_attach),
729 DEVMETHOD(device_detach, ata_detach),
730 DEVMETHOD(device_resume, ata_resume),
731 { 0, 0 }
732};
733
734static driver_t ata_pcisub_driver = {
735 "ata",
736 ata_pcisub_methods,
737 sizeof(struct ata_softc),
738};
739
740DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);