29 */ 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/disk.h> 35#include <sys/module.h> 36#include <sys/bus.h> 37#include <sys/bio.h> 38#include <sys/malloc.h> 39#include <sys/devicestat.h> 40#include <sys/sysctl.h> 41#include <machine/stdarg.h> 42#include <machine/resource.h> 43#include <machine/bus.h> 44#ifdef __alpha__ 45#include <machine/md_var.h> 46#endif 47#include <sys/rman.h> 48#include <pci/pcivar.h> 49#include <pci/pcireg.h> 50#include <dev/ata/ata-all.h> 51 52/* device structures */ 53struct ata_pci_softc { 54 struct resource *bmio; 55 int bmaddr; 56 struct resource *irq; 57 int irqcnt; 58}; 59 60/* prototypes */ 61void ata_via686b(device_t); 62 63/* misc defines */ 64#define IOMASK 0xfffffffc 65#define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 66 (pci_get_progif(dev) & 0x05) != 0x05) 67 68int 69ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid) 70{ 71 device_t *children, child; 72 int nchildren, i; 73 74 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 75 return 0; 76 77 for (i = 0; i < nchildren; i++) { 78 child = children[i]; 79 80 /* check that it's on the same silicon and the device we want */ 81 if (pci_get_slot(dev) == pci_get_slot(child) && 82 pci_get_devid(child) == devid && pci_get_revid(child) >= revid) { 83 free(children, M_TEMP); 84 return 1; 85 } 86 } 87 free(children, M_TEMP); 88 return 0; 89} 90 91void 92ata_via686b(device_t dev) 93{ 94 device_t *children, child; 95 int nchildren, i; 96 97 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 98 return; 99 100 for (i = 0; i < nchildren; i++) { 101 child = children[i]; 102 103 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */ 104 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */ 105 pci_write_config(child, 0x75, 0x83, 1); 106 pci_write_config(child, 0x76, 107 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1); 108 device_printf(dev, "VIA '686b southbridge fix applied\n"); 109 break; 110 } 111 } 112 free(children, M_TEMP); 113} 114 115static const char * 116ata_pci_match(device_t dev) 117{ 118 if (pci_get_class(dev) != PCIC_STORAGE) 119 return NULL; 120 121 switch (pci_get_devid(dev)) { 122 /* supported chipsets */ 123 case 0x12308086: 124 return "Intel PIIX ATA controller"; 125 126 case 0x70108086: 127 return "Intel PIIX3 ATA controller"; 128 129 case 0x71118086: 130 case 0x71998086: 131 return "Intel PIIX4 ATA33 controller"; 132 133 case 0x24218086: 134 return "Intel ICH0 ATA33 controller"; 135 136 case 0x24118086: 137 return "Intel ICH ATA66 controller"; 138 139 case 0x244a8086: 140 case 0x244b8086: 141 return "Intel ICH2 ATA100 controller"; 142 143 case 0x522910b9: 144 if (pci_get_revid(dev) < 0x20) 145 return "AcerLabs Aladdin ATA controller"; 146 else 147 return "AcerLabs Aladdin ATA33 controller"; 148 149 case 0x05711106: 150 if (ata_find_dev(dev, 0x05861106, 0x02)) 151 return "VIA 82C586 ATA33 controller"; 152 if (ata_find_dev(dev, 0x05861106, 0)) 153 return "VIA 82C586 ATA controller"; 154 if (ata_find_dev(dev, 0x05961106, 0x12)) 155 return "VIA 82C596 ATA66 controller"; 156 if (ata_find_dev(dev, 0x05961106, 0)) 157 return "VIA 82C596 ATA33 controller"; 158 if (ata_find_dev(dev, 0x06861106, 0x40) || 159 ata_find_dev(dev, 0x30741106, 0)) 160 return "VIA 82C686 ATA100 controller"; 161 if (ata_find_dev(dev, 0x06861106, 0)) 162 return "VIA 82C686 ATA66 controller"; 163 return "VIA Apollo ATA controller"; 164 165 case 0x55131039: 166 return "SiS 5591 ATA33 controller"; 167 168 case 0x06491095: 169 return "CMD 649 ATA100 controller"; 170 171 case 0x06481095: 172 return "CMD 648 ATA66 controller"; 173 174 case 0x06461095: 175 return "CMD 646 ATA controller"; 176 177 case 0xc6931080: 178 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 179 return "Cypress 82C693 ATA controller"; 180 break; 181 182 case 0x01021078: 183 return "Cyrix 5530 ATA33 controller"; 184 185 case 0x74091022: 186 return "AMD 756 ATA66 controller"; 187 188 case 0x74111022: 189 return "AMD 766 ATA100 controller"; 190 191 case 0x02111166: 192 return "ServerWorks ROSB4 ATA33 controller"; 193 194 case 0x4d33105a: 195 return "Promise ATA33 controller"; 196 197 case 0x4d38105a: 198 return "Promise ATA66 controller"; 199 200 case 0x0d30105a: 201 case 0x4d30105a: 202 return "Promise ATA100 controller"; 203 204 case 0x4d68105a: 205 case 0x6268105a: 206 return "Promise TX2 ATA100 controller"; 207
| 29 */ 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/disk.h> 35#include <sys/module.h> 36#include <sys/bus.h> 37#include <sys/bio.h> 38#include <sys/malloc.h> 39#include <sys/devicestat.h> 40#include <sys/sysctl.h> 41#include <machine/stdarg.h> 42#include <machine/resource.h> 43#include <machine/bus.h> 44#ifdef __alpha__ 45#include <machine/md_var.h> 46#endif 47#include <sys/rman.h> 48#include <pci/pcivar.h> 49#include <pci/pcireg.h> 50#include <dev/ata/ata-all.h> 51 52/* device structures */ 53struct ata_pci_softc { 54 struct resource *bmio; 55 int bmaddr; 56 struct resource *irq; 57 int irqcnt; 58}; 59 60/* prototypes */ 61void ata_via686b(device_t); 62 63/* misc defines */ 64#define IOMASK 0xfffffffc 65#define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \ 66 (pci_get_progif(dev) & 0x05) != 0x05) 67 68int 69ata_find_dev(device_t dev, u_int32_t devid, u_int32_t revid) 70{ 71 device_t *children, child; 72 int nchildren, i; 73 74 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 75 return 0; 76 77 for (i = 0; i < nchildren; i++) { 78 child = children[i]; 79 80 /* check that it's on the same silicon and the device we want */ 81 if (pci_get_slot(dev) == pci_get_slot(child) && 82 pci_get_devid(child) == devid && pci_get_revid(child) >= revid) { 83 free(children, M_TEMP); 84 return 1; 85 } 86 } 87 free(children, M_TEMP); 88 return 0; 89} 90 91void 92ata_via686b(device_t dev) 93{ 94 device_t *children, child; 95 int nchildren, i; 96 97 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 98 return; 99 100 for (i = 0; i < nchildren; i++) { 101 child = children[i]; 102 103 if (pci_get_devid(child) == 0x03051106 || /* VIA KT133 */ 104 pci_get_devid(child) == 0x03911106) { /* VIA KX133 */ 105 pci_write_config(child, 0x75, 0x83, 1); 106 pci_write_config(child, 0x76, 107 (pci_read_config(child, 0x76, 1) & 0xdf) | 0xd0,1); 108 device_printf(dev, "VIA '686b southbridge fix applied\n"); 109 break; 110 } 111 } 112 free(children, M_TEMP); 113} 114 115static const char * 116ata_pci_match(device_t dev) 117{ 118 if (pci_get_class(dev) != PCIC_STORAGE) 119 return NULL; 120 121 switch (pci_get_devid(dev)) { 122 /* supported chipsets */ 123 case 0x12308086: 124 return "Intel PIIX ATA controller"; 125 126 case 0x70108086: 127 return "Intel PIIX3 ATA controller"; 128 129 case 0x71118086: 130 case 0x71998086: 131 return "Intel PIIX4 ATA33 controller"; 132 133 case 0x24218086: 134 return "Intel ICH0 ATA33 controller"; 135 136 case 0x24118086: 137 return "Intel ICH ATA66 controller"; 138 139 case 0x244a8086: 140 case 0x244b8086: 141 return "Intel ICH2 ATA100 controller"; 142 143 case 0x522910b9: 144 if (pci_get_revid(dev) < 0x20) 145 return "AcerLabs Aladdin ATA controller"; 146 else 147 return "AcerLabs Aladdin ATA33 controller"; 148 149 case 0x05711106: 150 if (ata_find_dev(dev, 0x05861106, 0x02)) 151 return "VIA 82C586 ATA33 controller"; 152 if (ata_find_dev(dev, 0x05861106, 0)) 153 return "VIA 82C586 ATA controller"; 154 if (ata_find_dev(dev, 0x05961106, 0x12)) 155 return "VIA 82C596 ATA66 controller"; 156 if (ata_find_dev(dev, 0x05961106, 0)) 157 return "VIA 82C596 ATA33 controller"; 158 if (ata_find_dev(dev, 0x06861106, 0x40) || 159 ata_find_dev(dev, 0x30741106, 0)) 160 return "VIA 82C686 ATA100 controller"; 161 if (ata_find_dev(dev, 0x06861106, 0)) 162 return "VIA 82C686 ATA66 controller"; 163 return "VIA Apollo ATA controller"; 164 165 case 0x55131039: 166 return "SiS 5591 ATA33 controller"; 167 168 case 0x06491095: 169 return "CMD 649 ATA100 controller"; 170 171 case 0x06481095: 172 return "CMD 648 ATA66 controller"; 173 174 case 0x06461095: 175 return "CMD 646 ATA controller"; 176 177 case 0xc6931080: 178 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) 179 return "Cypress 82C693 ATA controller"; 180 break; 181 182 case 0x01021078: 183 return "Cyrix 5530 ATA33 controller"; 184 185 case 0x74091022: 186 return "AMD 756 ATA66 controller"; 187 188 case 0x74111022: 189 return "AMD 766 ATA100 controller"; 190 191 case 0x02111166: 192 return "ServerWorks ROSB4 ATA33 controller"; 193 194 case 0x4d33105a: 195 return "Promise ATA33 controller"; 196 197 case 0x4d38105a: 198 return "Promise ATA66 controller"; 199 200 case 0x0d30105a: 201 case 0x4d30105a: 202 return "Promise ATA100 controller"; 203 204 case 0x4d68105a: 205 case 0x6268105a: 206 return "Promise TX2 ATA100 controller"; 207
|
208 case 0x00041103: 209 switch (pci_get_revid(dev)) { 210 case 0x00: 211 case 0x01: 212 return "HighPoint HPT366 ATA66 controller"; 213 case 0x02: 214 return "HighPoint HPT368 ATA66 controller"; 215 case 0x03: 216 case 0x04: 217 return "HighPoint HPT370 ATA100 controller"; 218 default: 219 return "Unknown revision HighPoint ATA controller"; 220 } 221 222 /* unsupported but known chipsets, generic DMA only */ 223 case 0x10001042: 224 case 0x10011042: 225 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 226 227 case 0x06401095: 228 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 229 230 /* unknown chipsets, try generic DMA if it seems possible */ 231 default: 232 if (pci_get_class(dev) == PCIC_STORAGE && 233 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 234 return "Generic PCI ATA controller"; 235 } 236 return NULL; 237} 238 239static int 240ata_pci_probe(device_t dev) 241{ 242 const char *desc = ata_pci_match(dev); 243 244 if (desc) { 245 device_set_desc(dev, desc); 246 return 0; 247 } 248 else 249 return ENXIO; 250} 251 252static int 253ata_pci_add_child(device_t dev, int unit) 254{ 255 device_t child; 256 257 /* check if this is located at one of the std addresses */ 258 if (ATA_MASTERDEV(dev)) { 259 if (!(child = device_add_child(dev, "ata", unit))) 260 return ENOMEM; 261 } 262 else { 263 if (!(child = device_add_child(dev, "ata", 2))) 264 return ENOMEM; 265 } 266 return 0; 267} 268 269static int 270ata_pci_attach(device_t dev) 271{ 272 struct ata_pci_softc *sc = device_get_softc(dev); 273 u_int8_t class, subclass; 274 u_int32_t type, cmd; 275 int rid; 276 277 /* set up vendor-specific stuff */ 278 type = pci_get_devid(dev); 279 class = pci_get_class(dev); 280 subclass = pci_get_subclass(dev); 281 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 282 283 if (!(cmd & PCIM_CMD_PORTEN)) { 284 device_printf(dev, "ATA channel disabled by BIOS\n"); 285 return 0; 286 } 287 288 /* is busmastering supported ? */ 289 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 290 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 291 292 /* is there a valid port range to connect to ? */ 293 rid = 0x20; 294 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 295 0, ~0, 1, RF_ACTIVE); 296 if (!sc->bmio) 297 device_printf(dev, "Busmastering DMA not configured\n"); 298 } 299 else 300 device_printf(dev, "Busmastering DMA not supported\n"); 301 302 /* do extra chipset specific setups */ 303 switch (type) { 304 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 305 pci_write_config(dev, 0x53, 306 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 307 break; 308 309 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */ 310 case 0x4d30105a: 311 case 0x0d30105a: 312 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 313 /* FALLTHROUGH */ 314 315 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */ 316 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 317 break; 318 319 case 0x00041103: /* HighPoint */ 320 switch (pci_get_revid(dev)) { 321 case 0x00: 322 case 0x01: 323 /* turn off interrupt prediction */ 324 pci_write_config(dev, 0x51, 325 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 326 break; 327 328 case 0x02: 329 case 0x03: 330 case 0x04: 331 /* turn off interrupt prediction */ 332 pci_write_config(dev, 0x51, 333 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 334 pci_write_config(dev, 0x55, 335 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 336 /* turn on interrupts */ 337 pci_write_config(dev, 0x5a, 338 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 339 340 } 341 break; 342 343 case 0x05711106: /* VIA 82C586, '596, '686 default setup */ 344 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */ 345 if ((ata_find_dev(dev, 0x06861106, 0) && 346 !ata_find_dev(dev, 0x06861106, 0x40)) || 347 ata_find_dev(dev, 0x05961106, 0x12)) 348 pci_write_config(dev, 0x50, 0x030b030b, 4); 349 350 /* the '686b might need the data corruption fix */ 351 if (ata_find_dev(dev, 0x06861106, 0x40)) 352 ata_via686b(dev); 353 354 /* FALLTHROUGH */ 355 356 case 0x74091022: /* AMD 756 default setup */ 357 case 0x74111022: /* AMD 766 default setup */ 358 359 /* set prefetch, postwrite */ 360 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 361 362 /* set fifo configuration half'n'half */ 363 pci_write_config(dev, 0x43, 364 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 365 366 /* set status register read retry */ 367 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 368 369 /* set DMA read & end-of-sector fifo flush */ 370 pci_write_config(dev, 0x46, 371 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 372 373 /* set sector size */ 374 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 375 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 376 break; 377 378 case 0x10001042: /* RZ 100? known bad, no DMA */ 379 case 0x10011042: 380 case 0x06401095: /* CMD 640 known bad, no DMA */ 381 sc->bmio = NULL; 382 device_printf(dev, "Busmastering DMA disabled\n"); 383 } 384 385 if (sc->bmio) { 386 sc->bmaddr = rman_get_start(sc->bmio); 387 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 388 SYS_RES_IOPORT, rid, sc->bmio); 389 sc->bmio = NULL; 390 } 391 392 /* 393 * the Cypress chip is a mess, it contains two ATA functions, but 394 * both channels are visible on the first one. 395 * simply ignore the second function for now, as the right 396 * solution (ignoring the second channel on the first function) 397 * doesn't work with the crappy ATA interrupt setup on the alpha. 398 */ 399 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 400 return 0; 401 402 ata_pci_add_child(dev, 0); 403 404 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 405 ata_pci_add_child(dev, 1); 406 407 return bus_generic_attach(dev); 408} 409 410static int 411ata_pci_intr(struct ata_softc *scp) 412{ 413 u_int8_t dmastat; 414 415 /* 416 * since we might share the IRQ with another device, and in some 417 * cases with our twin channel, we only want to process interrupts 418 * that we know this channel generated. 419 */ 420 switch (scp->chiptype) { 421 case 0x00041103: /* HighPoint HPT366/368/370 */ 422 if (((dmastat = ata_dmastatus(scp)) & 423 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 424 return 1; 425 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 426 DELAY(1); 427 return 0; 428 429 case 0x06481095: /* CMD 648 */ 430 case 0x06491095: /* CMD 649 */ 431 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 432 (scp->channel ? 0x08 : 0x04))) 433 return 1; 434 break; 435 436 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 437 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 438 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 439 case 0x0d30105a: /* Promise OEM ATA100 */ 440 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 441 (scp->channel ? 0x00004000 : 0x00000400))) 442 return 1; 443 break; 444 445 case 0x4d68105a: /* Promise TX2 ATA100 */ 446 case 0x6268105a: /* Promise TX2v2 ATA100 */
| 211 case 0x00041103: 212 switch (pci_get_revid(dev)) { 213 case 0x00: 214 case 0x01: 215 return "HighPoint HPT366 ATA66 controller"; 216 case 0x02: 217 return "HighPoint HPT368 ATA66 controller"; 218 case 0x03: 219 case 0x04: 220 return "HighPoint HPT370 ATA100 controller"; 221 default: 222 return "Unknown revision HighPoint ATA controller"; 223 } 224 225 /* unsupported but known chipsets, generic DMA only */ 226 case 0x10001042: 227 case 0x10011042: 228 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible"; 229 230 case 0x06401095: 231 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible"; 232 233 /* unknown chipsets, try generic DMA if it seems possible */ 234 default: 235 if (pci_get_class(dev) == PCIC_STORAGE && 236 (pci_get_subclass(dev) == PCIS_STORAGE_IDE)) 237 return "Generic PCI ATA controller"; 238 } 239 return NULL; 240} 241 242static int 243ata_pci_probe(device_t dev) 244{ 245 const char *desc = ata_pci_match(dev); 246 247 if (desc) { 248 device_set_desc(dev, desc); 249 return 0; 250 } 251 else 252 return ENXIO; 253} 254 255static int 256ata_pci_add_child(device_t dev, int unit) 257{ 258 device_t child; 259 260 /* check if this is located at one of the std addresses */ 261 if (ATA_MASTERDEV(dev)) { 262 if (!(child = device_add_child(dev, "ata", unit))) 263 return ENOMEM; 264 } 265 else { 266 if (!(child = device_add_child(dev, "ata", 2))) 267 return ENOMEM; 268 } 269 return 0; 270} 271 272static int 273ata_pci_attach(device_t dev) 274{ 275 struct ata_pci_softc *sc = device_get_softc(dev); 276 u_int8_t class, subclass; 277 u_int32_t type, cmd; 278 int rid; 279 280 /* set up vendor-specific stuff */ 281 type = pci_get_devid(dev); 282 class = pci_get_class(dev); 283 subclass = pci_get_subclass(dev); 284 cmd = pci_read_config(dev, PCIR_COMMAND, 4); 285 286 if (!(cmd & PCIM_CMD_PORTEN)) { 287 device_printf(dev, "ATA channel disabled by BIOS\n"); 288 return 0; 289 } 290 291 /* is busmastering supported ? */ 292 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) == 293 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) { 294 295 /* is there a valid port range to connect to ? */ 296 rid = 0x20; 297 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 298 0, ~0, 1, RF_ACTIVE); 299 if (!sc->bmio) 300 device_printf(dev, "Busmastering DMA not configured\n"); 301 } 302 else 303 device_printf(dev, "Busmastering DMA not supported\n"); 304 305 /* do extra chipset specific setups */ 306 switch (type) { 307 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */ 308 pci_write_config(dev, 0x53, 309 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1); 310 break; 311 312 case 0x4d38105a: /* Promise 66 & 100 (before TX2) need the clock changed */ 313 case 0x4d30105a: 314 case 0x0d30105a: 315 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a); 316 /* FALLTHROUGH */ 317 318 case 0x4d33105a: /* Promise (before TX2) need burst mode turned on */ 319 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01); 320 break; 321 322 case 0x00041103: /* HighPoint */ 323 switch (pci_get_revid(dev)) { 324 case 0x00: 325 case 0x01: 326 /* turn off interrupt prediction */ 327 pci_write_config(dev, 0x51, 328 (pci_read_config(dev, 0x51, 1) & ~0x80), 1); 329 break; 330 331 case 0x02: 332 case 0x03: 333 case 0x04: 334 /* turn off interrupt prediction */ 335 pci_write_config(dev, 0x51, 336 (pci_read_config(dev, 0x51, 1) & ~0x02), 1); 337 pci_write_config(dev, 0x55, 338 (pci_read_config(dev, 0x55, 1) & ~0x02), 1); 339 /* turn on interrupts */ 340 pci_write_config(dev, 0x5a, 341 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1); 342 343 } 344 break; 345 346 case 0x05711106: /* VIA 82C586, '596, '686 default setup */ 347 /* prepare for ATA-66 on the 82C686a and rev 0x12 and newer 82C596's */ 348 if ((ata_find_dev(dev, 0x06861106, 0) && 349 !ata_find_dev(dev, 0x06861106, 0x40)) || 350 ata_find_dev(dev, 0x05961106, 0x12)) 351 pci_write_config(dev, 0x50, 0x030b030b, 4); 352 353 /* the '686b might need the data corruption fix */ 354 if (ata_find_dev(dev, 0x06861106, 0x40)) 355 ata_via686b(dev); 356 357 /* FALLTHROUGH */ 358 359 case 0x74091022: /* AMD 756 default setup */ 360 case 0x74111022: /* AMD 766 default setup */ 361 362 /* set prefetch, postwrite */ 363 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1); 364 365 /* set fifo configuration half'n'half */ 366 pci_write_config(dev, 0x43, 367 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 368 369 /* set status register read retry */ 370 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 371 372 /* set DMA read & end-of-sector fifo flush */ 373 pci_write_config(dev, 0x46, 374 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 375 376 /* set sector size */ 377 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 378 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 379 break; 380 381 case 0x10001042: /* RZ 100? known bad, no DMA */ 382 case 0x10011042: 383 case 0x06401095: /* CMD 640 known bad, no DMA */ 384 sc->bmio = NULL; 385 device_printf(dev, "Busmastering DMA disabled\n"); 386 } 387 388 if (sc->bmio) { 389 sc->bmaddr = rman_get_start(sc->bmio); 390 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 391 SYS_RES_IOPORT, rid, sc->bmio); 392 sc->bmio = NULL; 393 } 394 395 /* 396 * the Cypress chip is a mess, it contains two ATA functions, but 397 * both channels are visible on the first one. 398 * simply ignore the second function for now, as the right 399 * solution (ignoring the second channel on the first function) 400 * doesn't work with the crappy ATA interrupt setup on the alpha. 401 */ 402 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1) 403 return 0; 404 405 ata_pci_add_child(dev, 0); 406 407 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK) 408 ata_pci_add_child(dev, 1); 409 410 return bus_generic_attach(dev); 411} 412 413static int 414ata_pci_intr(struct ata_softc *scp) 415{ 416 u_int8_t dmastat; 417 418 /* 419 * since we might share the IRQ with another device, and in some 420 * cases with our twin channel, we only want to process interrupts 421 * that we know this channel generated. 422 */ 423 switch (scp->chiptype) { 424 case 0x00041103: /* HighPoint HPT366/368/370 */ 425 if (((dmastat = ata_dmastatus(scp)) & 426 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT) 427 return 1; 428 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 429 DELAY(1); 430 return 0; 431 432 case 0x06481095: /* CMD 648 */ 433 case 0x06491095: /* CMD 649 */ 434 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) & 435 (scp->channel ? 0x08 : 0x04))) 436 return 1; 437 break; 438 439 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ 440 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */ 441 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */ 442 case 0x0d30105a: /* Promise OEM ATA100 */ 443 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) & 444 (scp->channel ? 0x00004000 : 0x00000400))) 445 return 1; 446 break; 447 448 case 0x4d68105a: /* Promise TX2 ATA100 */ 449 case 0x6268105a: /* Promise TX2v2 ATA100 */
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447 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); 448 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20)) 449 return 1; 450 break; 451 } 452 453 if (scp->flags & ATA_DMA_ACTIVE) { 454 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 455 return 1; 456 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 457 DELAY(1); 458 } 459 return 0; 460} 461 462static int 463ata_pci_print_child(device_t dev, device_t child) 464{ 465 struct ata_softc *scp = device_get_softc(child); 466 int retval = 0; 467 468 retval += bus_print_child_header(dev, child); 469 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 470 471 if (ATA_MASTERDEV(dev)) 472 retval += printf(" irq %d", 14 + scp->channel); 473 474 retval += bus_print_child_footer(dev, child); 475 476 return retval; 477} 478 479static struct resource * 480ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 481 u_long start, u_long end, u_long count, u_int flags) 482{ 483 struct ata_pci_softc *sc = device_get_softc(dev); 484 struct resource *res = NULL; 485 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 486 int myrid; 487 488 if (type == SYS_RES_IOPORT) { 489 switch (*rid) { 490 case ATA_IOADDR_RID: 491 if (ATA_MASTERDEV(dev)) { 492 myrid = 0; 493 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 494 end = start + ATA_IOSIZE - 1; 495 count = ATA_IOSIZE; 496 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 497 SYS_RES_IOPORT, &myrid, 498 start, end, count, flags); 499 } 500 else { 501 myrid = 0x10 + 8 * channel; 502 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 503 SYS_RES_IOPORT, &myrid, 504 start, end, count, flags); 505 } 506 break; 507 508 case ATA_ALTADDR_RID: 509 if (ATA_MASTERDEV(dev)) { 510 myrid = 0; 511 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 512 end = start + ATA_ALTIOSIZE - 1; 513 count = ATA_ALTIOSIZE; 514 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 515 SYS_RES_IOPORT, &myrid, 516 start, end, count, flags); 517 } 518 else { 519 myrid = 0x14 + 8 * channel; 520 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 521 SYS_RES_IOPORT, &myrid, 522 start, end, count, flags); 523 if (res) { 524 start = rman_get_start(res) + 2; 525 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 526 count = ATA_ALTIOSIZE; 527 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 528 SYS_RES_IOPORT, myrid, res); 529 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 530 SYS_RES_IOPORT, &myrid, 531 start, end, count, flags); 532 } 533 } 534 break; 535 536 case ATA_BMADDR_RID: 537 if (sc->bmaddr) { 538 myrid = 0x20; 539 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 540 end = start + ATA_BMIOSIZE - 1; 541 count = ATA_BMIOSIZE; 542 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 543 SYS_RES_IOPORT, &myrid, 544 start, end, count, flags); 545 } 546 } 547 return res; 548 } 549 550 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 551 if (ATA_MASTERDEV(dev)) { 552#ifdef __alpha__ 553 return alpha_platform_alloc_ide_intr(channel); 554#else 555 int irq = (channel == 0 ? 14 : 15); 556 557 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 558 SYS_RES_IRQ, rid, irq, irq, 1, flags); 559#endif 560 } 561 else { 562 /* primary and secondary channels share interrupt, keep track */ 563 if (!sc->irq) 564 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 565 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 566 sc->irqcnt++; 567 return sc->irq; 568 } 569 } 570 return 0; 571} 572 573static int 574ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 575 struct resource *r) 576{ 577 struct ata_pci_softc *sc = device_get_softc(dev); 578 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 579 580 if (type == SYS_RES_IOPORT) { 581 switch (rid) { 582 case ATA_IOADDR_RID: 583 if (ATA_MASTERDEV(dev)) 584 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 585 SYS_RES_IOPORT, 0x0, r); 586 else 587 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 588 SYS_RES_IOPORT, 0x10+8*channel, r); 589 break; 590 591 case ATA_ALTADDR_RID: 592 if (ATA_MASTERDEV(dev)) 593 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 594 SYS_RES_IOPORT, 0x0, r); 595 else 596 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 597 SYS_RES_IOPORT, 0x14+8*channel, r); 598 break; 599 600 case ATA_BMADDR_RID: 601 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 602 SYS_RES_IOPORT, 0x20, r); 603 default: 604 return ENOENT; 605 } 606 } 607 if (type == SYS_RES_IRQ) { 608 if (rid != ATA_IRQ_RID) 609 return ENOENT; 610 611 if (ATA_MASTERDEV(dev)) { 612#ifdef __alpha__ 613 return alpha_platform_release_ide_intr(channel, r); 614#else 615 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 616 SYS_RES_IRQ, rid, r); 617#endif 618 } 619 else { 620 /* primary and secondary channels share interrupt, keep track */ 621 if (--sc->irqcnt) 622 return 0; 623 sc->irq = 0; 624 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 625 SYS_RES_IRQ, rid, r); 626 } 627 } 628 return EINVAL; 629} 630 631static int 632ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 633 int flags, driver_intr_t *intr, void *arg, 634 void **cookiep) 635{ 636 if (ATA_MASTERDEV(dev)) { 637#ifdef __alpha__ 638 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 639#else 640 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 641 flags, intr, arg, cookiep); 642#endif 643 } 644 else 645 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 646 flags, intr, arg, cookiep); 647} 648 649static int 650ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 651 void *cookie) 652{ 653 if (ATA_MASTERDEV(dev)) { 654#ifdef __alpha__ 655 return alpha_platform_teardown_ide_intr(child, irq, cookie); 656#else 657 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 658#endif 659 } 660 else 661 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 662} 663 664static device_method_t ata_pci_methods[] = { 665 /* device interface */ 666 DEVMETHOD(device_probe, ata_pci_probe), 667 DEVMETHOD(device_attach, ata_pci_attach), 668 DEVMETHOD(device_shutdown, bus_generic_shutdown), 669 DEVMETHOD(device_suspend, bus_generic_suspend), 670 DEVMETHOD(device_resume, bus_generic_resume), 671 672 /* bus methods */ 673 DEVMETHOD(bus_print_child, ata_pci_print_child), 674 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 675 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 676 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 677 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 678 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 679 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 680 { 0, 0 } 681}; 682 683static driver_t ata_pci_driver = { 684 "atapci", 685 ata_pci_methods, 686 sizeof(struct ata_pci_softc), 687}; 688 689static devclass_t ata_pci_devclass; 690 691DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 692 693static int 694ata_pcisub_probe(device_t dev) 695{ 696 struct ata_softc *scp = device_get_softc(dev); 697 device_t *children; 698 int count, i; 699 700 /* find channel number on this controller */ 701 device_get_children(device_get_parent(dev), &children, &count); 702 for (i = 0; i < count; i++) { 703 if (children[i] == dev) 704 scp->channel = i; 705 } 706 free(children, M_TEMP); 707 scp->chiptype = pci_get_devid(device_get_parent(dev)); 708 scp->intr_func = ata_pci_intr; 709 return ata_probe(dev); 710} 711 712static device_method_t ata_pcisub_methods[] = { 713 /* device interface */ 714 DEVMETHOD(device_probe, ata_pcisub_probe), 715 DEVMETHOD(device_attach, ata_attach), 716 DEVMETHOD(device_detach, ata_detach), 717 DEVMETHOD(device_resume, ata_resume), 718 { 0, 0 } 719}; 720 721static driver_t ata_pcisub_driver = { 722 "ata", 723 ata_pcisub_methods, 724 sizeof(struct ata_softc), 725}; 726 727DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
| 451 ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); 452 if (!(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x20)) 453 return 1; 454 break; 455 } 456 457 if (scp->flags & ATA_DMA_ACTIVE) { 458 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT)) 459 return 1; 460 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); 461 DELAY(1); 462 } 463 return 0; 464} 465 466static int 467ata_pci_print_child(device_t dev, device_t child) 468{ 469 struct ata_softc *scp = device_get_softc(child); 470 int retval = 0; 471 472 retval += bus_print_child_header(dev, child); 473 retval += printf(": at 0x%lx", rman_get_start(scp->r_io)); 474 475 if (ATA_MASTERDEV(dev)) 476 retval += printf(" irq %d", 14 + scp->channel); 477 478 retval += bus_print_child_footer(dev, child); 479 480 return retval; 481} 482 483static struct resource * 484ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 485 u_long start, u_long end, u_long count, u_int flags) 486{ 487 struct ata_pci_softc *sc = device_get_softc(dev); 488 struct resource *res = NULL; 489 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 490 int myrid; 491 492 if (type == SYS_RES_IOPORT) { 493 switch (*rid) { 494 case ATA_IOADDR_RID: 495 if (ATA_MASTERDEV(dev)) { 496 myrid = 0; 497 start = (channel ? ATA_SECONDARY : ATA_PRIMARY); 498 end = start + ATA_IOSIZE - 1; 499 count = ATA_IOSIZE; 500 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 501 SYS_RES_IOPORT, &myrid, 502 start, end, count, flags); 503 } 504 else { 505 myrid = 0x10 + 8 * channel; 506 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 507 SYS_RES_IOPORT, &myrid, 508 start, end, count, flags); 509 } 510 break; 511 512 case ATA_ALTADDR_RID: 513 if (ATA_MASTERDEV(dev)) { 514 myrid = 0; 515 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET; 516 end = start + ATA_ALTIOSIZE - 1; 517 count = ATA_ALTIOSIZE; 518 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 519 SYS_RES_IOPORT, &myrid, 520 start, end, count, flags); 521 } 522 else { 523 myrid = 0x14 + 8 * channel; 524 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 525 SYS_RES_IOPORT, &myrid, 526 start, end, count, flags); 527 if (res) { 528 start = rman_get_start(res) + 2; 529 end = rman_get_start(res) + ATA_ALTIOSIZE - 1; 530 count = ATA_ALTIOSIZE; 531 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 532 SYS_RES_IOPORT, myrid, res); 533 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 534 SYS_RES_IOPORT, &myrid, 535 start, end, count, flags); 536 } 537 } 538 break; 539 540 case ATA_BMADDR_RID: 541 if (sc->bmaddr) { 542 myrid = 0x20; 543 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE); 544 end = start + ATA_BMIOSIZE - 1; 545 count = ATA_BMIOSIZE; 546 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 547 SYS_RES_IOPORT, &myrid, 548 start, end, count, flags); 549 } 550 } 551 return res; 552 } 553 554 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 555 if (ATA_MASTERDEV(dev)) { 556#ifdef __alpha__ 557 return alpha_platform_alloc_ide_intr(channel); 558#else 559 int irq = (channel == 0 ? 14 : 15); 560 561 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 562 SYS_RES_IRQ, rid, irq, irq, 1, flags); 563#endif 564 } 565 else { 566 /* primary and secondary channels share interrupt, keep track */ 567 if (!sc->irq) 568 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 569 SYS_RES_IRQ, rid, 0, ~0, 1, flags); 570 sc->irqcnt++; 571 return sc->irq; 572 } 573 } 574 return 0; 575} 576 577static int 578ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 579 struct resource *r) 580{ 581 struct ata_pci_softc *sc = device_get_softc(dev); 582 int channel = ((struct ata_softc *)device_get_softc(child))->channel; 583 584 if (type == SYS_RES_IOPORT) { 585 switch (rid) { 586 case ATA_IOADDR_RID: 587 if (ATA_MASTERDEV(dev)) 588 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 589 SYS_RES_IOPORT, 0x0, r); 590 else 591 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 592 SYS_RES_IOPORT, 0x10+8*channel, r); 593 break; 594 595 case ATA_ALTADDR_RID: 596 if (ATA_MASTERDEV(dev)) 597 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 598 SYS_RES_IOPORT, 0x0, r); 599 else 600 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 601 SYS_RES_IOPORT, 0x14+8*channel, r); 602 break; 603 604 case ATA_BMADDR_RID: 605 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 606 SYS_RES_IOPORT, 0x20, r); 607 default: 608 return ENOENT; 609 } 610 } 611 if (type == SYS_RES_IRQ) { 612 if (rid != ATA_IRQ_RID) 613 return ENOENT; 614 615 if (ATA_MASTERDEV(dev)) { 616#ifdef __alpha__ 617 return alpha_platform_release_ide_intr(channel, r); 618#else 619 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 620 SYS_RES_IRQ, rid, r); 621#endif 622 } 623 else { 624 /* primary and secondary channels share interrupt, keep track */ 625 if (--sc->irqcnt) 626 return 0; 627 sc->irq = 0; 628 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 629 SYS_RES_IRQ, rid, r); 630 } 631 } 632 return EINVAL; 633} 634 635static int 636ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 637 int flags, driver_intr_t *intr, void *arg, 638 void **cookiep) 639{ 640 if (ATA_MASTERDEV(dev)) { 641#ifdef __alpha__ 642 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep); 643#else 644 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 645 flags, intr, arg, cookiep); 646#endif 647 } 648 else 649 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq, 650 flags, intr, arg, cookiep); 651} 652 653static int 654ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 655 void *cookie) 656{ 657 if (ATA_MASTERDEV(dev)) { 658#ifdef __alpha__ 659 return alpha_platform_teardown_ide_intr(child, irq, cookie); 660#else 661 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 662#endif 663 } 664 else 665 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie); 666} 667 668static device_method_t ata_pci_methods[] = { 669 /* device interface */ 670 DEVMETHOD(device_probe, ata_pci_probe), 671 DEVMETHOD(device_attach, ata_pci_attach), 672 DEVMETHOD(device_shutdown, bus_generic_shutdown), 673 DEVMETHOD(device_suspend, bus_generic_suspend), 674 DEVMETHOD(device_resume, bus_generic_resume), 675 676 /* bus methods */ 677 DEVMETHOD(bus_print_child, ata_pci_print_child), 678 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 679 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 680 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 681 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 682 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 683 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 684 { 0, 0 } 685}; 686 687static driver_t ata_pci_driver = { 688 "atapci", 689 ata_pci_methods, 690 sizeof(struct ata_pci_softc), 691}; 692 693static devclass_t ata_pci_devclass; 694 695DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0); 696 697static int 698ata_pcisub_probe(device_t dev) 699{ 700 struct ata_softc *scp = device_get_softc(dev); 701 device_t *children; 702 int count, i; 703 704 /* find channel number on this controller */ 705 device_get_children(device_get_parent(dev), &children, &count); 706 for (i = 0; i < count; i++) { 707 if (children[i] == dev) 708 scp->channel = i; 709 } 710 free(children, M_TEMP); 711 scp->chiptype = pci_get_devid(device_get_parent(dev)); 712 scp->intr_func = ata_pci_intr; 713 return ata_probe(dev); 714} 715 716static device_method_t ata_pcisub_methods[] = { 717 /* device interface */ 718 DEVMETHOD(device_probe, ata_pcisub_probe), 719 DEVMETHOD(device_attach, ata_attach), 720 DEVMETHOD(device_detach, ata_detach), 721 DEVMETHOD(device_resume, ata_resume), 722 { 0, 0 } 723}; 724 725static driver_t ata_pcisub_driver = { 726 "ata", 727 ata_pcisub_methods, 728 sizeof(struct ata_softc), 729}; 730 731DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
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