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ata-pci.c (74463) ata-pci.c (75553)
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 74463 2001-03-19 13:31:58Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 75553 2001-04-16 21:22:34Z sos $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/disk.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/bio.h>
38#include <sys/malloc.h>
39#include <sys/devicestat.h>
40#include <sys/sysctl.h>
41#include <machine/stdarg.h>
42#include <machine/resource.h>
43#include <machine/bus.h>
44#ifdef __alpha__
45#include <machine/md_var.h>
46#endif
47#include <sys/rman.h>
48#include <pci/pcivar.h>
49#include <pci/pcireg.h>
50#include <dev/ata/ata-all.h>
51
52/* misc defines */
53#define IOMASK 0xfffffffc
54#define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \
55 (pci_get_progif(dev) & 0x05) != 0x05)
56
57struct ata_pci_softc {
58 struct resource *bmio;
59 int bmaddr;
60 struct resource *irq;
61 int irqcnt;
62};
63
64int
65ata_find_dev(device_t dev, u_int32_t type, u_int32_t revid)
66{
67 device_t *children, child;
68 int nchildren, i;
69
70 if (device_get_children(device_get_parent(dev), &children, &nchildren))
71 return 0;
72
73 for (i = 0; i < nchildren; i++) {
74 child = children[i];
75
76 /* check that it's on the same silicon and the device we want */
77 if (pci_get_slot(dev) == pci_get_slot(child) &&
78 pci_get_vendor(child) == (type & 0xffff) &&
79 pci_get_device(child) == ((type & 0xffff0000) >> 16) &&
80 pci_get_revid(child) >= revid) {
81 free(children, M_TEMP);
82 return 1;
83 }
84 }
85 free(children, M_TEMP);
86 return 0;
87}
88
89static const char *
90ata_pci_match(device_t dev)
91{
92 if (pci_get_class(dev) != PCIC_STORAGE)
93 return NULL;
94
95 switch (pci_get_devid(dev)) {
96 /* supported chipsets */
97 case 0x12308086:
98 return "Intel PIIX ATA controller";
99
100 case 0x70108086:
101 return "Intel PIIX3 ATA controller";
102
103 case 0x71118086:
104 case 0x71998086:
105 return "Intel PIIX4 ATA33 controller";
106
107 case 0x24218086:
108 return "Intel ICH0 ATA33 controller";
109
110 case 0x24118086:
111 return "Intel ICH ATA66 controller";
112
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/disk.h>
35#include <sys/module.h>
36#include <sys/bus.h>
37#include <sys/bio.h>
38#include <sys/malloc.h>
39#include <sys/devicestat.h>
40#include <sys/sysctl.h>
41#include <machine/stdarg.h>
42#include <machine/resource.h>
43#include <machine/bus.h>
44#ifdef __alpha__
45#include <machine/md_var.h>
46#endif
47#include <sys/rman.h>
48#include <pci/pcivar.h>
49#include <pci/pcireg.h>
50#include <dev/ata/ata-all.h>
51
52/* misc defines */
53#define IOMASK 0xfffffffc
54#define ATA_MASTERDEV(dev) ((pci_get_progif(dev) & 0x80) && \
55 (pci_get_progif(dev) & 0x05) != 0x05)
56
57struct ata_pci_softc {
58 struct resource *bmio;
59 int bmaddr;
60 struct resource *irq;
61 int irqcnt;
62};
63
64int
65ata_find_dev(device_t dev, u_int32_t type, u_int32_t revid)
66{
67 device_t *children, child;
68 int nchildren, i;
69
70 if (device_get_children(device_get_parent(dev), &children, &nchildren))
71 return 0;
72
73 for (i = 0; i < nchildren; i++) {
74 child = children[i];
75
76 /* check that it's on the same silicon and the device we want */
77 if (pci_get_slot(dev) == pci_get_slot(child) &&
78 pci_get_vendor(child) == (type & 0xffff) &&
79 pci_get_device(child) == ((type & 0xffff0000) >> 16) &&
80 pci_get_revid(child) >= revid) {
81 free(children, M_TEMP);
82 return 1;
83 }
84 }
85 free(children, M_TEMP);
86 return 0;
87}
88
89static const char *
90ata_pci_match(device_t dev)
91{
92 if (pci_get_class(dev) != PCIC_STORAGE)
93 return NULL;
94
95 switch (pci_get_devid(dev)) {
96 /* supported chipsets */
97 case 0x12308086:
98 return "Intel PIIX ATA controller";
99
100 case 0x70108086:
101 return "Intel PIIX3 ATA controller";
102
103 case 0x71118086:
104 case 0x71998086:
105 return "Intel PIIX4 ATA33 controller";
106
107 case 0x24218086:
108 return "Intel ICH0 ATA33 controller";
109
110 case 0x24118086:
111 return "Intel ICH ATA66 controller";
112
113 case 0x244a8086:
113 case 0x244b8086:
114 return "Intel ICH2 ATA100 controller";
115
116 case 0x522910b9:
117 if (pci_get_revid(dev) < 0x20)
118 return "AcerLabs Aladdin ATA controller";
119 else
120 return "AcerLabs Aladdin ATA33 controller";
121
122 case 0x05711106:
123 if (ata_find_dev(dev, 0x05861106, 0x02))
124 return "VIA 82C586 ATA33 controller";
125 if (ata_find_dev(dev, 0x05861106, 0))
126 return "VIA 82C586 ATA controller";
127 if (ata_find_dev(dev, 0x05961106, 0x12))
128 return "VIA 82C596 ATA66 controller";
129 if (ata_find_dev(dev, 0x05961106, 0))
130 return "VIA 82C596 ATA33 controller";
131 if (ata_find_dev(dev, 0x06861106, 0x40))
132 return "VIA 82C686 ATA100 controller";
133 if (ata_find_dev(dev, 0x06861106, 0))
134 return "VIA 82C686 ATA66 controller";
135 return "VIA Apollo ATA controller";
136
137 case 0x55131039:
138 return "SiS 5591 ATA33 controller";
139
140 case 0x06491095:
141 return "CMD 649 ATA100 controller";
142
143 case 0x06481095:
144 return "CMD 648 ATA66 controller";
145
146 case 0x06461095:
147 return "CMD 646 ATA controller";
148
149 case 0xc6931080:
150 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE)
151 return "Cypress 82C693 ATA controller";
152 break;
153
154 case 0x01021078:
155 return "Cyrix 5530 ATA33 controller";
156
157 case 0x74091022:
158 return "AMD 756 ATA66 controller";
159
160 case 0x02111166:
161 return "ServerWorks ROSB4 ATA33 controller";
162
163 case 0x4d33105a:
164 return "Promise ATA33 controller";
165
166 case 0x4d38105a:
167 return "Promise ATA66 controller";
168
169 case 0x0d30105a:
170 case 0x4d30105a:
171 return "Promise ATA100 controller";
172
173 case 0x00041103:
174 switch (pci_get_revid(dev)) {
175 case 0x00:
176 case 0x01:
177 return "HighPoint HPT366 ATA66 controller";
178 case 0x02:
179 return "HighPoint HPT368 ATA66 controller";
180 case 0x03:
181 case 0x04:
182 return "HighPoint HPT370 ATA100 controller";
183 default:
184 return "Unknown revision HighPoint ATA controller";
185 }
186
187 /* unsupported but known chipsets, generic DMA only */
188 case 0x10001042:
189 case 0x10011042:
190 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible";
191
192 case 0x06401095:
193 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible";
194
195 /* unknown chipsets, try generic DMA if it seems possible */
196 default:
197 if (pci_get_class(dev) == PCIC_STORAGE &&
198 (pci_get_subclass(dev) == PCIS_STORAGE_IDE))
199 return "Generic PCI ATA controller";
200 }
201 return NULL;
202}
203
204static int
205ata_pci_probe(device_t dev)
206{
207 const char *desc = ata_pci_match(dev);
208
209 if (desc) {
210 device_set_desc(dev, desc);
211 return 0;
212 }
213 else
214 return ENXIO;
215}
216
217static int
218ata_pci_add_child(device_t dev, int unit)
219{
220 device_t child;
221
222 /* check if this is located at one of the std addresses */
223 if (ATA_MASTERDEV(dev)) {
224 if (!(child = device_add_child(dev, "ata", unit)))
225 return ENOMEM;
226 }
227 else {
228 if (!(child = device_add_child(dev, "ata", 2)))
229 return ENOMEM;
230 }
231 return 0;
232}
233
234static int
235ata_pci_attach(device_t dev)
236{
237 struct ata_pci_softc *sc = device_get_softc(dev);
238 u_int8_t class, subclass;
239 u_int32_t type, cmd;
240 int rid;
241
242 /* set up vendor-specific stuff */
243 type = pci_get_devid(dev);
244 class = pci_get_class(dev);
245 subclass = pci_get_subclass(dev);
246 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
247
248 if (!(cmd & PCIM_CMD_PORTEN)) {
249 device_printf(dev, "ATA channel disabled by BIOS\n");
250 return 0;
251 }
252
253 /* is busmastering supported ? */
254 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) ==
255 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) {
256
257 /* is there a valid port range to connect to ? */
258 rid = 0x20;
259 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
260 0, ~0, 1, RF_ACTIVE);
261 if (!sc->bmio)
262 device_printf(dev, "Busmastering DMA not configured\n");
263 }
264 else
265 device_printf(dev, "Busmastering DMA not supported\n");
266
267 /* do extra chipset specific setups */
268 switch (type) {
269 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
270 pci_write_config(dev, 0x53,
271 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
272 break;
273
274 case 0x4d38105a: /* Promise 66 & 100 need their clock changed */
275 case 0x4d30105a:
276 case 0x0d30105a:
277 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a);
278 /* FALLTHROUGH */
279
280 case 0x4d33105a: /* Promise (all) need burst mode to be turned on */
281 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01);
282 break;
283
284 case 0x00041103: /* HighPoint */
285 switch (pci_get_revid(dev)) {
286 case 0x00:
287 case 0x01:
288 /* turn off interrupt prediction */
289 pci_write_config(dev, 0x51,
290 (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
291 break;
292
293 case 0x02:
294 case 0x03:
295 case 0x04:
296 /* turn off interrupt prediction */
297 pci_write_config(dev, 0x51,
298 (pci_read_config(dev, 0x51, 1) & ~0x02), 1);
299 pci_write_config(dev, 0x55,
300 (pci_read_config(dev, 0x55, 1) & ~0x02), 1);
301 /* turn on interrupts */
302 pci_write_config(dev, 0x5a,
303 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
304
305 }
306 break;
307
308 case 0x05711106:
309 case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */
310
311 /* set prefetch, postwrite */
312 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
313
314 /* set fifo configuration half'n'half */
315 pci_write_config(dev, 0x43,
316 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1);
317
318 /* set status register read retry */
319 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1);
320
321 /* set DMA read & end-of-sector fifo flush */
322 pci_write_config(dev, 0x46,
323 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
324
325 /* set sector size */
326 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
327 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
328
329 /* prepare for ATA-66 on the 82C686 and rev 0x12 and newer 82C596's */
330 if (ata_find_dev(dev, 0x06861106, 0) ||
331 ata_find_dev(dev, 0x05961106, 0x12)) {
332 pci_write_config(dev, 0x50,
333 pci_read_config(dev, 0x50, 4) | 0x070f070f, 4);
334 }
335 break;
336
337 case 0x10001042: /* RZ 100? known bad, no DMA */
338 case 0x10011042:
339 case 0x06401095: /* CMD 640 known bad, no DMA */
340 sc->bmio = NULL;
341 device_printf(dev, "Busmastering DMA disabled\n");
342 }
343
344 if (sc->bmio) {
345 sc->bmaddr = rman_get_start(sc->bmio);
346 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
347 SYS_RES_IOPORT, rid, sc->bmio);
348 sc->bmio = NULL;
349 }
350
351 /*
352 * the Cypress chip is a mess, it contains two ATA functions, but
353 * both channels are visible on the first one.
354 * simply ignore the second function for now, as the right
355 * solution (ignoring the second channel on the first function)
356 * doesn't work with the crappy ATA interrupt setup on the alpha.
357 */
358 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1)
359 return 0;
360
361 ata_pci_add_child(dev, 0);
362
363 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
364 ata_pci_add_child(dev, 1);
365
366 return bus_generic_attach(dev);
367}
368
369static int
370ata_pci_intr(struct ata_softc *scp)
371{
372 u_int8_t dmastat;
373
374 /*
375 * since we might share the IRQ with another device, and in some
376 * cases with our twin channel, we only want to process interrupts
377 * that we know this channel generated.
378 */
379 switch (scp->chiptype) {
380 case 0x00041103: /* HighPoint HPT366/368/370 */
381 if (((dmastat = ata_dmastatus(scp)) &
382 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT)
383 return 1;
384 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
385 DELAY(1);
386 return 0;
387
388 case 0x06481095: /* CMD 648 */
389 case 0x06491095: /* CMD 649 */
390 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) &
391 (scp->channel ? 0x08 : 0x04)))
392 return 1;
393 break;
394
395 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */
396 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
397 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
398 case 0x0d30105a: /* Promise OEM ATA100 */
399 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) &
400 (scp->channel ? 0x00004000 : 0x00000400)))
401 return 1;
402 break;
403 }
404
405 if (scp->flags & ATA_DMA_ACTIVE) {
406 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
407 return 1;
408 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
409 DELAY(1);
410 }
411 return 0;
412}
413
414static int
415ata_pci_print_child(device_t dev, device_t child)
416{
417 struct ata_softc *scp = device_get_softc(child);
418 int retval = 0;
419
420 retval += bus_print_child_header(dev, child);
421 retval += printf(": at 0x%lx", rman_get_start(scp->r_io));
422
423 if (ATA_MASTERDEV(dev))
424 retval += printf(" irq %d", 14 + scp->channel);
425
426 retval += bus_print_child_footer(dev, child);
427
428 return retval;
429}
430
431static struct resource *
432ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
433 u_long start, u_long end, u_long count, u_int flags)
434{
435 struct ata_pci_softc *sc = device_get_softc(dev);
436 struct resource *res = NULL;
437 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
438 int myrid;
439
440 if (type == SYS_RES_IOPORT) {
441 switch (*rid) {
442 case ATA_IOADDR_RID:
443 if (ATA_MASTERDEV(dev)) {
444 myrid = 0;
445 start = (channel ? ATA_SECONDARY : ATA_PRIMARY);
446 end = start + ATA_IOSIZE - 1;
447 count = ATA_IOSIZE;
448 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
449 SYS_RES_IOPORT, &myrid,
450 start, end, count, flags);
451 }
452 else {
453 myrid = 0x10 + 8 * channel;
454 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
455 SYS_RES_IOPORT, &myrid,
456 start, end, count, flags);
457 }
458 break;
459
460 case ATA_ALTADDR_RID:
461 if (ATA_MASTERDEV(dev)) {
462 myrid = 0;
463 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
464 end = start + ATA_ALTIOSIZE - 1;
465 count = ATA_ALTIOSIZE;
466 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
467 SYS_RES_IOPORT, &myrid,
468 start, end, count, flags);
469 }
470 else {
471 myrid = 0x14 + 8 * channel;
472 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
473 SYS_RES_IOPORT, &myrid,
474 start, end, count, flags);
475 if (res) {
476 start = rman_get_start(res) + 2;
477 end = rman_get_start(res) + ATA_ALTIOSIZE - 1;
478 count = ATA_ALTIOSIZE;
479 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
480 SYS_RES_IOPORT, myrid, res);
481 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
482 SYS_RES_IOPORT, &myrid,
483 start, end, count, flags);
484 }
485 }
486 break;
487
488 case ATA_BMADDR_RID:
489 if (sc->bmaddr) {
490 myrid = 0x20;
491 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE);
492 end = start + ATA_BMIOSIZE - 1;
493 count = ATA_BMIOSIZE;
494 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
495 SYS_RES_IOPORT, &myrid,
496 start, end, count, flags);
497 }
498 }
499 return res;
500 }
501
502 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
503 if (ATA_MASTERDEV(dev)) {
504#ifdef __alpha__
505 return alpha_platform_alloc_ide_intr(channel);
506#else
507 int irq = (channel == 0 ? 14 : 15);
508
509 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
510 SYS_RES_IRQ, rid,
511 irq, irq, 1, flags & ~RF_SHAREABLE);
512#endif
513 }
514 else {
515 /* primary and secondary channels share interrupt, keep track */
516 if (!sc->irq)
517 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
518 SYS_RES_IRQ, rid, 0, ~0, 1, flags);
519 sc->irqcnt++;
520 return sc->irq;
521 }
522 }
523 return 0;
524}
525
526static int
527ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
528 struct resource *r)
529{
530 struct ata_pci_softc *sc = device_get_softc(dev);
531 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
532
533 if (type == SYS_RES_IOPORT) {
534 switch (rid) {
535 case ATA_IOADDR_RID:
536 if (ATA_MASTERDEV(dev))
537 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
538 SYS_RES_IOPORT, 0x0, r);
539 else
540 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
541 SYS_RES_IOPORT, 0x10+8*channel, r);
542 break;
543
544 case ATA_ALTADDR_RID:
545 if (ATA_MASTERDEV(dev))
546 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
547 SYS_RES_IOPORT, 0x0, r);
548 else
549 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
550 SYS_RES_IOPORT, 0x14+8*channel, r);
551 break;
552
553 case ATA_BMADDR_RID:
554 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
555 SYS_RES_IOPORT, 0x20, r);
556 default:
557 return ENOENT;
558 }
559 }
560 if (type == SYS_RES_IRQ) {
561 if (rid != ATA_IRQ_RID)
562 return ENOENT;
563
564 if (ATA_MASTERDEV(dev)) {
565#ifdef __alpha__
566 return alpha_platform_release_ide_intr(channel, r);
567#else
568 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
569 SYS_RES_IRQ, rid, r);
570#endif
571 }
572 else {
573 /* primary and secondary channels share interrupt, keep track */
574 if (--sc->irqcnt)
575 return 0;
576 sc->irq = 0;
577 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
578 SYS_RES_IRQ, rid, r);
579 }
580 }
581 return EINVAL;
582}
583
584static int
585ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
586 int flags, driver_intr_t *intr, void *arg,
587 void **cookiep)
588{
589 if (ATA_MASTERDEV(dev)) {
590#ifdef __alpha__
591 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep);
592#else
593 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
594 flags, intr, arg, cookiep);
595#endif
596 }
597 else
598 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq,
599 flags, intr, arg, cookiep);
600}
601
602static int
603ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
604 void *cookie)
605{
606 if (ATA_MASTERDEV(dev)) {
607#ifdef __alpha__
608 return alpha_platform_teardown_ide_intr(child, irq, cookie);
609#else
610 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
611#endif
612 }
613 else
614 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie);
615}
616
617static device_method_t ata_pci_methods[] = {
618 /* device interface */
619 DEVMETHOD(device_probe, ata_pci_probe),
620 DEVMETHOD(device_attach, ata_pci_attach),
621 DEVMETHOD(device_shutdown, bus_generic_shutdown),
622 DEVMETHOD(device_suspend, bus_generic_suspend),
623 DEVMETHOD(device_resume, bus_generic_resume),
624
625 /* bus methods */
626 DEVMETHOD(bus_print_child, ata_pci_print_child),
627 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
628 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
629 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
630 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
631 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
632 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
633 { 0, 0 }
634};
635
636static driver_t ata_pci_driver = {
637 "atapci",
638 ata_pci_methods,
639 sizeof(struct ata_pci_softc),
640};
641
642static devclass_t ata_pci_devclass;
643
644DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
645
646static int
647ata_pcisub_probe(device_t dev)
648{
649 struct ata_softc *scp = device_get_softc(dev);
650 device_t *children;
651 int count, i;
652
653 /* find channel number on this controller */
654 device_get_children(device_get_parent(dev), &children, &count);
655 for (i = 0; i < count; i++) {
656 if (children[i] == dev)
657 scp->channel = i;
658 }
659 free(children, M_TEMP);
660 scp->chiptype = pci_get_devid(device_get_parent(dev));
661 scp->intr_func = ata_pci_intr;
662 return ata_probe(dev);
663}
664
665static device_method_t ata_pcisub_methods[] = {
666 /* device interface */
667 DEVMETHOD(device_probe, ata_pcisub_probe),
668 DEVMETHOD(device_attach, ata_attach),
669 DEVMETHOD(device_detach, ata_detach),
670 DEVMETHOD(device_resume, ata_resume),
671 { 0, 0 }
672};
673
674static driver_t ata_pcisub_driver = {
675 "ata",
676 ata_pcisub_methods,
677 sizeof(struct ata_softc),
678};
679
680DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);
114 case 0x244b8086:
115 return "Intel ICH2 ATA100 controller";
116
117 case 0x522910b9:
118 if (pci_get_revid(dev) < 0x20)
119 return "AcerLabs Aladdin ATA controller";
120 else
121 return "AcerLabs Aladdin ATA33 controller";
122
123 case 0x05711106:
124 if (ata_find_dev(dev, 0x05861106, 0x02))
125 return "VIA 82C586 ATA33 controller";
126 if (ata_find_dev(dev, 0x05861106, 0))
127 return "VIA 82C586 ATA controller";
128 if (ata_find_dev(dev, 0x05961106, 0x12))
129 return "VIA 82C596 ATA66 controller";
130 if (ata_find_dev(dev, 0x05961106, 0))
131 return "VIA 82C596 ATA33 controller";
132 if (ata_find_dev(dev, 0x06861106, 0x40))
133 return "VIA 82C686 ATA100 controller";
134 if (ata_find_dev(dev, 0x06861106, 0))
135 return "VIA 82C686 ATA66 controller";
136 return "VIA Apollo ATA controller";
137
138 case 0x55131039:
139 return "SiS 5591 ATA33 controller";
140
141 case 0x06491095:
142 return "CMD 649 ATA100 controller";
143
144 case 0x06481095:
145 return "CMD 648 ATA66 controller";
146
147 case 0x06461095:
148 return "CMD 646 ATA controller";
149
150 case 0xc6931080:
151 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE)
152 return "Cypress 82C693 ATA controller";
153 break;
154
155 case 0x01021078:
156 return "Cyrix 5530 ATA33 controller";
157
158 case 0x74091022:
159 return "AMD 756 ATA66 controller";
160
161 case 0x02111166:
162 return "ServerWorks ROSB4 ATA33 controller";
163
164 case 0x4d33105a:
165 return "Promise ATA33 controller";
166
167 case 0x4d38105a:
168 return "Promise ATA66 controller";
169
170 case 0x0d30105a:
171 case 0x4d30105a:
172 return "Promise ATA100 controller";
173
174 case 0x00041103:
175 switch (pci_get_revid(dev)) {
176 case 0x00:
177 case 0x01:
178 return "HighPoint HPT366 ATA66 controller";
179 case 0x02:
180 return "HighPoint HPT368 ATA66 controller";
181 case 0x03:
182 case 0x04:
183 return "HighPoint HPT370 ATA100 controller";
184 default:
185 return "Unknown revision HighPoint ATA controller";
186 }
187
188 /* unsupported but known chipsets, generic DMA only */
189 case 0x10001042:
190 case 0x10011042:
191 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible";
192
193 case 0x06401095:
194 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible";
195
196 /* unknown chipsets, try generic DMA if it seems possible */
197 default:
198 if (pci_get_class(dev) == PCIC_STORAGE &&
199 (pci_get_subclass(dev) == PCIS_STORAGE_IDE))
200 return "Generic PCI ATA controller";
201 }
202 return NULL;
203}
204
205static int
206ata_pci_probe(device_t dev)
207{
208 const char *desc = ata_pci_match(dev);
209
210 if (desc) {
211 device_set_desc(dev, desc);
212 return 0;
213 }
214 else
215 return ENXIO;
216}
217
218static int
219ata_pci_add_child(device_t dev, int unit)
220{
221 device_t child;
222
223 /* check if this is located at one of the std addresses */
224 if (ATA_MASTERDEV(dev)) {
225 if (!(child = device_add_child(dev, "ata", unit)))
226 return ENOMEM;
227 }
228 else {
229 if (!(child = device_add_child(dev, "ata", 2)))
230 return ENOMEM;
231 }
232 return 0;
233}
234
235static int
236ata_pci_attach(device_t dev)
237{
238 struct ata_pci_softc *sc = device_get_softc(dev);
239 u_int8_t class, subclass;
240 u_int32_t type, cmd;
241 int rid;
242
243 /* set up vendor-specific stuff */
244 type = pci_get_devid(dev);
245 class = pci_get_class(dev);
246 subclass = pci_get_subclass(dev);
247 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
248
249 if (!(cmd & PCIM_CMD_PORTEN)) {
250 device_printf(dev, "ATA channel disabled by BIOS\n");
251 return 0;
252 }
253
254 /* is busmastering supported ? */
255 if ((cmd & (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) ==
256 (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN)) {
257
258 /* is there a valid port range to connect to ? */
259 rid = 0x20;
260 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
261 0, ~0, 1, RF_ACTIVE);
262 if (!sc->bmio)
263 device_printf(dev, "Busmastering DMA not configured\n");
264 }
265 else
266 device_printf(dev, "Busmastering DMA not supported\n");
267
268 /* do extra chipset specific setups */
269 switch (type) {
270 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
271 pci_write_config(dev, 0x53,
272 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
273 break;
274
275 case 0x4d38105a: /* Promise 66 & 100 need their clock changed */
276 case 0x4d30105a:
277 case 0x0d30105a:
278 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a);
279 /* FALLTHROUGH */
280
281 case 0x4d33105a: /* Promise (all) need burst mode to be turned on */
282 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01);
283 break;
284
285 case 0x00041103: /* HighPoint */
286 switch (pci_get_revid(dev)) {
287 case 0x00:
288 case 0x01:
289 /* turn off interrupt prediction */
290 pci_write_config(dev, 0x51,
291 (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
292 break;
293
294 case 0x02:
295 case 0x03:
296 case 0x04:
297 /* turn off interrupt prediction */
298 pci_write_config(dev, 0x51,
299 (pci_read_config(dev, 0x51, 1) & ~0x02), 1);
300 pci_write_config(dev, 0x55,
301 (pci_read_config(dev, 0x55, 1) & ~0x02), 1);
302 /* turn on interrupts */
303 pci_write_config(dev, 0x5a,
304 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
305
306 }
307 break;
308
309 case 0x05711106:
310 case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */
311
312 /* set prefetch, postwrite */
313 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
314
315 /* set fifo configuration half'n'half */
316 pci_write_config(dev, 0x43,
317 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1);
318
319 /* set status register read retry */
320 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1);
321
322 /* set DMA read & end-of-sector fifo flush */
323 pci_write_config(dev, 0x46,
324 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
325
326 /* set sector size */
327 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
328 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
329
330 /* prepare for ATA-66 on the 82C686 and rev 0x12 and newer 82C596's */
331 if (ata_find_dev(dev, 0x06861106, 0) ||
332 ata_find_dev(dev, 0x05961106, 0x12)) {
333 pci_write_config(dev, 0x50,
334 pci_read_config(dev, 0x50, 4) | 0x070f070f, 4);
335 }
336 break;
337
338 case 0x10001042: /* RZ 100? known bad, no DMA */
339 case 0x10011042:
340 case 0x06401095: /* CMD 640 known bad, no DMA */
341 sc->bmio = NULL;
342 device_printf(dev, "Busmastering DMA disabled\n");
343 }
344
345 if (sc->bmio) {
346 sc->bmaddr = rman_get_start(sc->bmio);
347 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
348 SYS_RES_IOPORT, rid, sc->bmio);
349 sc->bmio = NULL;
350 }
351
352 /*
353 * the Cypress chip is a mess, it contains two ATA functions, but
354 * both channels are visible on the first one.
355 * simply ignore the second function for now, as the right
356 * solution (ignoring the second channel on the first function)
357 * doesn't work with the crappy ATA interrupt setup on the alpha.
358 */
359 if (pci_get_devid(dev) == 0xc6931080 && pci_get_function(dev) > 1)
360 return 0;
361
362 ata_pci_add_child(dev, 0);
363
364 if (ATA_MASTERDEV(dev) || pci_read_config(dev, 0x18, 4) & IOMASK)
365 ata_pci_add_child(dev, 1);
366
367 return bus_generic_attach(dev);
368}
369
370static int
371ata_pci_intr(struct ata_softc *scp)
372{
373 u_int8_t dmastat;
374
375 /*
376 * since we might share the IRQ with another device, and in some
377 * cases with our twin channel, we only want to process interrupts
378 * that we know this channel generated.
379 */
380 switch (scp->chiptype) {
381 case 0x00041103: /* HighPoint HPT366/368/370 */
382 if (((dmastat = ata_dmastatus(scp)) &
383 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) != ATA_BMSTAT_INTERRUPT)
384 return 1;
385 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
386 DELAY(1);
387 return 0;
388
389 case 0x06481095: /* CMD 648 */
390 case 0x06491095: /* CMD 649 */
391 if (!(pci_read_config(device_get_parent(scp->dev), 0x71, 1) &
392 (scp->channel ? 0x08 : 0x04)))
393 return 1;
394 break;
395
396 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */
397 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
398 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
399 case 0x0d30105a: /* Promise OEM ATA100 */
400 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) &
401 (scp->channel ? 0x00004000 : 0x00000400)))
402 return 1;
403 break;
404 }
405
406 if (scp->flags & ATA_DMA_ACTIVE) {
407 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
408 return 1;
409 ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
410 DELAY(1);
411 }
412 return 0;
413}
414
415static int
416ata_pci_print_child(device_t dev, device_t child)
417{
418 struct ata_softc *scp = device_get_softc(child);
419 int retval = 0;
420
421 retval += bus_print_child_header(dev, child);
422 retval += printf(": at 0x%lx", rman_get_start(scp->r_io));
423
424 if (ATA_MASTERDEV(dev))
425 retval += printf(" irq %d", 14 + scp->channel);
426
427 retval += bus_print_child_footer(dev, child);
428
429 return retval;
430}
431
432static struct resource *
433ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
434 u_long start, u_long end, u_long count, u_int flags)
435{
436 struct ata_pci_softc *sc = device_get_softc(dev);
437 struct resource *res = NULL;
438 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
439 int myrid;
440
441 if (type == SYS_RES_IOPORT) {
442 switch (*rid) {
443 case ATA_IOADDR_RID:
444 if (ATA_MASTERDEV(dev)) {
445 myrid = 0;
446 start = (channel ? ATA_SECONDARY : ATA_PRIMARY);
447 end = start + ATA_IOSIZE - 1;
448 count = ATA_IOSIZE;
449 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
450 SYS_RES_IOPORT, &myrid,
451 start, end, count, flags);
452 }
453 else {
454 myrid = 0x10 + 8 * channel;
455 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
456 SYS_RES_IOPORT, &myrid,
457 start, end, count, flags);
458 }
459 break;
460
461 case ATA_ALTADDR_RID:
462 if (ATA_MASTERDEV(dev)) {
463 myrid = 0;
464 start = (channel ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
465 end = start + ATA_ALTIOSIZE - 1;
466 count = ATA_ALTIOSIZE;
467 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
468 SYS_RES_IOPORT, &myrid,
469 start, end, count, flags);
470 }
471 else {
472 myrid = 0x14 + 8 * channel;
473 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
474 SYS_RES_IOPORT, &myrid,
475 start, end, count, flags);
476 if (res) {
477 start = rman_get_start(res) + 2;
478 end = rman_get_start(res) + ATA_ALTIOSIZE - 1;
479 count = ATA_ALTIOSIZE;
480 BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
481 SYS_RES_IOPORT, myrid, res);
482 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
483 SYS_RES_IOPORT, &myrid,
484 start, end, count, flags);
485 }
486 }
487 break;
488
489 case ATA_BMADDR_RID:
490 if (sc->bmaddr) {
491 myrid = 0x20;
492 start = (channel == 0 ? sc->bmaddr : sc->bmaddr + ATA_BMIOSIZE);
493 end = start + ATA_BMIOSIZE - 1;
494 count = ATA_BMIOSIZE;
495 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
496 SYS_RES_IOPORT, &myrid,
497 start, end, count, flags);
498 }
499 }
500 return res;
501 }
502
503 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
504 if (ATA_MASTERDEV(dev)) {
505#ifdef __alpha__
506 return alpha_platform_alloc_ide_intr(channel);
507#else
508 int irq = (channel == 0 ? 14 : 15);
509
510 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
511 SYS_RES_IRQ, rid,
512 irq, irq, 1, flags & ~RF_SHAREABLE);
513#endif
514 }
515 else {
516 /* primary and secondary channels share interrupt, keep track */
517 if (!sc->irq)
518 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
519 SYS_RES_IRQ, rid, 0, ~0, 1, flags);
520 sc->irqcnt++;
521 return sc->irq;
522 }
523 }
524 return 0;
525}
526
527static int
528ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
529 struct resource *r)
530{
531 struct ata_pci_softc *sc = device_get_softc(dev);
532 int channel = ((struct ata_softc *)device_get_softc(child))->channel;
533
534 if (type == SYS_RES_IOPORT) {
535 switch (rid) {
536 case ATA_IOADDR_RID:
537 if (ATA_MASTERDEV(dev))
538 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
539 SYS_RES_IOPORT, 0x0, r);
540 else
541 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
542 SYS_RES_IOPORT, 0x10+8*channel, r);
543 break;
544
545 case ATA_ALTADDR_RID:
546 if (ATA_MASTERDEV(dev))
547 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
548 SYS_RES_IOPORT, 0x0, r);
549 else
550 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
551 SYS_RES_IOPORT, 0x14+8*channel, r);
552 break;
553
554 case ATA_BMADDR_RID:
555 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
556 SYS_RES_IOPORT, 0x20, r);
557 default:
558 return ENOENT;
559 }
560 }
561 if (type == SYS_RES_IRQ) {
562 if (rid != ATA_IRQ_RID)
563 return ENOENT;
564
565 if (ATA_MASTERDEV(dev)) {
566#ifdef __alpha__
567 return alpha_platform_release_ide_intr(channel, r);
568#else
569 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
570 SYS_RES_IRQ, rid, r);
571#endif
572 }
573 else {
574 /* primary and secondary channels share interrupt, keep track */
575 if (--sc->irqcnt)
576 return 0;
577 sc->irq = 0;
578 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
579 SYS_RES_IRQ, rid, r);
580 }
581 }
582 return EINVAL;
583}
584
585static int
586ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
587 int flags, driver_intr_t *intr, void *arg,
588 void **cookiep)
589{
590 if (ATA_MASTERDEV(dev)) {
591#ifdef __alpha__
592 return alpha_platform_setup_ide_intr(child, irq, intr, arg, cookiep);
593#else
594 return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
595 flags, intr, arg, cookiep);
596#endif
597 }
598 else
599 return BUS_SETUP_INTR(device_get_parent(dev), dev, irq,
600 flags, intr, arg, cookiep);
601}
602
603static int
604ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
605 void *cookie)
606{
607 if (ATA_MASTERDEV(dev)) {
608#ifdef __alpha__
609 return alpha_platform_teardown_ide_intr(child, irq, cookie);
610#else
611 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
612#endif
613 }
614 else
615 return BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie);
616}
617
618static device_method_t ata_pci_methods[] = {
619 /* device interface */
620 DEVMETHOD(device_probe, ata_pci_probe),
621 DEVMETHOD(device_attach, ata_pci_attach),
622 DEVMETHOD(device_shutdown, bus_generic_shutdown),
623 DEVMETHOD(device_suspend, bus_generic_suspend),
624 DEVMETHOD(device_resume, bus_generic_resume),
625
626 /* bus methods */
627 DEVMETHOD(bus_print_child, ata_pci_print_child),
628 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
629 DEVMETHOD(bus_release_resource, ata_pci_release_resource),
630 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
631 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
632 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
633 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
634 { 0, 0 }
635};
636
637static driver_t ata_pci_driver = {
638 "atapci",
639 ata_pci_methods,
640 sizeof(struct ata_pci_softc),
641};
642
643static devclass_t ata_pci_devclass;
644
645DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
646
647static int
648ata_pcisub_probe(device_t dev)
649{
650 struct ata_softc *scp = device_get_softc(dev);
651 device_t *children;
652 int count, i;
653
654 /* find channel number on this controller */
655 device_get_children(device_get_parent(dev), &children, &count);
656 for (i = 0; i < count; i++) {
657 if (children[i] == dev)
658 scp->channel = i;
659 }
660 free(children, M_TEMP);
661 scp->chiptype = pci_get_devid(device_get_parent(dev));
662 scp->intr_func = ata_pci_intr;
663 return ata_probe(dev);
664}
665
666static device_method_t ata_pcisub_methods[] = {
667 /* device interface */
668 DEVMETHOD(device_probe, ata_pcisub_probe),
669 DEVMETHOD(device_attach, ata_attach),
670 DEVMETHOD(device_detach, ata_detach),
671 DEVMETHOD(device_resume, ata_resume),
672 { 0, 0 }
673};
674
675static driver_t ata_pcisub_driver = {
676 "ata",
677 ata_pcisub_methods,
678 sizeof(struct ata_softc),
679};
680
681DRIVER_MODULE(ata, atapci, ata_pcisub_driver, ata_devclass, 0, 0);