1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 82053 2001-08-21 11:35:47Z sos $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/disk.h>
35#include <sys/module.h>
36#include <sys/bus.h>
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168 return "Promise ATA33 controller";
169
170 case 0x4d38105a:
171 return "Promise ATA66 controller";
172
173 case 0x0d30105a:
174 case 0x4d30105a:
175 case 0x4d68105a:
176 case 0x6268105a:
177 return "Promise ATA100 controller";
178
179 case 0x00041103:
180 switch (pci_get_revid(dev)) {
181 case 0x00:
182 case 0x01:
183 return "HighPoint HPT366 ATA66 controller";
184 case 0x02:
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276 pci_write_config(dev, 0x53,
277 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
278 break;
279
280 case 0x4d38105a: /* Promise 66 & 100 need their clock changed */
281 case 0x4d30105a:
282 case 0x0d30105a:
283 case 0x4d68105a:
284 case 0x6268105a:
285 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a);
286 /* FALLTHROUGH */
287
288 case 0x4d33105a: /* Promise (all) need burst mode to be turned on */
289 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01);
290 break;
291
292 case 0x00041103: /* HighPoint */
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332 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
333
334 /* set sector size */
335 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
336 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
337
338 /* prepare for ATA-66 on the 82C686 and rev 0x12 and newer 82C596's */
339 if (ata_find_dev(dev, 0x06861106, 0) ||
340 ata_find_dev(dev, 0x05961106, 0x12))
341 pci_write_config(dev, 0x50, 0x030b030b, 4);
342
343 break;
344
345 case 0x10001042: /* RZ 100? known bad, no DMA */
346 case 0x10011042:
347 case 0x06401095: /* CMD 640 known bad, no DMA */
348 sc->bmio = NULL;
349 device_printf(dev, "Busmastering DMA disabled\n");
350 }
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400 return 1;
401 break;
402
403 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */
404 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
405 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
406 case 0x0d30105a: /* Promise OEM ATA100 */
407 case 0x4d68105a: /* Promise TX2 ATA100 */
408 case 0x6268105a: /* Promise TX2v2 ATA100 */
409 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) &
410 (scp->channel ? 0x00004000 : 0x00000400)))
411 return 1;
412 break;
413 }
414
415 if (scp->flags & ATA_DMA_ACTIVE) {
416 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
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512 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
513 if (ATA_MASTERDEV(dev)) {
514#ifdef __alpha__
515 return alpha_platform_alloc_ide_intr(channel);
516#else
517 int irq = (channel == 0 ? 14 : 15);
518
519 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
520 SYS_RES_IRQ, rid, irq, irq, 1, flags);
521#endif
522 }
523 else {
524 /* primary and secondary channels share interrupt, keep track */
525 if (!sc->irq)
526 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
527 SYS_RES_IRQ, rid, 0, ~0, 1, flags);
528 sc->irqcnt++;
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2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-pci.c 82053 2001-08-21 11:35:47Z sos $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/disk.h>
35#include <sys/module.h>
36#include <sys/bus.h>
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168 return "Promise ATA33 controller";
169
170 case 0x4d38105a:
171 return "Promise ATA66 controller";
172
173 case 0x0d30105a:
174 case 0x4d30105a:
175 case 0x4d68105a:
176 case 0x6268105a:
177 return "Promise ATA100 controller";
178
179 case 0x00041103:
180 switch (pci_get_revid(dev)) {
181 case 0x00:
182 case 0x01:
183 return "HighPoint HPT366 ATA66 controller";
184 case 0x02:
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276 pci_write_config(dev, 0x53,
277 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
278 break;
279
280 case 0x4d38105a: /* Promise 66 & 100 need their clock changed */
281 case 0x4d30105a:
282 case 0x0d30105a:
283 case 0x4d68105a:
284 case 0x6268105a:
285 ATA_OUTB(sc->bmio, 0x11, ATA_INB(sc->bmio, 0x11) | 0x0a);
286 /* FALLTHROUGH */
287
288 case 0x4d33105a: /* Promise (all) need burst mode to be turned on */
289 ATA_OUTB(sc->bmio, 0x1f, ATA_INB(sc->bmio, 0x1f) | 0x01);
290 break;
291
292 case 0x00041103: /* HighPoint */
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332 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1);
333
334 /* set sector size */
335 pci_write_config(dev, 0x60, DEV_BSIZE, 2);
336 pci_write_config(dev, 0x68, DEV_BSIZE, 2);
337
338 /* prepare for ATA-66 on the 82C686 and rev 0x12 and newer 82C596's */
339 if (ata_find_dev(dev, 0x06861106, 0) ||
340 ata_find_dev(dev, 0x05961106, 0x12))
341 pci_write_config(dev, 0x50, 0x030b030b, 4);
342
343 break;
344
345 case 0x10001042: /* RZ 100? known bad, no DMA */
346 case 0x10011042:
347 case 0x06401095: /* CMD 640 known bad, no DMA */
348 sc->bmio = NULL;
349 device_printf(dev, "Busmastering DMA disabled\n");
350 }
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400 return 1;
401 break;
402
403 case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */
404 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
405 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
406 case 0x0d30105a: /* Promise OEM ATA100 */
407 case 0x4d68105a: /* Promise TX2 ATA100 */
408 case 0x6268105a: /* Promise TX2v2 ATA100 */
409 if (!(ATA_INL(scp->r_bmio, (scp->channel ? 0x14 : 0x1c)) &
410 (scp->channel ? 0x00004000 : 0x00000400)))
411 return 1;
412 break;
413 }
414
415 if (scp->flags & ATA_DMA_ACTIVE) {
416 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
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512 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
513 if (ATA_MASTERDEV(dev)) {
514#ifdef __alpha__
515 return alpha_platform_alloc_ide_intr(channel);
516#else
517 int irq = (channel == 0 ? 14 : 15);
518
519 return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
520 SYS_RES_IRQ, rid, irq, irq, 1, flags);
521#endif
522 }
523 else {
524 /* primary and secondary channels share interrupt, keep track */
525 if (!sc->irq)
526 sc->irq = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
527 SYS_RES_IRQ, rid, 0, ~0, 1, flags);
528 sc->irqcnt++;
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