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ata-dma.c (77905) ata-dma.c (82053)
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 77905 2001-06-08 09:51:33Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 82053 2001-08-21 11:35:47Z sos $
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/ata.h>
35#include <sys/bio.h>
36#include <sys/malloc.h>

--- 12 unchanged lines hidden (view full) ---

49static void promise_timing(struct ata_softc *, int, int);
50static void hpt_timing(struct ata_softc *, int, int);
51
52/* misc defines */
53#ifdef __alpha__
54#undef vtophys
55#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
56#endif
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/ata.h>
35#include <sys/bio.h>
36#include <sys/malloc.h>

--- 12 unchanged lines hidden (view full) ---

49static void promise_timing(struct ata_softc *, int, int);
50static void hpt_timing(struct ata_softc *, int, int);
51
52/* misc defines */
53#ifdef __alpha__
54#undef vtophys
55#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
56#endif
57#define ATAPI_DEVICE(scp, device) \
58 ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || \
59 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
57
60
61
58void *
59ata_dmaalloc(struct ata_softc *scp, int device)
60{
61 void *dmatab;
62
63 if ((dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) {
64 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
65 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {

--- 647 unchanged lines hidden (view full) ---

713 pci_write_config(parent, 0x44, 0x20, 4);
714 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
715 return;
716 }
717 }
718 /* we could set PIO mode timings, but we assume the BIOS did that */
719 break;
720
62void *
63ata_dmaalloc(struct ata_softc *scp, int device)
64{
65 void *dmatab;
66
67 if ((dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) {
68 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
69 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {

--- 647 unchanged lines hidden (view full) ---

717 pci_write_config(parent, 0x44, 0x20, 4);
718 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
719 return;
720 }
721 }
722 /* we could set PIO mode timings, but we assume the BIOS did that */
723 break;
724
721 case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */
722 case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */
723 case 0x4d30105a: /* Promise Ultra/FastTrak 100 controllers */
724 case 0x0d30105a: /* Promise OEM ATA100 controllers */
725 case 0x4d68105a: /* Promise TX2 ATA100 controllers */
725 case 0x4d30105a: /* Promise Ultra/FastTrak 100 controllers */
726 case 0x0d30105a: /* Promise OEM ATA100 controllers */
727 case 0x4d68105a: /* Promise TX2 ATA100 controllers */
726 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
727 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
728 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
729 break;
730
731 if (udmamode >= 5 && (scp->chiptype == 0x4d30105a ||
732 scp->chiptype == 0x0d30105a || scp->chiptype == 0x4d68105a) &&
728 case 0x6268105a: /* Promise TX2v2 ATA100 controllers */
729 if (!ATAPI_DEVICE(scp, device) && udmamode >= 5 &&
733 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
734 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
735 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
736 if (bootverbose)
737 ata_printf(scp, device,
738 "%s setting UDMA5 on Promise chip\n",
739 (error) ? "failed" : "success");
740 if (!error) {
741 promise_timing(scp, devno, ATA_UDMA5);
742 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
743 return;
744 }
745 }
730 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
731 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
732 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
733 if (bootverbose)
734 ata_printf(scp, device,
735 "%s setting UDMA5 on Promise chip\n",
736 (error) ? "failed" : "success");
737 if (!error) {
738 promise_timing(scp, devno, ATA_UDMA5);
739 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
740 return;
741 }
742 }
746 if (udmamode >= 4 &&
747 (scp->chiptype == 0x4d38105a || scp->chiptype == 0x4d30105a ||
748 scp->chiptype == 0x0d30105a || scp->chiptype == 0x4d68105a) &&
743 /* FALLTHROUGH */
744
745 case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */
746 if (!ATAPI_DEVICE(scp, device) && udmamode >= 4 &&
749 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
750 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
751 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
752 if (bootverbose)
753 ata_printf(scp, device,
754 "%s setting UDMA4 on Promise chip\n",
755 (error) ? "failed" : "success");
756 if (!error) {
757 promise_timing(scp, devno, ATA_UDMA4);
758 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
759 return;
760 }
761 }
747 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
748 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
749 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
750 if (bootverbose)
751 ata_printf(scp, device,
752 "%s setting UDMA4 on Promise chip\n",
753 (error) ? "failed" : "success");
754 if (!error) {
755 promise_timing(scp, devno, ATA_UDMA4);
756 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
757 return;
758 }
759 }
762 if (udmamode >= 2) {
760 /* FALLTHROUGH */
761
762 case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */
763 if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
763 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
764 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
765 if (bootverbose)
766 ata_printf(scp, device,
767 "%s setting UDMA2 on Promise chip\n",
768 (error) ? "failed" : "success");
769 if (!error) {
770 promise_timing(scp, devno, ATA_UDMA2);
771 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
772 return;
773 }
774 }
764 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
765 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
766 if (bootverbose)
767 ata_printf(scp, device,
768 "%s setting UDMA2 on Promise chip\n",
769 (error) ? "failed" : "success");
770 if (!error) {
771 promise_timing(scp, devno, ATA_UDMA2);
772 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
773 return;
774 }
775 }
775 if (wdmamode >= 2 && apiomode >= 4) {
776 if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
776 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
777 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
778 if (bootverbose)
779 ata_printf(scp, device,
780 "%s setting WDMA2 on Promise chip\n",
781 (error) ? "failed" : "success");
782 if (!error) {
783 promise_timing(scp, devno, ATA_WDMA2);

--- 9 unchanged lines hidden (view full) ---

793 "%s setting PIO%d on Promise chip\n",
794 (error) ? "failed" : "success",
795 (apiomode >= 0) ? apiomode : 0);
796 promise_timing(scp, devno, ata_pio2mode(apiomode));
797 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
798 return;
799
800 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
777 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
778 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
779 if (bootverbose)
780 ata_printf(scp, device,
781 "%s setting WDMA2 on Promise chip\n",
782 (error) ? "failed" : "success");
783 if (!error) {
784 promise_timing(scp, devno, ATA_WDMA2);

--- 9 unchanged lines hidden (view full) ---

794 "%s setting PIO%d on Promise chip\n",
795 (error) ? "failed" : "success",
796 (apiomode >= 0) ? apiomode : 0);
797 promise_timing(scp, devno, ata_pio2mode(apiomode));
798 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
799 return;
800
801 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
801 /* no ATAPI devices for now */
802 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
803 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
804 break;
805
806 if (udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
802 if (!ATAPI_DEVICE(scp, device) &&
803 udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
807 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
808 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
809 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
810 if (bootverbose)
811 ata_printf(scp, device,
812 "%s setting UDMA5 on HighPoint chip\n",
813 (error) ? "failed" : "success");
814 if (!error) {
815 hpt_timing(scp, devno, ATA_UDMA5);
816 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
817 return;
818 }
819 }
804 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
805 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
806 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
807 if (bootverbose)
808 ata_printf(scp, device,
809 "%s setting UDMA5 on HighPoint chip\n",
810 (error) ? "failed" : "success");
811 if (!error) {
812 hpt_timing(scp, devno, ATA_UDMA5);
813 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
814 return;
815 }
816 }
820 if (udmamode >=4 &&
817 if (!ATAPI_DEVICE(scp, device) && udmamode >=4 &&
821 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
822 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
823 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
824 if (bootverbose)
825 ata_printf(scp, device,
826 "%s setting UDMA4 on HighPoint chip\n",
827 (error) ? "failed" : "success");
828 if (!error) {
829 hpt_timing(scp, devno, ATA_UDMA4);
830 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
831 return;
832 }
833 }
818 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
819 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
820 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
821 if (bootverbose)
822 ata_printf(scp, device,
823 "%s setting UDMA4 on HighPoint chip\n",
824 (error) ? "failed" : "success");
825 if (!error) {
826 hpt_timing(scp, devno, ATA_UDMA4);
827 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
828 return;
829 }
830 }
834 if (udmamode >= 2) {
831 if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
835 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
836 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
837 if (bootverbose)
838 ata_printf(scp, device,
839 "%s setting UDMA2 on HighPoint chip\n",
840 (error) ? "failed" : "success");
841 if (!error) {
842 hpt_timing(scp, devno, ATA_UDMA2);
843 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
844 return;
845 }
846 }
832 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
833 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
834 if (bootverbose)
835 ata_printf(scp, device,
836 "%s setting UDMA2 on HighPoint chip\n",
837 (error) ? "failed" : "success");
838 if (!error) {
839 hpt_timing(scp, devno, ATA_UDMA2);
840 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
841 return;
842 }
843 }
847 if (wdmamode >= 2 && apiomode >= 4) {
844 if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
848 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
849 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
850 if (bootverbose)
851 ata_printf(scp, device,
852 "%s setting WDMA2 on HighPoint chip\n",
853 (error) ? "failed" : "success");
854 if (!error) {
855 hpt_timing(scp, devno, ATA_WDMA2);

--- 187 unchanged lines hidden (view full) ---

1043 case ATA_UDMA2: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break;
1044 }
1045 break;
1046
1047 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
1048 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
1049 case 0x0d30105a: /* Promise OEM ATA 100 */
1050 case 0x4d68105a: /* Promise TX2 ATA 100 */
845 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
846 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
847 if (bootverbose)
848 ata_printf(scp, device,
849 "%s setting WDMA2 on HighPoint chip\n",
850 (error) ? "failed" : "success");
851 if (!error) {
852 hpt_timing(scp, devno, ATA_WDMA2);

--- 187 unchanged lines hidden (view full) ---

1040 case ATA_UDMA2: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break;
1041 }
1042 break;
1043
1044 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
1045 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
1046 case 0x0d30105a: /* Promise OEM ATA 100 */
1047 case 0x4d68105a: /* Promise TX2 ATA 100 */
1048 case 0x6268105a: /* Promise TX2v2 ATA 100 */
1051 switch (mode) {
1052 default:
1053 case ATA_PIO0: t->pa = 15; t->pb = 31; t->mb = 7; t->mc = 15; break;
1054 case ATA_PIO1: t->pa = 10; t->pb = 24; t->mb = 7; t->mc = 15; break;
1055 case ATA_PIO2: t->pa = 6; t->pb = 16; t->mb = 7; t->mc = 15; break;
1056 case ATA_PIO3: t->pa = 4; t->pb = 12; t->mb = 7; t->mc = 15; break;
1057 case ATA_PIO4: t->pa = 2; t->pb = 8; t->mb = 7; t->mc = 15; break;
1058 case ATA_WDMA2: t->pa = 6; t->pb = 14; t->mb = 6; t->mc = 6; break;

--- 76 unchanged lines hidden --- 		1049 switch (mode) {
1050 default:
1051 case ATA_PIO0: t->pa = 15; t->pb = 31; t->mb = 7; t->mc = 15; break;
1052 case ATA_PIO1: t->pa = 10; t->pb = 24; t->mb = 7; t->mc = 15; break;
1053 case ATA_PIO2: t->pa = 6; t->pb = 16; t->mb = 7; t->mc = 15; break;
1054 case ATA_PIO3: t->pa = 4; t->pb = 12; t->mb = 7; t->mc = 15; break;
1055 case ATA_PIO4: t->pa = 2; t->pb = 8; t->mb = 7; t->mc = 15; break;
1056 case ATA_WDMA2: t->pa = 6; t->pb = 14; t->mb = 6; t->mc = 6; break;

--- 76 unchanged lines hidden ---