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ata-dma.c (57325) ata-dma.c (57391)
1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 57325 2000-02-18 20:57:33Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 57391 2000-02-22 20:37:01Z sos $
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/buf.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

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91 free(dmatab, M_DEVBUF);
92 return;
93 }
94 scp->dmatab[ATA_DEV(device)] = dmatab;
95 }
96
97 switch (scp->chiptype) {
98
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/buf.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

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91 free(dmatab, M_DEVBUF);
92 return;
93 }
94 scp->dmatab[ATA_DEV(device)] = dmatab;
95 }
96
97 switch (scp->chiptype) {
98
99 case 0x24118086: /* Intel ICH */
100 if (udmamode >= 4) {
101 int32_t mask48, new48;
102 int16_t word54;
103
104 word54 = pci_read_config(parent, 0x54, 2);
105 if (word54 & (0x10 << devno)) {
106 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
107 ATA_UDMA4, ATA_C_F_SETXFER,ATA_WAIT_READY);
108 if (bootverbose)
109 ata_printf(scp, device,
110 "%s setting up UDMA4 mode on ICH chip\n",
111 (error) ? "failed" : "success");
112 if (!error) {
113 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
114 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
115 pci_write_config(parent, 0x48,
116 (pci_read_config(parent, 0x48, 4) &
117 ~mask48) | new48, 4);
118 pci_write_config(parent, 0x54, word54 | (1 << devno), 2);
119 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
120 return;
121 }
122 }
123 }
124 /* FALLTHROUGH */
125
99 case 0x71118086: /* Intel PIIX4 */
100 case 0x71998086: /* Intel PIIX4e */
126 case 0x71118086: /* Intel PIIX4 */
127 case 0x71998086: /* Intel PIIX4e */
101 case 0x24118086: /* Intel ICH */
102 case 0x24218086: /* Intel ICH0 */
103 if (udmamode >= 2) {
104 int32_t mask48, new48;
105
106 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
107 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
108 if (bootverbose)
109 ata_printf(scp, device, "%s setting up UDMA2 mode on %s chip\n",

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128 case 0x24218086: /* Intel ICH0 */
129 if (udmamode >= 2) {
130 int32_t mask48, new48;
131
132 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
133 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
134 if (bootverbose)
135 ata_printf(scp, device, "%s setting up UDMA2 mode on %s chip\n",

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