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ata-dma.c (104298) ata-dma.c (107562)
1/*-
2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 104298 2002-10-01 15:21:09Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 107562 2002-12-03 20:20:44Z sos $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/ata.h>
34#include <sys/endian.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

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1254 if (bootverbose)
1255 ata_prtdev(atadev, "%s setting PIO%d on HighPoint chip\n",
1256 (error) ? "failed" : "success",
1257 (apiomode >= 0) ? apiomode : 0);
1258 hpt_timing(atadev, devno, ATA_PIO0 + apiomode);
1259 atadev->mode = ATA_PIO0 + apiomode;
1260 return;
1261
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/ata.h>
34#include <sys/endian.h>
35#include <sys/malloc.h>
36#include <sys/bus.h>

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1254 if (bootverbose)
1255 ata_prtdev(atadev, "%s setting PIO%d on HighPoint chip\n",
1256 (error) ? "failed" : "success",
1257 (apiomode >= 0) ? apiomode : 0);
1258 hpt_timing(atadev, devno, ATA_PIO0 + apiomode);
1259 atadev->mode = ATA_PIO0 + apiomode;
1260 return;
1261
1262 case 0x00091191: /* Acard ATP865R controller */
1263 case 0x00081191: /* Acard ATP865 controller */
1264 if (ATAPI_DEVICE(atadev))
1265 break;
1266 if (udmamode >= 6) {
1267 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1268 ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY);
1269 if (bootverbose)
1270 ata_prtdev(atadev, "%s setting up UDMA6 mode on Acard chip\n",
1271 (error) ? "failed" : "success");
1272 if (!error) {
1273 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
1274
1275 reg44 &= ~(0x000f << (devno << 2));
1276 reg44 |= (0x0007 << (devno << 2));
1277 pci_write_config(parent, 0x44, reg44, 2);
1278 pci_write_config(parent, 0x4a, 0xa6, 1);
1279 pci_write_config(parent, 0x40 + devno, 0x031, 1);
1280 ata_dmacreate(atadev, apiomode, ATA_UDMA6);
1281 return;
1282 }
1283 }
1284 if (udmamode >= 5) {
1285 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1286 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
1287 if (bootverbose)
1288 ata_prtdev(atadev, "%s setting up UDMA5 mode on Acard chip\n",
1289 (error) ? "failed" : "success");
1290 if (!error) {
1291 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
1292
1293 reg44 &= ~(0x000f << (devno << 2));
1294 reg44 |= (0x0006 << (devno << 2));
1295 pci_write_config(parent, 0x44, reg44, 2);
1296 pci_write_config(parent, 0x4a, 0xa6, 1);
1297 pci_write_config(parent, 0x40 + devno, 0x031, 1);
1298 ata_dmacreate(atadev, apiomode, ATA_UDMA5);
1299 return;
1300 }
1301 }
1302 /* FALLTHROUGH */
1303
1304 case 0x00071191: /* Acard ATP860R controller */
1305 case 0x00061191: /* Acard ATP860 controller */
1306 if (ATAPI_DEVICE(atadev))
1307 break;
1308 if (udmamode >= 4) {
1309 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1310 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
1311 if (bootverbose)
1312 ata_prtdev(atadev, "%s setting up UDMA4 mode on Acard chip\n",
1313 (error) ? "failed" : "success");
1314 if (!error) {
1315 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
1316
1317 reg44 &= ~(0x000f << (devno << 2));
1318 reg44 |= (0x0005 << (devno << 2));
1319 pci_write_config(parent, 0x44, reg44, 2);
1320 pci_write_config(parent, 0x4a, 0xa6, 1);
1321 pci_write_config(parent, 0x40 + devno, 0x031, 1);
1322 ata_dmacreate(atadev, apiomode, ATA_UDMA4);
1323 return;
1324 }
1325 }
1326 if (udmamode >= 2) {
1327 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1328 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
1329 if (bootverbose)
1330 ata_prtdev(atadev, "%s setting up UDMA2 mode on Acard chip\n",
1331 (error) ? "failed" : "success");
1332 if (!error) {
1333 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
1334
1335 reg44 &= ~(0x000f << (devno << 2));
1336 reg44 |= (0x0003 << (devno << 2));
1337 pci_write_config(parent, 0x44, reg44, 2);
1338 pci_write_config(parent, 0x4a, 0xa6, 1);
1339 pci_write_config(parent, 0x40 + devno, 0x031, 1);
1340 ata_dmacreate(atadev, apiomode, ATA_UDMA2);
1341 return;
1342 }
1343 }
1344 if (wdmamode >= 2 && apiomode >= 4) {
1345 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1346 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
1347 if (bootverbose)
1348 ata_prtdev(atadev, "%s setting up WDMA2 mode on Acard chip\n",
1349 (error) ? "failed" : "success");
1350 if (!error) {
1351 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
1352
1353 reg44 &= ~(0x000f << (devno << 2));
1354 pci_write_config(parent, 0x44, reg44, 2);
1355 pci_write_config(parent, 0x4a, 0xa6, 1);
1356 pci_write_config(parent, 0x40 + devno, 0x031, 1);
1357 ata_dmacreate(atadev, apiomode, ATA_WDMA2);
1358 return;
1359 }
1360 }
1361 /* we could set PIO mode timings, but we assume the BIOS did that */
1362 break;
1363
1364 case 0x00051191: /* Acard ATP850UF controller */
1365 if (ATAPI_DEVICE(atadev))
1366 break;
1367 if (udmamode >= 2) {
1368 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1369 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
1370 if (bootverbose)
1371 ata_prtdev(atadev, "%s setting up UDMA2 mode on Acard chip\n",
1372 (error) ? "failed" : "success");
1373 if (!error) {
1374 u_int8_t reg54 = pci_read_config(parent, 0x54, 1);
1375
1376 reg54 |= (0x03 << (devno << 1));
1377 pci_write_config(parent, 0x54, reg54, 1);
1378 pci_write_config(parent, 0x4a, 0xa6, 1);
1379 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
1380 ata_dmacreate(atadev, apiomode, ATA_UDMA2);
1381 return;
1382 }
1383 }
1384 if (wdmamode >= 2 && apiomode >= 4) {
1385 error = ata_command(atadev, ATA_C_SETFEATURES, 0,
1386 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
1387 if (bootverbose)
1388 ata_prtdev(atadev, "%s setting up WDMA2 mode on Acard chip\n",
1389 (error) ? "failed" : "success");
1390 if (!error) {
1391 u_int8_t reg54 = pci_read_config(parent, 0x54, 1);
1392
1393 reg54 &= ~(0x03 << (devno << 1));
1394 pci_write_config(parent, 0x54, reg54, 1);
1395 pci_write_config(parent, 0x4a, 0xa6, 1);
1396 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
1397 ata_dmacreate(atadev, apiomode, ATA_WDMA2);
1398 return;
1399 }
1400 }
1401 /* we could set PIO mode timings, but we assume the BIOS did that */
1402 break;
1403
1262 case 0x000116ca: /* Cenatek Rocket Drive controller */
1263 if (wdmamode >= 0 &&
1264 (ATA_INB(atadev->channel->r_bmio, ATA_BMSTAT_PORT) &
1265 (device ? ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER)))
1266 ata_dmacreate(atadev, apiomode, ATA_DMA);
1267 else
1268 atadev->mode = ATA_PIO;
1269 return;

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1404 case 0x000116ca: /* Cenatek Rocket Drive controller */
1405 if (wdmamode >= 0 &&
1406 (ATA_INB(atadev->channel->r_bmio, ATA_BMSTAT_PORT) &
1407 (device ? ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER)))
1408 ata_dmacreate(atadev, apiomode, ATA_DMA);
1409 else
1410 atadev->mode = ATA_PIO;
1411 return;

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