1/*-
2 * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 77905 2001-06-08 09:51:33Z sos $
29 */
30
31#include "pci.h"
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/ata.h>
35#include <sys/bio.h>
36#include <sys/malloc.h>

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49static void promise_timing(struct ata_softc *, int, int);
50static void hpt_timing(struct ata_softc *, int, int);
51
52/* misc defines */
53#ifdef __alpha__
54#undef vtophys
55#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
56#endif
57
58void *
59ata_dmaalloc(struct ata_softc *scp, int device)
60{
61 void *dmatab;
62
63 if ((dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) {
64 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
65 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {

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713 pci_write_config(parent, 0x44, 0x20, 4);
714 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
715 return;
716 }
717 }
718 /* we could set PIO mode timings, but we assume the BIOS did that */
719 break;
720
721 case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */
722 case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */
723 case 0x4d30105a: /* Promise Ultra/FastTrak 100 controllers */
724 case 0x0d30105a: /* Promise OEM ATA100 controllers */
725 case 0x4d68105a: /* Promise TX2 ATA100 controllers */
726 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
727 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
728 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
729 break;
730
731 if (udmamode >= 5 && (scp->chiptype == 0x4d30105a ||
732 scp->chiptype == 0x0d30105a || scp->chiptype == 0x4d68105a) &&
733 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
734 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
735 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
736 if (bootverbose)
737 ata_printf(scp, device,
738 "%s setting UDMA5 on Promise chip\n",
739 (error) ? "failed" : "success");
740 if (!error) {
741 promise_timing(scp, devno, ATA_UDMA5);
742 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
743 return;
744 }
745 }
746 if (udmamode >= 4 &&
747 (scp->chiptype == 0x4d38105a || scp->chiptype == 0x4d30105a ||
748 scp->chiptype == 0x0d30105a || scp->chiptype == 0x4d68105a) &&
749 !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
750 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
751 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
752 if (bootverbose)
753 ata_printf(scp, device,
754 "%s setting UDMA4 on Promise chip\n",
755 (error) ? "failed" : "success");
756 if (!error) {
757 promise_timing(scp, devno, ATA_UDMA4);
758 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
759 return;
760 }
761 }
762 if (udmamode >= 2) {
763 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
764 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
765 if (bootverbose)
766 ata_printf(scp, device,
767 "%s setting UDMA2 on Promise chip\n",
768 (error) ? "failed" : "success");
769 if (!error) {
770 promise_timing(scp, devno, ATA_UDMA2);
771 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
772 return;
773 }
774 }
775 if (wdmamode >= 2 && apiomode >= 4) {
776 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
777 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
778 if (bootverbose)
779 ata_printf(scp, device,
780 "%s setting WDMA2 on Promise chip\n",
781 (error) ? "failed" : "success");
782 if (!error) {
783 promise_timing(scp, devno, ATA_WDMA2);

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793 "%s setting PIO%d on Promise chip\n",
794 (error) ? "failed" : "success",
795 (apiomode >= 0) ? apiomode : 0);
796 promise_timing(scp, devno, ata_pio2mode(apiomode));
797 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
798 return;
799
800 case 0x00041103: /* HighPoint HPT366/368/370 controllers */
801 /* no ATAPI devices for now */
802 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
803 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
804 break;
805
806 if (udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
807 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
808 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
809 ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
810 if (bootverbose)
811 ata_printf(scp, device,
812 "%s setting UDMA5 on HighPoint chip\n",
813 (error) ? "failed" : "success");
814 if (!error) {
815 hpt_timing(scp, devno, ATA_UDMA5);
816 scp->mode[ATA_DEV(device)] = ATA_UDMA5;
817 return;
818 }
819 }
820 if (udmamode >=4 &&
821 !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
822 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
823 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
824 if (bootverbose)
825 ata_printf(scp, device,
826 "%s setting UDMA4 on HighPoint chip\n",
827 (error) ? "failed" : "success");
828 if (!error) {
829 hpt_timing(scp, devno, ATA_UDMA4);
830 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
831 return;
832 }
833 }
834 if (udmamode >= 2) {
835 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
836 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
837 if (bootverbose)
838 ata_printf(scp, device,
839 "%s setting UDMA2 on HighPoint chip\n",
840 (error) ? "failed" : "success");
841 if (!error) {
842 hpt_timing(scp, devno, ATA_UDMA2);
843 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
844 return;
845 }
846 }
847 if (wdmamode >= 2 && apiomode >= 4) {
848 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
849 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
850 if (bootverbose)
851 ata_printf(scp, device,
852 "%s setting WDMA2 on HighPoint chip\n",
853 (error) ? "failed" : "success");
854 if (!error) {
855 hpt_timing(scp, devno, ATA_WDMA2);

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1043 case ATA_UDMA2: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break;
1044 }
1045 break;
1046
1047 case 0x4d38105a: /* Promise Ultra/Fasttrak 66 */
1048 case 0x4d30105a: /* Promise Ultra/Fasttrak 100 */
1049 case 0x0d30105a: /* Promise OEM ATA 100 */
1050 case 0x4d68105a: /* Promise TX2 ATA 100 */
1051 switch (mode) {
1052 default:
1053 case ATA_PIO0: t->pa = 15; t->pb = 31; t->mb = 7; t->mc = 15; break;
1054 case ATA_PIO1: t->pa = 10; t->pb = 24; t->mb = 7; t->mc = 15; break;
1055 case ATA_PIO2: t->pa = 6; t->pb = 16; t->mb = 7; t->mc = 15; break;
1056 case ATA_PIO3: t->pa = 4; t->pb = 12; t->mb = 7; t->mc = 15; break;
1057 case ATA_PIO4: t->pa = 2; t->pb = 8; t->mb = 7; t->mc = 15; break;
1058 case ATA_WDMA2: t->pa = 6; t->pb = 14; t->mb = 6; t->mc = 6; break;

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