1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 11 unchanged lines hidden (view full) ---
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 56558 2000-01-24 20:45:24Z sos $
29 */
30
31#include "pci.h"
32#include "apm.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/buf.h>
36#include <sys/malloc.h>
--- 11 unchanged lines hidden (view full) ---
48#include <dev/ata/ata-all.h>
49#include <dev/ata/ata-disk.h>
50
51/* prototypes */
52static void promise_timing(struct ata_softc *, int32_t, int32_t);
53static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
54
55/* misc defines */
56#ifdef __alpha__
57#undef vtophys
58#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
59#endif
60
61#if NPCI > 0
62
63int32_t
64ata_dmainit(struct ata_softc *scp, int32_t device,
65 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
66{
67 int32_t devno = (scp->unit << 1) + ATA_DEV(device);
68 int32_t error;
69
70 if (!scp->bmaddr)
71 return -1;
72
73 /* if simplex controller, only allow DMA on primary channel */
74 if (scp->unit == 1) {
75 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
76 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
77 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
78 ata_printf(scp, device, "simplex device, DMA on primary only\n");
79 return -1;
80 }
81 }
82
83 if (!scp->dmatab[ATA_DEV(device)]) {
84 void *dmatab;
85
86 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
87 return -1;
88 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
89 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
90 ata_printf(scp, device, "dmatab crosses page boundary, no DMA\n");
91 free(dmatab, M_DEVBUF);
92 return -1;
93 }
94 scp->dmatab[ATA_DEV(device)] = dmatab;
95 }
96
97 switch (scp->chiptype) {
98
99 case 0x71118086: /* Intel PIIX4 */
100 case 0x71998086: /* Intel PIIX4e */
101 case 0x24118086: /* Intel ICH */
102 case 0x24218086: /* Intel ICH0 */
103 if (udmamode >= 2) {
104 int32_t mask48, new48;
105
106 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
107 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
108 if (bootverbose)
109 ata_printf(scp, device, "%s setting up UDMA2 mode on %s chip\n",
110 (error) ? "failed" : "success",
111 (scp->chiptype == 0x24118086) ? "ICH" :
112 (scp->chiptype == 0x24218086) ? "ICH0" :"PIIX4");
113 if (!error) {
114 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
115 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
116 pci_write_config(scp->dev, 0x48,
117 (pci_read_config(scp->dev, 0x48, 4) &
118 ~mask48) | new48, 4);
119 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
120 return 0;
121 }
122 }
123 /* FALLTHROUGH */
124
125 case 0x70108086: /* Intel PIIX3 */
126 if (wdmamode >= 2 && apiomode >= 4) {
127 int32_t mask40, new40, mask44, new44;
--- 12 unchanged lines hidden (view full) ---
140 }
141 new40 |= 0x40004000;
142 pci_write_config(scp->dev, 0x40, new40, 4);
143 pci_write_config(scp->dev, 0x44, new44, 4);
144 }
145 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
146 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
147 if (bootverbose)
148 ata_printf(scp, device, "%s setting up WDMA2 mode on %s chip\n",
149 (error) ? "failed" : "success",
150 (scp->chiptype == 0x70108086) ? "PIIX3" :
151 (scp->chiptype == 0x24118086) ? "ICH" :
152 (scp->chiptype == 0x24218086) ? "ICH0" :"PIIX4");
153 if (!error) {
154 if (device == ATA_MASTER) {
155 mask40 = 0x0000330f;
156 new40 = 0x00002307;
157 mask44 = 0;
158 new44 = 0;
159 }
160 else {
--- 9 unchanged lines hidden (view full) ---
170 new44 <<= 4;
171 }
172 pci_write_config(scp->dev, 0x40,
173 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)|
174 new40, 4);
175 pci_write_config(scp->dev, 0x44,
176 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)|
177 new44, 4);
178 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
179 return 0;
180 }
181 }
182 /* we could set PIO mode timings, but we assume the BIOS did that */
183 break;
184
185 case 0x12308086: /* Intel PIIX */
186 if (wdmamode >= 2 && apiomode >= 4) {
--- 5 unchanged lines hidden (view full) ---
192 /* Check for timing config usable for DMA on controller */
193 if (!((word40 & 0x3300) == 0x2300 &&
194 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
195 break;
196
197 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
198 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
199 if (bootverbose)
200 ata_printf(scp, device,
201 "%s setting up WDMA2 mode on PIIX chip\n",
202 (error) ? "failed" : "success");
203 if (!error) {
204 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
205 return 0;
206 }
207 }
208 break;
209
210 case 0x522910b9: /* AcerLabs Aladdin IV/V */
211 /* the Aladdin doesn't support ATAPI DMA on both master & slave */
212 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) {
213 ata_printf(scp, device,
214 "Aladdin: two atapi devices on this channel, no DMA\n");
215 break;
216 }
217 if (udmamode >= 2) {
218 int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
219
220 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
221 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
222 if (bootverbose)
223 ata_printf(scp, device,
224 "%s setting up UDMA2 mode on Aladdin chip\n",
225 (error) ? "failed" : "success");
226 if (!error) {
227 word54 |= 0x5555;
228 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
229 pci_write_config(scp->dev, 0x54, word54, 4);
230 pci_write_config(scp->dev, 0x53,
231 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
232 scp->flags |= ATA_ATAPI_DMA_RO;
233 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
234 return 0;
235 }
236 }
237 if (wdmamode >= 2 && apiomode >= 4) {
238 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
239 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
240 if (bootverbose)
241 ata_printf(scp, device,
242 "%s setting up WDMA2 mode on Aladdin chip\n",
243 (error) ? "failed" : "success");
244 if (!error) {
245 pci_write_config(scp->dev, 0x53,
246 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
247 scp->flags |= ATA_ATAPI_DMA_RO;
248 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
249 return 0;
250 }
251 }
252 /* we could set PIO mode timings, but we assume the BIOS did that */
253 break;
254
255 case 0x05711106: /* VIA 82C571, 82C586, 82C596 & 82C686 */
256 case 0x74091022: /* AMD 756 */
257 /* UDMA modes on 82C686 */
258 if (ata_find_dev(scp->dev, 0x06861106)) {
259 if (udmamode >= 4) {
260 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
261 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
262 if (bootverbose)
263 ata_printf(scp, device, "%s setting up UDMA4 mode on VIA chip\n",
264 (error) ? "failed" : "success");
265 if (!error) {
266 pci_write_config(scp->dev, 0x53 - devno, 0xe8, 1);
267 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
268 return 0;
269 }
270 }
271 if (udmamode >= 2) {
272 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
273 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
274 if (bootverbose)
275 ata_printf(scp, device,
276 "%s setting up UDMA2 mode on VIA chip\n",
277 (error) ? "failed" : "success");
278 if (!error) {
279 pci_write_config(scp->dev, 0x53 - devno, 0xea, 1);
280 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
281 return 0;
282 }
283 }
284 }
285
286 /* UDMA4 mode on AMD 756 */
287 if (udmamode >= 4 && scp->chiptype == 0x74091022) {
288 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
289 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
290 if (bootverbose)
291 ata_printf(scp, device,
292 "%s setting up UDMA4 mode on AMD chip\n",
293 (error) ? "failed" : "success");
294 if (!error) {
295 pci_write_config(scp->dev, 0x53 - devno, 0xc3, 1);
296 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
297 return 0;
298 }
299 }
300
301 /* UDMA2 mode only on 82C586 > rev1, 82C596, AMD 756 */
302 if ((udmamode >= 2 && ata_find_dev(scp->dev, 0x05861106) &&
303 pci_read_config(scp->dev, 0x08, 1) >= 0x01) ||
304 (udmamode >= 2 && ata_find_dev(scp->dev, 0x05961106)) ||
305 (udmamode >= 2 && scp->chiptype == 0x74091022)) {
306 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
307 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
308 if (bootverbose)
309 ata_printf(scp, device, "%s setting up UDMA2 mode on %s chip\n",
310 (error) ? "failed" : "success",
311 (scp->chiptype == 0x74091022) ? "AMD" : "VIA");
312 if (!error) {
313 pci_write_config(scp->dev, 0x53 - devno, 0xc0, 1);
314 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
315 return 0;
316 }
317 }
318 if (wdmamode >= 2 && apiomode >= 4) {
319 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
320 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
321 if (bootverbose)
322 ata_printf(scp, device, "%s setting up WDMA2 mode on %s chip\n",
323 (error) ? "failed" : "success",
324 (scp->chiptype == 0x74091022) ? "AMD" : "VIA");
325 if (!error) {
326 pci_write_config(scp->dev, 0x53 - devno, 0x82, 1);
327 pci_write_config(scp->dev, 0x4b - devno, 0x31, 1);
328 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
329 return 0;
330 }
331 }
332 /* we could set PIO mode timings, but we assume the BIOS did that */
333 break;
334
335 case 0x55131039: /* SiS 5591 */
336 if (udmamode >= 2) {
337 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
338 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
339 if (bootverbose)
340 ata_printf(scp, device,
341 "%s setting up UDMA2 mode on SiS chip\n",
342 (error) ? "failed" : "success");
343 if (!error) {
344 pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2);
345 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
346 return 0;
347 }
348 }
349 if (wdmamode >=2 && apiomode >= 4) {
350 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
351 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
352 if (bootverbose)
353 ata_printf(scp, device,
354 "%s setting up WDMA2 mode on SiS chip\n",
355 (error) ? "failed" : "success");
356 if (!error) {
357 pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2);
358 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
359 return 0;
360 }
361 }
362 /* we could set PIO mode timings, but we assume the BIOS did that */
363 break;
364
365 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */
366 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */
367 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
368 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
369 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
370 break;
371
372 if (udmamode >=4 && scp->chiptype == 0x4d38105a &&
373 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
374 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
375 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
376 if (bootverbose)
377 ata_printf(scp, device,
378 "%s setting up UDMA4 mode on Promise chip\n",
379 (error) ? "failed" : "success");
380 if (!error) {
381 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2);
382 promise_timing(scp, devno, ATA_UDMA4);
383 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
384 return 0;
385 }
386 }
387 if (udmamode >= 2) {
388 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
389 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
390 if (bootverbose)
391 ata_printf(scp, device,
392 "%s setting up UDMA2 mode on Promise chip\n",
393 (error) ? "failed" : "success");
394 if (!error) {
395 promise_timing(scp, devno, ATA_UDMA2);
396 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
397 return 0;
398 }
399 }
400 if (wdmamode >= 2 && apiomode >= 4) {
401 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
402 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
403 if (bootverbose)
404 ata_printf(scp, device,
405 "%s setting up WDMA2 mode on Promise chip\n",
406 (error) ? "failed" : "success");
407 if (!error) {
408 promise_timing(scp, devno, ATA_WDMA2);
409 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
410 return 0;
411 }
412 }
413 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
414 ata_pio2mode(apiomode),
415 ATA_C_F_SETXFER, ATA_WAIT_READY);
416 if (bootverbose)
417 ata_printf(scp, device,
418 "%s setting up PIO%d mode on Promise chip\n",
419 (error) ? "failed" : "success",
420 (apiomode >= 0) ? apiomode : 0);
421 if (!error) {
422 promise_timing(scp, devno, ata_pio2mode(apiomode));
423 return 0;
424 }
425 break;
426
427 case 0x00041103: /* HighPoint HPT366 controller */
428 /* no ATAPI devices for now */
429 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
430 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
431 break;
432
433 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
434 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
435 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
436 if (bootverbose)
437 ata_printf(scp, device,
438 "%s setting up UDMA4 mode on HPT366 chip\n",
439 (error) ? "failed" : "success");
440 if (!error) {
441 hpt366_timing(scp, devno, ATA_UDMA4);
442 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
443 return 0;
444 }
445 }
446 if (udmamode >= 2) {
447 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
448 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
449 if (bootverbose)
450 ata_printf(scp, device,
451 "%s setting up UDMA2 mode on HPT366 chip\n",
452 (error) ? "failed" : "success");
453 if (!error) {
454 hpt366_timing(scp, devno, ATA_UDMA2);
455 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
456 return 0;
457 }
458 }
459 if (wdmamode >= 2 && apiomode >= 4) {
460 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
461 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
462 if (bootverbose)
463 ata_printf(scp, device,
464 "%s setting up WDMA2 mode on HPT366 chip\n",
465 (error) ? "failed" : "success");
466 if (!error) {
467 hpt366_timing(scp, devno, ATA_WDMA2);
468 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
469 return 0;
470 }
471 }
472 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
473 ata_pio2mode(apiomode),
474 ATA_C_F_SETXFER, ATA_WAIT_READY);
475 if (bootverbose)
476 ata_printf(scp, device, "%s setting up PIO%d mode on HPT366 chip\n",
477 (error) ? "failed" : "success",
478 (apiomode >= 0) ? apiomode : 0);
479 if (!error) {
480 hpt366_timing(scp, devno, ata_pio2mode(apiomode));
481 return 0;
482 }
483 break;
484
485 default: /* unknown controller chip */
486 /* better not try generic DMA on ATAPI devices it almost never works */
--- 6 unchanged lines hidden (view full) ---
493#if MAYBE_NOT
494 && (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
495 ((device == ATA_MASTER) ?
496 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) {
497#endif
498 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
499 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
500 if (bootverbose)
501 ata_printf(scp, device,
502 "%s setting up WDMA2 mode on generic chip\n",
503 (error) ? "failed" : "success");
504 if (!error) {
505 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
506 return 0;
507 }
508 }
509 }
510 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
511 ata_pio2mode(apiomode), ATA_C_F_SETXFER,ATA_WAIT_READY);
512 if (bootverbose)
513 ata_printf(scp, device, "%s setting up PIO%d mode on generic chip\n",
514 (error) ? "failed" : "success",(apiomode>=0) ? apiomode : 0);
515 if (!error)
516 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
517 return -1;
518}
519
520int32_t
521ata_dmasetup(struct ata_softc *scp, int32_t device,
522 int8_t *data, int32_t count, int32_t flags)
523{
524 struct ata_dmaentry *dmatab;
525 u_int32_t dma_count, dma_base;
526 int32_t i = 0;
527
528 if (((uintptr_t)data & 1) || (count & 1))
529 return -1;
530
531 if (!count) {
532 ata_printf(scp, device, "zero length DMA transfer attempted\n");
533 return -1;
534 }
535
536 dmatab = scp->dmatab[ATA_DEV(device)];
537 dma_base = vtophys(data);
538 dma_count = min(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
539 data += dma_count;
540 count -= dma_count;
541
542 while (count) {
543 dmatab[i].base = dma_base;
544 dmatab[i].count = (dma_count & 0xffff);
545 i++;
546 if (i >= ATA_DMA_ENTRIES) {
547 ata_printf(scp, device, "too many segments in DMA table\n");
548 return -1;
549 }
550 dma_base = vtophys(data);
551 dma_count = min(count, PAGE_SIZE);
552 data += min(count, PAGE_SIZE);
553 count -= min(count, PAGE_SIZE);
554 }
555 dmatab[i].base = dma_base;
556 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
557 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
558 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
559 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
560 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
561 return 0;
--- 126 unchanged lines hidden ---
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 11 unchanged lines hidden (view full) ---
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 56558 2000-01-24 20:45:24Z sos $
29 */
30
31#include "pci.h"
32#include "apm.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/buf.h>
36#include <sys/malloc.h>
--- 11 unchanged lines hidden (view full) ---
48#include <dev/ata/ata-all.h>
49#include <dev/ata/ata-disk.h>
50
51/* prototypes */
52static void promise_timing(struct ata_softc *, int32_t, int32_t);
53static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
54
55/* misc defines */
56#ifdef __alpha__
57#undef vtophys
58#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
59#endif
60
61#if NPCI > 0
62
63int32_t
64ata_dmainit(struct ata_softc *scp, int32_t device,
65 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
66{
67 int32_t devno = (scp->unit << 1) + ATA_DEV(device);
68 int32_t error;
69
70 if (!scp->bmaddr)
71 return -1;
72
73 /* if simplex controller, only allow DMA on primary channel */
74 if (scp->unit == 1) {
75 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
76 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
77 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
78 ata_printf(scp, device, "simplex device, DMA on primary only\n");
79 return -1;
80 }
81 }
82
83 if (!scp->dmatab[ATA_DEV(device)]) {
84 void *dmatab;
85
86 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
87 return -1;
88 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
89 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
90 ata_printf(scp, device, "dmatab crosses page boundary, no DMA\n");
91 free(dmatab, M_DEVBUF);
92 return -1;
93 }
94 scp->dmatab[ATA_DEV(device)] = dmatab;
95 }
96
97 switch (scp->chiptype) {
98
99 case 0x71118086: /* Intel PIIX4 */
100 case 0x71998086: /* Intel PIIX4e */
101 case 0x24118086: /* Intel ICH */
102 case 0x24218086: /* Intel ICH0 */
103 if (udmamode >= 2) {
104 int32_t mask48, new48;
105
106 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
107 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
108 if (bootverbose)
109 ata_printf(scp, device, "%s setting up UDMA2 mode on %s chip\n",
110 (error) ? "failed" : "success",
111 (scp->chiptype == 0x24118086) ? "ICH" :
112 (scp->chiptype == 0x24218086) ? "ICH0" :"PIIX4");
113 if (!error) {
114 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
115 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
116 pci_write_config(scp->dev, 0x48,
117 (pci_read_config(scp->dev, 0x48, 4) &
118 ~mask48) | new48, 4);
119 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
120 return 0;
121 }
122 }
123 /* FALLTHROUGH */
124
125 case 0x70108086: /* Intel PIIX3 */
126 if (wdmamode >= 2 && apiomode >= 4) {
127 int32_t mask40, new40, mask44, new44;
--- 12 unchanged lines hidden (view full) ---
140 }
141 new40 |= 0x40004000;
142 pci_write_config(scp->dev, 0x40, new40, 4);
143 pci_write_config(scp->dev, 0x44, new44, 4);
144 }
145 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
146 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
147 if (bootverbose)
148 ata_printf(scp, device, "%s setting up WDMA2 mode on %s chip\n",
149 (error) ? "failed" : "success",
150 (scp->chiptype == 0x70108086) ? "PIIX3" :
151 (scp->chiptype == 0x24118086) ? "ICH" :
152 (scp->chiptype == 0x24218086) ? "ICH0" :"PIIX4");
153 if (!error) {
154 if (device == ATA_MASTER) {
155 mask40 = 0x0000330f;
156 new40 = 0x00002307;
157 mask44 = 0;
158 new44 = 0;
159 }
160 else {
--- 9 unchanged lines hidden (view full) ---
170 new44 <<= 4;
171 }
172 pci_write_config(scp->dev, 0x40,
173 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)|
174 new40, 4);
175 pci_write_config(scp->dev, 0x44,
176 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)|
177 new44, 4);
178 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
179 return 0;
180 }
181 }
182 /* we could set PIO mode timings, but we assume the BIOS did that */
183 break;
184
185 case 0x12308086: /* Intel PIIX */
186 if (wdmamode >= 2 && apiomode >= 4) {
--- 5 unchanged lines hidden (view full) ---
192 /* Check for timing config usable for DMA on controller */
193 if (!((word40 & 0x3300) == 0x2300 &&
194 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
195 break;
196
197 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
198 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
199 if (bootverbose)
200 ata_printf(scp, device,
201 "%s setting up WDMA2 mode on PIIX chip\n",
202 (error) ? "failed" : "success");
203 if (!error) {
204 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
205 return 0;
206 }
207 }
208 break;
209
210 case 0x522910b9: /* AcerLabs Aladdin IV/V */
211 /* the Aladdin doesn't support ATAPI DMA on both master & slave */
212 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) {
213 ata_printf(scp, device,
214 "Aladdin: two atapi devices on this channel, no DMA\n");
215 break;
216 }
217 if (udmamode >= 2) {
218 int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
219
220 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
221 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
222 if (bootverbose)
223 ata_printf(scp, device,
224 "%s setting up UDMA2 mode on Aladdin chip\n",
225 (error) ? "failed" : "success");
226 if (!error) {
227 word54 |= 0x5555;
228 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
229 pci_write_config(scp->dev, 0x54, word54, 4);
230 pci_write_config(scp->dev, 0x53,
231 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
232 scp->flags |= ATA_ATAPI_DMA_RO;
233 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
234 return 0;
235 }
236 }
237 if (wdmamode >= 2 && apiomode >= 4) {
238 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
239 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
240 if (bootverbose)
241 ata_printf(scp, device,
242 "%s setting up WDMA2 mode on Aladdin chip\n",
243 (error) ? "failed" : "success");
244 if (!error) {
245 pci_write_config(scp->dev, 0x53,
246 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
247 scp->flags |= ATA_ATAPI_DMA_RO;
248 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
249 return 0;
250 }
251 }
252 /* we could set PIO mode timings, but we assume the BIOS did that */
253 break;
254
255 case 0x05711106: /* VIA 82C571, 82C586, 82C596 & 82C686 */
256 case 0x74091022: /* AMD 756 */
257 /* UDMA modes on 82C686 */
258 if (ata_find_dev(scp->dev, 0x06861106)) {
259 if (udmamode >= 4) {
260 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
261 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
262 if (bootverbose)
263 ata_printf(scp, device, "%s setting up UDMA4 mode on VIA chip\n",
264 (error) ? "failed" : "success");
265 if (!error) {
266 pci_write_config(scp->dev, 0x53 - devno, 0xe8, 1);
267 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
268 return 0;
269 }
270 }
271 if (udmamode >= 2) {
272 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
273 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
274 if (bootverbose)
275 ata_printf(scp, device,
276 "%s setting up UDMA2 mode on VIA chip\n",
277 (error) ? "failed" : "success");
278 if (!error) {
279 pci_write_config(scp->dev, 0x53 - devno, 0xea, 1);
280 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
281 return 0;
282 }
283 }
284 }
285
286 /* UDMA4 mode on AMD 756 */
287 if (udmamode >= 4 && scp->chiptype == 0x74091022) {
288 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
289 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
290 if (bootverbose)
291 ata_printf(scp, device,
292 "%s setting up UDMA4 mode on AMD chip\n",
293 (error) ? "failed" : "success");
294 if (!error) {
295 pci_write_config(scp->dev, 0x53 - devno, 0xc3, 1);
296 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
297 return 0;
298 }
299 }
300
301 /* UDMA2 mode only on 82C586 > rev1, 82C596, AMD 756 */
302 if ((udmamode >= 2 && ata_find_dev(scp->dev, 0x05861106) &&
303 pci_read_config(scp->dev, 0x08, 1) >= 0x01) ||
304 (udmamode >= 2 && ata_find_dev(scp->dev, 0x05961106)) ||
305 (udmamode >= 2 && scp->chiptype == 0x74091022)) {
306 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
307 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
308 if (bootverbose)
309 ata_printf(scp, device, "%s setting up UDMA2 mode on %s chip\n",
310 (error) ? "failed" : "success",
311 (scp->chiptype == 0x74091022) ? "AMD" : "VIA");
312 if (!error) {
313 pci_write_config(scp->dev, 0x53 - devno, 0xc0, 1);
314 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
315 return 0;
316 }
317 }
318 if (wdmamode >= 2 && apiomode >= 4) {
319 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
320 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
321 if (bootverbose)
322 ata_printf(scp, device, "%s setting up WDMA2 mode on %s chip\n",
323 (error) ? "failed" : "success",
324 (scp->chiptype == 0x74091022) ? "AMD" : "VIA");
325 if (!error) {
326 pci_write_config(scp->dev, 0x53 - devno, 0x82, 1);
327 pci_write_config(scp->dev, 0x4b - devno, 0x31, 1);
328 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
329 return 0;
330 }
331 }
332 /* we could set PIO mode timings, but we assume the BIOS did that */
333 break;
334
335 case 0x55131039: /* SiS 5591 */
336 if (udmamode >= 2) {
337 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
338 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
339 if (bootverbose)
340 ata_printf(scp, device,
341 "%s setting up UDMA2 mode on SiS chip\n",
342 (error) ? "failed" : "success");
343 if (!error) {
344 pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2);
345 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
346 return 0;
347 }
348 }
349 if (wdmamode >=2 && apiomode >= 4) {
350 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
351 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
352 if (bootverbose)
353 ata_printf(scp, device,
354 "%s setting up WDMA2 mode on SiS chip\n",
355 (error) ? "failed" : "success");
356 if (!error) {
357 pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2);
358 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
359 return 0;
360 }
361 }
362 /* we could set PIO mode timings, but we assume the BIOS did that */
363 break;
364
365 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */
366 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */
367 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
368 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
369 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
370 break;
371
372 if (udmamode >=4 && scp->chiptype == 0x4d38105a &&
373 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
374 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
375 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
376 if (bootverbose)
377 ata_printf(scp, device,
378 "%s setting up UDMA4 mode on Promise chip\n",
379 (error) ? "failed" : "success");
380 if (!error) {
381 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2);
382 promise_timing(scp, devno, ATA_UDMA4);
383 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
384 return 0;
385 }
386 }
387 if (udmamode >= 2) {
388 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
389 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
390 if (bootverbose)
391 ata_printf(scp, device,
392 "%s setting up UDMA2 mode on Promise chip\n",
393 (error) ? "failed" : "success");
394 if (!error) {
395 promise_timing(scp, devno, ATA_UDMA2);
396 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
397 return 0;
398 }
399 }
400 if (wdmamode >= 2 && apiomode >= 4) {
401 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
402 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
403 if (bootverbose)
404 ata_printf(scp, device,
405 "%s setting up WDMA2 mode on Promise chip\n",
406 (error) ? "failed" : "success");
407 if (!error) {
408 promise_timing(scp, devno, ATA_WDMA2);
409 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
410 return 0;
411 }
412 }
413 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
414 ata_pio2mode(apiomode),
415 ATA_C_F_SETXFER, ATA_WAIT_READY);
416 if (bootverbose)
417 ata_printf(scp, device,
418 "%s setting up PIO%d mode on Promise chip\n",
419 (error) ? "failed" : "success",
420 (apiomode >= 0) ? apiomode : 0);
421 if (!error) {
422 promise_timing(scp, devno, ata_pio2mode(apiomode));
423 return 0;
424 }
425 break;
426
427 case 0x00041103: /* HighPoint HPT366 controller */
428 /* no ATAPI devices for now */
429 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
430 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
431 break;
432
433 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
434 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
435 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
436 if (bootverbose)
437 ata_printf(scp, device,
438 "%s setting up UDMA4 mode on HPT366 chip\n",
439 (error) ? "failed" : "success");
440 if (!error) {
441 hpt366_timing(scp, devno, ATA_UDMA4);
442 scp->mode[ATA_DEV(device)] = ATA_UDMA4;
443 return 0;
444 }
445 }
446 if (udmamode >= 2) {
447 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
448 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
449 if (bootverbose)
450 ata_printf(scp, device,
451 "%s setting up UDMA2 mode on HPT366 chip\n",
452 (error) ? "failed" : "success");
453 if (!error) {
454 hpt366_timing(scp, devno, ATA_UDMA2);
455 scp->mode[ATA_DEV(device)] = ATA_UDMA2;
456 return 0;
457 }
458 }
459 if (wdmamode >= 2 && apiomode >= 4) {
460 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
461 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
462 if (bootverbose)
463 ata_printf(scp, device,
464 "%s setting up WDMA2 mode on HPT366 chip\n",
465 (error) ? "failed" : "success");
466 if (!error) {
467 hpt366_timing(scp, devno, ATA_WDMA2);
468 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
469 return 0;
470 }
471 }
472 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
473 ata_pio2mode(apiomode),
474 ATA_C_F_SETXFER, ATA_WAIT_READY);
475 if (bootverbose)
476 ata_printf(scp, device, "%s setting up PIO%d mode on HPT366 chip\n",
477 (error) ? "failed" : "success",
478 (apiomode >= 0) ? apiomode : 0);
479 if (!error) {
480 hpt366_timing(scp, devno, ata_pio2mode(apiomode));
481 return 0;
482 }
483 break;
484
485 default: /* unknown controller chip */
486 /* better not try generic DMA on ATAPI devices it almost never works */
--- 6 unchanged lines hidden (view full) ---
493#if MAYBE_NOT
494 && (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
495 ((device == ATA_MASTER) ?
496 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) {
497#endif
498 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
499 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
500 if (bootverbose)
501 ata_printf(scp, device,
502 "%s setting up WDMA2 mode on generic chip\n",
503 (error) ? "failed" : "success");
504 if (!error) {
505 scp->mode[ATA_DEV(device)] = ATA_WDMA2;
506 return 0;
507 }
508 }
509 }
510 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
511 ata_pio2mode(apiomode), ATA_C_F_SETXFER,ATA_WAIT_READY);
512 if (bootverbose)
513 ata_printf(scp, device, "%s setting up PIO%d mode on generic chip\n",
514 (error) ? "failed" : "success",(apiomode>=0) ? apiomode : 0);
515 if (!error)
516 scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
517 return -1;
518}
519
520int32_t
521ata_dmasetup(struct ata_softc *scp, int32_t device,
522 int8_t *data, int32_t count, int32_t flags)
523{
524 struct ata_dmaentry *dmatab;
525 u_int32_t dma_count, dma_base;
526 int32_t i = 0;
527
528 if (((uintptr_t)data & 1) || (count & 1))
529 return -1;
530
531 if (!count) {
532 ata_printf(scp, device, "zero length DMA transfer attempted\n");
533 return -1;
534 }
535
536 dmatab = scp->dmatab[ATA_DEV(device)];
537 dma_base = vtophys(data);
538 dma_count = min(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
539 data += dma_count;
540 count -= dma_count;
541
542 while (count) {
543 dmatab[i].base = dma_base;
544 dmatab[i].count = (dma_count & 0xffff);
545 i++;
546 if (i >= ATA_DMA_ENTRIES) {
547 ata_printf(scp, device, "too many segments in DMA table\n");
548 return -1;
549 }
550 dma_base = vtophys(data);
551 dma_count = min(count, PAGE_SIZE);
552 data += min(count, PAGE_SIZE);
553 count -= min(count, PAGE_SIZE);
554 }
555 dmatab[i].base = dma_base;
556 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
557 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
558 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
559 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
560 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
561 return 0;
--- 126 unchanged lines hidden ---