| ata-all.h (104299) | ata-all.h (107562) |
|---|---|
| 1/*- 2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * | 1/*- 2 * Copyright (c) 1998,1999,2000,2001,2002 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * |
| 28 * $FreeBSD: head/sys/dev/ata/ata-all.h 104299 2002-10-01 15:21:57Z sos $ | 28 * $FreeBSD: head/sys/dev/ata/ata-all.h 107562 2002-12-03 20:20:44Z sos $ |
| 29 */ 30 31/* ATA register defines */ 32#define ATA_DATA 0x00 /* data register */ 33#define ATA_ERROR 0x01 /* (R) error register */ 34#define ATA_E_NM 0x02 /* no media */ 35#define ATA_E_ABORT 0x04 /* command aborted */ 36#define ATA_E_MCR 0x08 /* media change request */ --- 70 unchanged lines hidden (view full) --- 107#define ATA_S_DWF 0x20 /* drive write fault */ 108#define ATA_S_DMA 0x20 /* DMA ready */ 109#define ATA_S_READY 0x40 /* drive ready */ 110#define ATA_S_BUSY 0x80 /* busy */ 111 112#define ATA_ALTSTAT 0x00 /* alternate status register */ 113#define ATA_ALTOFFSET 0x206 /* alternate registers offset */ 114#define ATA_PCCARD_ALTOFFSET 0x0e /* do for PCCARD devices */ | 29 */ 30 31/* ATA register defines */ 32#define ATA_DATA 0x00 /* data register */ 33#define ATA_ERROR 0x01 /* (R) error register */ 34#define ATA_E_NM 0x02 /* no media */ 35#define ATA_E_ABORT 0x04 /* command aborted */ 36#define ATA_E_MCR 0x08 /* media change request */ --- 70 unchanged lines hidden (view full) --- 107#define ATA_S_DWF 0x20 /* drive write fault */ 108#define ATA_S_DMA 0x20 /* DMA ready */ 109#define ATA_S_READY 0x40 /* drive ready */ 110#define ATA_S_BUSY 0x80 /* busy */ 111 112#define ATA_ALTSTAT 0x00 /* alternate status register */ 113#define ATA_ALTOFFSET 0x206 /* alternate registers offset */ 114#define ATA_PCCARD_ALTOFFSET 0x0e /* do for PCCARD devices */ |
| 115#define ATA_PC98_ALTOFFSET 0x10c /* do for PC98 devices */ |
|
| 115#define ATA_A_IDS 0x02 /* disable interrupts */ 116#define ATA_A_RESET 0x04 /* RESET controller */ 117#define ATA_A_4BIT 0x08 /* 4 head bits */ 118 119/* misc defines */ 120#define ATA_PRIMARY 0x1f0 121#define ATA_SECONDARY 0x170 | 116#define ATA_A_IDS 0x02 /* disable interrupts */ 117#define ATA_A_RESET 0x04 /* RESET controller */ 118#define ATA_A_4BIT 0x08 /* 4 head bits */ 119 120/* misc defines */ 121#define ATA_PRIMARY 0x1f0 122#define ATA_SECONDARY 0x170 |
| 123#define ATA_PC98_BANK 0x432 |
|
| 122#define ATA_IOSIZE 0x08 123#define ATA_ALTIOSIZE 0x01 124#define ATA_BMIOSIZE 0x08 | 124#define ATA_IOSIZE 0x08 125#define ATA_ALTIOSIZE 0x01 126#define ATA_BMIOSIZE 0x08 |
| 127#define ATA_PC98_BANKIOSIZE 0x01 |
|
| 125#define ATA_OP_FINISHED 0x00 126#define ATA_OP_CONTINUES 0x01 127#define ATA_IOADDR_RID 0 128#define ATA_ALTADDR_RID 1 129#define ATA_BMADDR_RID 2 | 128#define ATA_OP_FINISHED 0x00 129#define ATA_OP_CONTINUES 0x01 130#define ATA_IOADDR_RID 0 131#define ATA_ALTADDR_RID 1 132#define ATA_BMADDR_RID 2 |
| 133#define ATA_PC98_ALTADDR_RID 8 134#define ATA_PC98_BANKADDR_RID 9 135 |
|
| 130#define ATA_IRQ_RID 0 131#define ATA_DEV(device) ((device == ATA_MASTER) ? 0 : 1) 132 133/* busmaster DMA related defines */ 134#define ATA_DMA_ENTRIES 256 135#define ATA_DMA_EOT 0x80000000 136 137#define ATA_BMCMD_PORT 0x00 --- 80 unchanged lines hidden (view full) --- 218 int devices; /* what is present */ 219#define ATA_ATA_MASTER 0x01 220#define ATA_ATA_SLAVE 0x02 221#define ATA_ATAPI_MASTER 0x04 222#define ATA_ATAPI_SLAVE 0x08 223 224 u_int8_t status; /* last controller status */ 225 u_int8_t error; /* last controller error */ | 136#define ATA_IRQ_RID 0 137#define ATA_DEV(device) ((device == ATA_MASTER) ? 0 : 1) 138 139/* busmaster DMA related defines */ 140#define ATA_DMA_ENTRIES 256 141#define ATA_DMA_EOT 0x80000000 142 143#define ATA_BMCMD_PORT 0x00 --- 80 unchanged lines hidden (view full) --- 224 int devices; /* what is present */ 225#define ATA_ATA_MASTER 0x01 226#define ATA_ATA_SLAVE 0x02 227#define ATA_ATAPI_MASTER 0x04 228#define ATA_ATAPI_SLAVE 0x08 229 230 u_int8_t status; /* last controller status */ 231 u_int8_t error; /* last controller error */ |
| 226 int active; /* active processing request */ | 232 int active; /* ATA channel state control */ |
| 227#define ATA_IDLE 0x0000 228#define ATA_IMMEDIATE 0x0001 229#define ATA_WAIT_INTR 0x0002 230#define ATA_WAIT_READY 0x0004 231#define ATA_WAIT_MASK 0x0007 232#define ATA_ACTIVE 0x0010 233#define ATA_ACTIVE_ATA 0x0020 234#define ATA_ACTIVE_ATAPI 0x0040 235#define ATA_CONTROL 0x0080 236 | 233#define ATA_IDLE 0x0000 234#define ATA_IMMEDIATE 0x0001 235#define ATA_WAIT_INTR 0x0002 236#define ATA_WAIT_READY 0x0004 237#define ATA_WAIT_MASK 0x0007 238#define ATA_ACTIVE 0x0010 239#define ATA_ACTIVE_ATA 0x0020 240#define ATA_ACTIVE_ATAPI 0x0040 241#define ATA_CONTROL 0x0080 242 |
| 243 void (*lock_func)(struct ata_channel *, int);/* controller lock function */ 244#define ATA_LF_LOCK 0x0001 245#define ATA_LF_UNLOCK 0x0002 246 |
|
| 237 TAILQ_HEAD(, ad_request) ata_queue; /* head of ATA queue */ 238 TAILQ_HEAD(, atapi_request) atapi_queue; /* head of ATAPI queue */ 239 void *running; /* currently running request */ 240}; 241 242/* disk bay/drawer related */ 243#define ATA_LED_OFF 0x00 244#define ATA_LED_RED 0x01 245#define ATA_LED_GREEN 0x02 246#define ATA_LED_ORANGE 0x03 247 248/* externs */ 249extern devclass_t ata_devclass; | 247 TAILQ_HEAD(, ad_request) ata_queue; /* head of ATA queue */ 248 TAILQ_HEAD(, atapi_request) atapi_queue; /* head of ATAPI queue */ 249 void *running; /* currently running request */ 250}; 251 252/* disk bay/drawer related */ 253#define ATA_LED_OFF 0x00 254#define ATA_LED_RED 0x01 255#define ATA_LED_GREEN 0x02 256#define ATA_LED_ORANGE 0x03 257 258/* externs */ 259extern devclass_t ata_devclass; |
| 260extern struct intr_config_hook *ata_delayed_attach; |
|
| 250 251/* public prototypes */ 252int ata_probe(device_t); 253int ata_attach(device_t); 254int ata_detach(device_t); 255int ata_resume(device_t); | 261 262/* public prototypes */ 263int ata_probe(device_t); 264int ata_attach(device_t); 265int ata_detach(device_t); 266int ata_resume(device_t); |
| 256 | |
| 257void ata_start(struct ata_channel *); 258void ata_reset(struct ata_channel *); 259int ata_reinit(struct ata_channel *); 260int ata_wait(struct ata_device *, u_int8_t); 261int ata_command(struct ata_device *, u_int8_t, u_int64_t, u_int16_t, u_int16_t, int); 262void ata_drawerleds(struct ata_device *, u_int8_t); 263int ata_printf(struct ata_channel *, int, const char *, ...) __printflike(3, 4); 264int ata_prtdev(struct ata_device *, const char *, ...) __printflike(2, 3); --- 13 unchanged lines hidden (view full) --- 278void ata_dmafreetags(struct ata_channel *); 279void ata_dmainit(struct ata_device *, int, int, int); 280int ata_dmasetup(struct ata_device *, caddr_t, int32_t); 281int ata_dmastart(struct ata_device *, caddr_t, int32_t, int); 282int ata_dmastatus(struct ata_channel *); 283int ata_dmadone(struct ata_device *); 284 285/* macros for locking a channel */ | 267void ata_start(struct ata_channel *); 268void ata_reset(struct ata_channel *); 269int ata_reinit(struct ata_channel *); 270int ata_wait(struct ata_device *, u_int8_t); 271int ata_command(struct ata_device *, u_int8_t, u_int64_t, u_int16_t, u_int16_t, int); 272void ata_drawerleds(struct ata_device *, u_int8_t); 273int ata_printf(struct ata_channel *, int, const char *, ...) __printflike(3, 4); 274int ata_prtdev(struct ata_device *, const char *, ...) __printflike(2, 3); --- 13 unchanged lines hidden (view full) --- 288void ata_dmafreetags(struct ata_channel *); 289void ata_dmainit(struct ata_device *, int, int, int); 290int ata_dmasetup(struct ata_device *, caddr_t, int32_t); 291int ata_dmastart(struct ata_device *, caddr_t, int32_t, int); 292int ata_dmastatus(struct ata_channel *); 293int ata_dmadone(struct ata_device *); 294 295/* macros for locking a channel */ |
| 286#define ATA_LOCK_CH(ch, value)\ 287 atomic_cmpset_int(&(ch)->active, ATA_IDLE, (value)) | 296#define ATA_LOCK_CH(ch, value) \ 297 atomic_cmpset_acq_int(&(ch)->active, ATA_IDLE, (value)) |
| 288 | 298 |
| 289#define ATA_SLEEPLOCK_CH(ch, value)\ 290 while (!atomic_cmpset_int(&(ch)->active, ATA_IDLE, (value)))\ | 299#define ATA_SLEEPLOCK_CH(ch, value) \ 300 while (!atomic_cmpset_acq_int(&(ch)->active, ATA_IDLE, (value))) \ |
| 291 tsleep((caddr_t)&(ch), PRIBIO, "atalck", 1); 292 | 301 tsleep((caddr_t)&(ch), PRIBIO, "atalck", 1); 302 |
| 293#define ATA_FORCELOCK_CH(ch, value)\ 294 (ch)->active = value; | 303#define ATA_FORCELOCK_CH(ch, value) atomic_store_rel_int(&(ch)->active, (value)) |
| 295 | 304 |
| 296#define ATA_UNLOCK_CH(ch)\ 297 (ch)->active = ATA_IDLE | 305#define ATA_UNLOCK_CH(ch) atomic_store_rel_int(&(ch)->active, ATA_IDLE) |
| 298 299/* macros to hide busspace uglyness */ 300#define ATA_INB(res, offset) \ 301 bus_space_read_1(rman_get_bustag((res)), \ 302 rman_get_bushandle((res)), (offset)) 303#define ATA_INW(res, offset) \ 304 bus_space_read_2(rman_get_bustag((res)), \ 305 rman_get_bushandle((res)), (offset)) --- 44 unchanged lines hidden --- | 306 307/* macros to hide busspace uglyness */ 308#define ATA_INB(res, offset) \ 309 bus_space_read_1(rman_get_bustag((res)), \ 310 rman_get_bushandle((res)), (offset)) 311#define ATA_INW(res, offset) \ 312 bus_space_read_2(rman_get_bustag((res)), \ 313 rman_get_bushandle((res)), (offset)) --- 44 unchanged lines hidden --- |