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< * $Id: ata-all.h,v 1.3 1999/03/05 09:43:30 sos Exp $
---
> * $Id: ata-all.h,v 1.4 1999/03/07 21:49:14 sos Exp $
34,35c34,39
< #define ATA_PRECOMP 0x01 /* (W) precompensation */
< #define ATA_COUNT 0x02 /* sector count */
---
> #define ATA_FEATURE 0x01 /* (W) feature register */
> #define ATA_F_DMA 0x01 /* enable DMA */
> #define ATA_F_OVL 0x02 /* enable overlap */
>
> #define ATA_COUNT 0x02 /* (W) sector count */
> #define ATA_IREASON 0x02 /* (R) interrupt reason */
38a43
> #define ATA_I_TAGMASK 0xf8 /* tag mask */
43a49
> #define ATA_D_LBA 0x40 /* use LBA adressing */
54c60,64
< #define ATA_C_PACKET_CMD 0xa0 /* set multi size command */
---
> #define ATA_C_READ_DMA 0xc8 /* read w/DMA command */
> #define ATA_C_WRITE_DMA 0xca /* write w/DMA command */
> #define ATA_C_PACKET_CMD 0xa0 /* packet command */
> #define ATA_C_SETFEATURES 0xef /* features command */
> #define ATA_C_FEA_SETXFER 0x03 /* set transfer mode */
61c71,72
< #define ATA_S_DSC 0x10 /* drive Seek Completed */
---
> #define ATA_S_DSC 0x10 /* drive seek completed */
> #define ATA_S_SERV 0x10 /* drive needs service */
62a74
> #define ATA_S_DMRD 0x20 /* DMA ready */
71c83
< /* Misc defines */
---
> /* misc defines */
78c90
< /* Devices types */
---
> /* devices types */
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< /* Structure describing an ATA device */
---
> /* busmaster DMA related defines */
> #define ATA_BM_OFFSET1 0x08
> #define ATA_DMA_ENTRIES 256
> #define ATA_DMA_EOT 0x80000000
>
> #define ATA_BMCMD_PORT 0x00
> #define ATA_BMCMD_START_STOP 0x01
> #define ATA_BMCMD_WRITE_READ 0x08
>
> #define ATA_BMSTAT_PORT 0x02
> #define ATA_BMSTAT_MASK 0x07
> #define ATA_BMSTAT_ACTIVE 0x01
> #define ATA_BMSTAT_ERROR 0x02
> #define ATA_BMSTAT_INTERRUPT 0x04
> #define ATA_BMSTAT_DMA_MASTER 0x20
> #define ATA_BMSTAT_DMA_SLAVE 0x40
>
> #define ATA_BMDTP_PORT 0x04
>
> #define ATA_WDMA2 0x22
> #define ATA_UDMA2 0x42
>
> /* structure for holding DMA address data */
> struct ata_dmaentry {
> u_int32_t base;
> u_int32_t count;
> };
>
> /* structure describing an ATA device */
86,89c126,132
< u_int32_t unit; /* this instance's number */
< u_int32_t ioaddr; /* port addr */
< u_int32_t altioaddr; /* alternate port addr */
< void *dmacookie; /* handle for DMA services */
---
> int32_t unit; /* unit on this controller */
> int32_t lun; /* logical unit # */
> pcici_t tag; /* PCI tag for this device */
> int32_t ioaddr; /* port addr */
> int32_t altioaddr; /* alternate port addr */
> int32_t bmaddr; /* bus master DMA port */
> struct ata_dmaentry *dmatab[2]; /* DMA transfer tables */
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< #define ATA_F_SLAVE_ONLY 0x0001
<
114,115c155,161
< int32_t ata_wait(struct ata_softc *, u_int8_t);
< int32_t ata_command(struct ata_softc *, int32_t, u_int32_t, u_int32_t, u_int32_t, u_int32_t, u_int32_t, int32_t);
---
> int32_t ata_wait(struct ata_softc *, int32_t, u_int8_t);
> int32_t ata_command(struct ata_softc *, int32_t, u_int32_t, u_int32_t, u_int32_t, u_int32_t, u_int32_t, u_int32_t, int32_t);
> int32_t ata_dmainit(struct ata_softc *, int32_t, int32_t, int32_t, int32_t);
> int32_t ata_dmasetup(struct ata_softc *, int32_t, int8_t *, int32_t, int32_t);
> void ata_dmastart(struct ata_softc *, int32_t);
> int32_t ata_dmastatus(struct ata_softc *, int32_t);
> int32_t ata_dmadone(struct ata_softc *, int32_t);