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ata-all.c (64303) ata-all.c (64307)
1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999,2000 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-all.c 64303 2000-08-06 19:10:05Z sos $
28 * $FreeBSD: head/sys/dev/ata/ata-all.c 64307 2000-08-06 19:51:58Z sos $
29 */
30
31#include "ata.h"
32#include "isa.h"
33#include "card.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "atapicd.h"

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249
250 case 0x70108086:
251 return "Intel PIIX3 ATA controller";
252
253 case 0x71118086:
254 case 0x71998086:
255 return "Intel PIIX4 ATA33 controller";
256
29 */
30
31#include "ata.h"
32#include "isa.h"
33#include "card.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "atapicd.h"

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249
250 case 0x70108086:
251 return "Intel PIIX3 ATA controller";
252
253 case 0x71118086:
254 case 0x71998086:
255 return "Intel PIIX4 ATA33 controller";
256
257 case 0x24218086:
258 return "Intel ICH0 ATA33 controller";
259
257 case 0x24118086:
258 return "Intel ICH ATA66 controller";
259
260 case 0x24118086:
261 return "Intel ICH ATA66 controller";
262
260 case 0x24218086:
261 return "Intel ICH0 ATA33 controller";
263 case 0x244b8086:
264 return "Intel ICH2 ATA100 controller";
262
263 case 0x522910b9:
264 return "AcerLabs Aladdin ATA33 controller";
265
266 case 0x05711106:
267 if (ata_find_dev(dev, 0x05861106, 0))
268 return "VIA 82C586 ATA33 controller";
269 if (ata_find_dev(dev, 0x05961106, 0x12))

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289 return "AMD 756 ATA66 controller";
290
291 case 0x4d33105a:
292 return "Promise ATA33 controller";
293
294 case 0x4d38105a:
295 return "Promise ATA66 controller";
296
265
266 case 0x522910b9:
267 return "AcerLabs Aladdin ATA33 controller";
268
269 case 0x05711106:
270 if (ata_find_dev(dev, 0x05861106, 0))
271 return "VIA 82C586 ATA33 controller";
272 if (ata_find_dev(dev, 0x05961106, 0x12))

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292 return "AMD 756 ATA66 controller";
293
294 case 0x4d33105a:
295 return "Promise ATA33 controller";
296
297 case 0x4d38105a:
298 return "Promise ATA66 controller";
299
300 case 0x4d30105a:
301 return "Promise ATA100 controller";
302
297 case 0x00041103:
303 case 0x00041103:
298 return "HighPoint HPT366 ATA66 controller";
304 switch (pci_get_revid(dev)) {
305 case 0x00:
306 case 0x01:
307 return "HighPoint HPT366 ATA66 controller";
308 case 0x02:
309 return "HighPoint HPT368 ATA66 controller";
310 case 0x03:
311 case 0x04:
312 return "HighPoint HPT370 ATA100 controller";
313 default:
314 return "Unknown revision HighPoint ATA controller";
315 }
299
300 /* unsupported but known chipsets, generic DMA only */
301 case 0x10001042:
302 case 0x10011042:
303 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible";
304
305 case 0x06401095:
306 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible";

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374 0, ~0, 1, RF_ACTIVE);
375 if (!sc->bmio)
376 device_printf(dev, "Busmastering DMA not configured\n");
377 }
378 else
379 device_printf(dev, "Busmastering DMA not enabled\n");
380 }
381 else {
316
317 /* unsupported but known chipsets, generic DMA only */
318 case 0x10001042:
319 case 0x10011042:
320 return "RZ 100? ATA controller !WARNING! buggy chip data loss possible";
321
322 case 0x06401095:
323 return "CMD 640 ATA controller !WARNING! buggy chip data loss possible";

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391 0, ~0, 1, RF_ACTIVE);
392 if (!sc->bmio)
393 device_printf(dev, "Busmastering DMA not configured\n");
394 }
395 else
396 device_printf(dev, "Busmastering DMA not enabled\n");
397 }
398 else {
382 if (type == 0x4d33105a || type == 0x4d38105a || type == 0x00041103) {
383 /* Promise and HPT366 controllers support busmastering DMA */
399 if (type == 0x4d33105a || type == 0x4d38105a ||
400 type == 0x4d30105a || type == 0x00041103) {
401 /* Promise and HighPoint controllers support busmastering DMA */
384 rid = 0x20;
385 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
386 0, ~0, 1, RF_ACTIVE);
387 }
388 else
389 /* we dont know this controller, no busmastering DMA */
390 device_printf(dev, "Busmastering DMA not supported\n");
391 }
392
393 /* do extra chipset specific setups */
394 switch (type) {
395 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
396 pci_write_config(dev, 0x53,
397 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
398 break;
399
400 case 0x4d38105a: /* Promise 66's need their clock changed */
402 rid = 0x20;
403 sc->bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
404 0, ~0, 1, RF_ACTIVE);
405 }
406 else
407 /* we dont know this controller, no busmastering DMA */
408 device_printf(dev, "Busmastering DMA not supported\n");
409 }
410
411 /* do extra chipset specific setups */
412 switch (type) {
413 case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
414 pci_write_config(dev, 0x53,
415 (pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
416 break;
417
418 case 0x4d38105a: /* Promise 66's need their clock changed */
419 case 0x4d30105a: /* Promise 100 too */
401 outb(rman_get_start(sc->bmio) + 0x11,
402 inb(rman_get_start(sc->bmio) + 0x11) | 0x0a);
403 /* FALLTHROUGH */
404
405 case 0x4d33105a: /* Promise's need burst mode to be turned on */
406 outb(rman_get_start(sc->bmio) + 0x1f,
407 inb(rman_get_start(sc->bmio) + 0x1f) | 0x01);
408 break;
409
420 outb(rman_get_start(sc->bmio) + 0x11,
421 inb(rman_get_start(sc->bmio) + 0x11) | 0x0a);
422 /* FALLTHROUGH */
423
424 case 0x4d33105a: /* Promise's need burst mode to be turned on */
425 outb(rman_get_start(sc->bmio) + 0x1f,
426 inb(rman_get_start(sc->bmio) + 0x1f) | 0x01);
427 break;
428
410 case 0x00041103: /* HPT366 turn of fast interrupt prediction */
411 pci_write_config(dev, 0x51, (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
429 case 0x00041103: /* HighPoint's need to turn off interrupt prediction */
430 switch (pci_get_revid(dev)) {
431 case 0x00:
432 case 0x01:
433 pci_write_config(dev, 0x51,
434 (pci_read_config(dev, 0x51, 1) & ~0x80), 1);
435 break;
436
437 case 0x02:
438 case 0x03:
439 case 0x04:
440 pci_write_config(dev, 0x51,
441 (pci_read_config(dev, 0x51, 1) & ~0x02), 1);
442 pci_write_config(dev, 0x55,
443 (pci_read_config(dev, 0x55, 1) & ~0x02), 1);
444 pci_write_config(dev, 0x5a,
445 (pci_read_config(dev, 0x5a, 1) & ~0x10), 1);
446
447 }
412 break;
413
414 case 0x05711106:
415 case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */
416 /* set prefetch, postwrite */
417 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
418
419 /* set fifo configuration half'n'half */

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1081
1082 /*
1083 * since we might share the IRQ with another device, and in some
1084 * cases with our twin channel, we only want to process interrupts
1085 * that we know this channel generated.
1086 */
1087 switch (scp->chiptype) {
1088#if NPCI > 0
448 break;
449
450 case 0x05711106:
451 case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */
452 /* set prefetch, postwrite */
453 pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
454
455 /* set fifo configuration half'n'half */

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1117
1118 /*
1119 * since we might share the IRQ with another device, and in some
1120 * cases with our twin channel, we only want to process interrupts
1121 * that we know this channel generated.
1122 */
1123 switch (scp->chiptype) {
1124#if NPCI > 0
1089 case 0x00041103: /* HighPoint HPT366 */
1125 case 0x00041103: /* HighPoint HPT366/368/370 */
1090 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
1091 return;
1092 outb(scp->bmaddr + ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
1093 break;
1094
1095 case 0x4d33105a: /* Promise 33's */
1096 case 0x4d38105a: /* Promise 66's */
1126 if (!((dmastat = ata_dmastatus(scp)) & ATA_BMSTAT_INTERRUPT))
1127 return;
1128 outb(scp->bmaddr + ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
1129 break;
1130
1131 case 0x4d33105a: /* Promise 33's */
1132 case 0x4d38105a: /* Promise 66's */
1133 case 0x4d30105a: /* Promise 100's */
1097 {
1098 struct ata_pci_softc *sc=device_get_softc(device_get_parent(scp->dev));
1099
1100 if (!(inl(rman_get_start(sc->bmio) + 0x1c) &
1101 ((scp->unit) ? 0x00004000 : 0x00000400)))
1102 return;
1103 }
1104 /* FALLTHROUGH */

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1458 case ATA_PIO0: return "PIO0";
1459 case ATA_PIO1: return "PIO1";
1460 case ATA_PIO2: return "PIO2";
1461 case ATA_PIO3: return "PIO3";
1462 case ATA_PIO4: return "PIO4";
1463 case ATA_WDMA2: return "WDMA2";
1464 case ATA_UDMA2: return "UDMA33";
1465 case ATA_UDMA4: return "UDMA66";
1134 {
1135 struct ata_pci_softc *sc=device_get_softc(device_get_parent(scp->dev));
1136
1137 if (!(inl(rman_get_start(sc->bmio) + 0x1c) &
1138 ((scp->unit) ? 0x00004000 : 0x00000400)))
1139 return;
1140 }
1141 /* FALLTHROUGH */

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1495 case ATA_PIO0: return "PIO0";
1496 case ATA_PIO1: return "PIO1";
1497 case ATA_PIO2: return "PIO2";
1498 case ATA_PIO3: return "PIO3";
1499 case ATA_PIO4: return "PIO4";
1500 case ATA_WDMA2: return "WDMA2";
1501 case ATA_UDMA2: return "UDMA33";
1502 case ATA_UDMA4: return "UDMA66";
1503 case ATA_UDMA5: return "UDMA100";
1466 case ATA_DMA: return "BIOSDMA";
1467 default: return "???";
1468 }
1469}
1470
1471int8_t
1472ata_pio2mode(int32_t pio)
1473{

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1510 return 0;
1511 return -1;
1512}
1513
1514int
1515ata_umode(struct ata_params *ap)
1516{
1517 if (ap->atavalid & ATA_FLAG_88) {
1504 case ATA_DMA: return "BIOSDMA";
1505 default: return "???";
1506 }
1507}
1508
1509int8_t
1510ata_pio2mode(int32_t pio)
1511{

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1548 return 0;
1549 return -1;
1550}
1551
1552int
1553ata_umode(struct ata_params *ap)
1554{
1555 if (ap->atavalid & ATA_FLAG_88) {
1556 if (ap->udmamodes & 0x20)
1557 return 5;
1518 if (ap->udmamodes & 0x10)
1519 return 4;
1520 if (ap->udmamodes & 0x08)
1521 return 3;
1522 if (ap->udmamodes & 0x04)
1523 return 2;
1524 if (ap->udmamodes & 0x02)
1525 return 1;

--- 163 unchanged lines hidden --- 		1558 if (ap->udmamodes & 0x10)
1559 return 4;
1560 if (ap->udmamodes & 0x08)
1561 return 3;
1562 if (ap->udmamodes & 0x04)
1563 return 2;
1564 if (ap->udmamodes & 0x02)
1565 return 1;

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