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ata-all.c (46743) ata-all.c (47272)
1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $Id: ata-all.c,v 1.11 1999/04/22 08:07:44 sos Exp $
28 * $Id: ata-all.c,v 1.12 1999/05/08 21:58:58 dfr Exp $
29 */
30
31#include "ata.h"
32#if NATA > 0
33#include "isa.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "opt_global.h"

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49#include <machine/resource.h>
50#include <machine/bus.h>
51#include <sys/rman.h>
52#include <machine/clock.h>
53#ifdef __i386__
54#include <machine/smp.h>
55#include <i386/isa/intr_machdep.h>
56#endif
29 */
30
31#include "ata.h"
32#if NATA > 0
33#include "isa.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "opt_global.h"

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49#include <machine/resource.h>
50#include <machine/bus.h>
51#include <sys/rman.h>
52#include <machine/clock.h>
53#ifdef __i386__
54#include <machine/smp.h>
55#include <i386/isa/intr_machdep.h>
56#endif
57#if NPCI > 0
57#include <pci/pcivar.h>
58#include <pci/pcireg.h>
58#include <pci/pcivar.h>
59#include <pci/pcireg.h>
60#endif
59#include <isa/isavar.h>
60#include <isa/isareg.h>
61#include <dev/ata/ata-all.h>
62#include <dev/ata/ata-disk.h>
63#include <dev/ata/atapi-all.h>
64
65/* misc defines */
66#define UNIT(dev) (dev>>3 & 0x1f) /* assume 8 minor # per unit */

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218ata_pciattach(device_t dev)
219{
220 int unit = device_get_unit(dev);
221 struct ata_softc *scp;
222 u_int32_t type;
223 u_int8_t class, subclass;
224 u_int32_t cmd;
225 int32_t iobase_1, iobase_2, altiobase_1, altiobase_2;
61#include <isa/isavar.h>
62#include <isa/isareg.h>
63#include <dev/ata/ata-all.h>
64#include <dev/ata/ata-disk.h>
65#include <dev/ata/atapi-all.h>
66
67/* misc defines */
68#define UNIT(dev) (dev>>3 & 0x1f) /* assume 8 minor # per unit */

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220ata_pciattach(device_t dev)
221{
222 int unit = device_get_unit(dev);
223 struct ata_softc *scp;
224 u_int32_t type;
225 u_int8_t class, subclass;
226 u_int32_t cmd;
227 int32_t iobase_1, iobase_2, altiobase_1, altiobase_2;
226 int32_t bmaddr_1 = 0, bmaddr_2 = 0, sysctrl = 0, irq1, irq2;
228 int32_t bmaddr_1 = 0, bmaddr_2 = 0, irq1, irq2;
227 int32_t lun;
228
229 /* set up vendor-specific stuff */
230 type = pci_get_devid(dev);
231 class = pci_get_class(dev);
232 subclass = pci_get_subclass(dev);
233 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
234

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241 if (type == 0x4d33105a) {
242 iobase_1 = pci_read_config(dev, 0x10, 4) & 0xfffc;
243 altiobase_1 = pci_read_config(dev, 0x14, 4) & 0xfffc;
244 iobase_2 = pci_read_config(dev, 0x18, 4) & 0xfffc;
245 altiobase_2 = pci_read_config(dev, 0x1c, 4) & 0xfffc;
246 irq1 = irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
247 bmaddr_1 = pci_read_config(dev, 0x20, 4) & 0xfffc;
248 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
229 int32_t lun;
230
231 /* set up vendor-specific stuff */
232 type = pci_get_devid(dev);
233 class = pci_get_class(dev);
234 subclass = pci_get_subclass(dev);
235 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
236

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243 if (type == 0x4d33105a) {
244 iobase_1 = pci_read_config(dev, 0x10, 4) & 0xfffc;
245 altiobase_1 = pci_read_config(dev, 0x14, 4) & 0xfffc;
246 iobase_2 = pci_read_config(dev, 0x18, 4) & 0xfffc;
247 altiobase_2 = pci_read_config(dev, 0x1c, 4) & 0xfffc;
248 irq1 = irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
249 bmaddr_1 = pci_read_config(dev, 0x20, 4) & 0xfffc;
250 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
249 sysctrl = (pci_read_config(dev, 0x20, 4) & 0xfffc) + 0x1c;
250 outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
251 printf("ata-pci%d: Busmastering DMA supported\n", unit);
252 }
253 /* everybody else seems to do it this way */
254 else {
255 if ((unit == 0) &&
256 (pci_get_progif(dev) & PCIP_STORAGE_IDE_MODEPRIM) == 0) {
257 iobase_1 = IO_WD1;

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306#ifdef __alpha__
307 alpha_platform_setup_ide_intr(0, ataintr, scp);
308#endif
309 else {
310 struct resource *irq;
311 int rid = 0;
312 void *ih;
313
251 outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
252 printf("ata-pci%d: Busmastering DMA supported\n", unit);
253 }
254 /* everybody else seems to do it this way */
255 else {
256 if ((unit == 0) &&
257 (pci_get_progif(dev) & PCIP_STORAGE_IDE_MODEPRIM) == 0) {
258 iobase_1 = IO_WD1;

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307#ifdef __alpha__
308 alpha_platform_setup_ide_intr(0, ataintr, scp);
309#endif
310 else {
311 struct resource *irq;
312 int rid = 0;
313 void *ih;
314
314 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0,1,RF_ACTIVE);
315 if (sysctrl)
316 bus_setup_intr(dev, irq, INTR_TYPE_BIO,
317 promise_intr, scp, &ih);
315 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
316 RF_SHAREABLE | RF_ACTIVE);
317 if (!irq)
318 printf("ata_pciattach: Unable to alloc interrupt\n");
319
320 if (type == 0x4d33105a)
321 bus_setup_intr(dev, irq, INTR_TYPE_BIO, promise_intr, scp, &ih);
318 else
322 else
319 bus_setup_intr(dev, irq, INTR_TYPE_BIO,
320 ataintr, scp, &ih);
323 bus_setup_intr(dev, irq, INTR_TYPE_BIO, ataintr, scp, &ih);
321 }
322 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
323 lun, iobase_1, isa_apic_irq(irq1), unit);
324 }
325 lun = 1;
326 if (ata_probe(iobase_2, altiobase_2, bmaddr_2, dev, &lun)) {
327 scp = atadevices[lun];
328 if (iobase_2 == IO_WD2)

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333#ifdef __alpha__
334 alpha_platform_setup_ide_intr(1, ataintr, scp);
335#endif
336 else {
337 struct resource *irq;
338 int rid = 0;
339 void *ih;
340
324 }
325 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
326 lun, iobase_1, isa_apic_irq(irq1), unit);
327 }
328 lun = 1;
329 if (ata_probe(iobase_2, altiobase_2, bmaddr_2, dev, &lun)) {
330 scp = atadevices[lun];
331 if (iobase_2 == IO_WD2)

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336#ifdef __alpha__
337 alpha_platform_setup_ide_intr(1, ataintr, scp);
338#endif
339 else {
340 struct resource *irq;
341 int rid = 0;
342 void *ih;
343
341 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0,1,RF_ACTIVE);
342 if (!sysctrl)
344 if (type != 0x4d33105a) {
345 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
346 RF_SHAREABLE | RF_ACTIVE);
347 if (!irq)
348 printf("ata_pciattach: Unable to alloc interrupt\n");
349
343 bus_setup_intr(dev, irq, INTR_TYPE_BIO, ataintr, scp, &ih);
350 bus_setup_intr(dev, irq, INTR_TYPE_BIO, ataintr, scp, &ih);
351 }
344 }
345 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
346 lun, iobase_2, isa_apic_irq(irq2), unit);
347 }
348 return 0;
349}
350
351static device_method_t ata_pci_methods[] = {

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539static void
540ataintr(void *data)
541{
542 struct ata_softc *scp;
543 struct atapi_request *atapi_request;
544 struct buf *ata_request;
545 u_int8_t status;
546 static int32_t intr_count = 0;
352 }
353 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
354 lun, iobase_2, isa_apic_irq(irq2), unit);
355 }
356 return 0;
357}
358
359static device_method_t ata_pci_methods[] = {

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547static void
548ataintr(void *data)
549{
550 struct ata_softc *scp;
551 struct atapi_request *atapi_request;
552 struct buf *ata_request;
553 u_int8_t status;
554 static int32_t intr_count = 0;
547 int unit;
548
549 scp = (struct ata_softc *)data;
555
556 scp = (struct ata_softc *)data;
550 unit = scp->unit;
551
552 /* find & call the responsible driver to process this interrupt */
553 switch (scp->active) {
554#if NATADISK > 0
555 case ATA_ACTIVE_ATA:
556 if ((ata_request = bufq_first(&scp->ata_queue)))
557 if (ad_interrupt(ata_request) == ATA_OP_CONTINUES)
558 return;

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571 case ATA_IGNORE_INTR:
572 break;
573
574 default:
575 case ATA_IDLE:
576 status = inb(scp->ioaddr + ATA_STATUS);
577 if (intr_count++ < 10)
578 printf("ata%d: unwanted interrupt %d status = %02x\n",
557
558 /* find & call the responsible driver to process this interrupt */
559 switch (scp->active) {
560#if NATADISK > 0
561 case ATA_ACTIVE_ATA:
562 if ((ata_request = bufq_first(&scp->ata_queue)))
563 if (ad_interrupt(ata_request) == ATA_OP_CONTINUES)
564 return;

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577 case ATA_IGNORE_INTR:
578 break;
579
580 default:
581 case ATA_IDLE:
582 status = inb(scp->ioaddr + ATA_STATUS);
583 if (intr_count++ < 10)
584 printf("ata%d: unwanted interrupt %d status = %02x\n",
579 unit, intr_count, status);
585 scp->lun, intr_count, status);
580 return;
581 }
582 scp->active = ATA_IDLE;
583 ata_start(scp);
584}
585
586void
587ata_start(struct ata_softc *scp)

--- 160 unchanged lines hidden --- 		586 return;
587 }
588 scp->active = ATA_IDLE;
589 ata_start(scp);
590}
591
592void
593ata_start(struct ata_softc *scp)

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