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ata-all.c (45720) ata-all.c (45798)
1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $Id: ata-all.c,v 1.6 1999/04/10 18:53:35 sos Exp $
28 * $Id: ata-all.c,v 1.7 1999/04/16 21:21:52 peter Exp $
29 */
30
31#include "ata.h"
32#if NATA > 0
33#include "isa.h"
34#include "pci.h"
35#include "atadisk.h"
29 */
30
31#include "ata.h"
32#if NATA > 0
33#include "isa.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "opt_global.h"
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/interrupt.h>
40#include <sys/conf.h>
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/kernel.h>
40#include <sys/interrupt.h>
41#include <sys/conf.h>
42#include <sys/module.h>
43#include <sys/bus.h>
41#include <sys/buf.h>
42#include <sys/malloc.h>
43#include <sys/devicestat.h>
44#include <vm/vm.h>
45#include <vm/pmap.h>
44#include <sys/buf.h>
45#include <sys/malloc.h>
46#include <sys/devicestat.h>
47#include <vm/vm.h>
48#include <vm/pmap.h>
49#include <machine/resource.h>
50#include <machine/bus.h>
51#include <sys/rman.h>
46#include <machine/clock.h>
47#ifdef __i386__
48#include <machine/smp.h>
49#endif
50#include <pci/pcivar.h>
51#include <pci/pcireg.h>
52#include <machine/clock.h>
53#ifdef __i386__
54#include <machine/smp.h>
55#endif
56#include <pci/pcivar.h>
57#include <pci/pcireg.h>
52#ifdef __i386__
53#include <i386/isa/icu.h>
54#include <i386/isa/isa.h>
55#include <i386/isa/isa_device.h>
56#else
58#include <isa/isavar.h>
57#include <isa/isareg.h>
59#include <isa/isareg.h>
58#endif
59#include <dev/ata/ata-all.h>
60#include <dev/ata/ata-disk.h>
61#include <dev/ata/atapi-all.h>
62
63/* misc defines */
64#define UNIT(dev) (dev>>3 & 0x1f) /* assume 8 minor # per unit */
65#define MIN(a,b) ((a)>(b)?(b):(a))
60#include <dev/ata/ata-all.h>
61#include <dev/ata/ata-disk.h>
62#include <dev/ata/atapi-all.h>
63
64/* misc defines */
65#define UNIT(dev) (dev>>3 & 0x1f) /* assume 8 minor # per unit */
66#define MIN(a,b) ((a)>(b)?(b):(a))
66#if NSMP == 0
67#if SMP == 0
67#define isa_apic_irq(x) x
68#endif
69
70/* prototypes */
68#define isa_apic_irq(x) x
69#endif
70
71/* prototypes */
71#if NISA > 0 && defined(__i386__)
72static int32_t ata_isaprobe(struct isa_device *);
73static int32_t ata_isaattach(struct isa_device *);
74#endif
75#if NPCI > 0
72#if NPCI > 0
76static const char *ata_pciprobe(pcici_t, pcidi_t);
77static void ata_pciattach(pcici_t, int32_t);
78static void promise_intr(int32_t);
79#endif
73static void promise_intr(int32_t);
74#endif
80static int32_t ata_probe(int32_t, int32_t, int32_t, pcici_t, int32_t *);
75static int32_t ata_probe(int32_t, int32_t, int32_t, device_t, int32_t *);
81static void ataintr(int32_t);
82
76static void ataintr(int32_t);
77
78/*
79 * Ought to be handled by the devclass.
80 */
83static int32_t atanlun = 0;
84struct ata_softc *atadevices[MAXATA];
85
81static int32_t atanlun = 0;
82struct ata_softc *atadevices[MAXATA];
83
86#if NISA > 0 && defined(__i386__)
87struct isa_driver atadriver = { ata_isaprobe, ata_isaattach, "ata" };
84static devclass_t ata_devclass;
88
85
89static int32_t
90ata_isaprobe(struct isa_device *devp)
86#if NISA > 0
87
88static int
89ata_isaprobe(device_t dev)
91{
90{
91 struct resource *port;
92 int rid;
92 int32_t ctlr, res;
93 int32_t ctlr, res;
93
94 int unit;
95
96 /* Allocate the port range */
97 rid = 0;
98 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
99 if (!port)
100 return (ENOMEM);
101
94 for (ctlr = 0; ctlr < atanlun; ctlr++) {
102 for (ctlr = 0; ctlr < atanlun; ctlr++) {
95 if (atadevices[ctlr]->ioaddr == devp->id_iobase) {
103 if (atadevices[ctlr]->ioaddr == rman_get_start(port)) {
96 printf("ata-isa%d: already registered as ata%d\n",
104 printf("ata-isa%d: already registered as ata%d\n",
97 devp->id_unit, ctlr);
98 return 0;
105 device_get_unit(dev), ctlr);
106 bus_release_resource(dev, SYS_RES_IOPORT, 0, port);
107 return ENXIO;
99 }
100 }
108 }
109 }
101 res = ata_probe(devp->id_iobase, devp->id_iobase + ATA_ALTPORT, 0, 0,
102 &devp->id_unit);
103 if (res)
104 devp->id_intr = (inthand2_t *)ataintr;
105 return res;
110
111 /*
112 * XXX not sure what to do with the unit. The new bus code will
113 * automatically assign unit numbers for both pci and isa. For
114 * now, store it in the softc.
115 */
116 res = ata_probe(rman_get_start(port), rman_get_start(port) + ATA_ALTPORT,
117 0, dev, &unit);
118 *(int *) device_get_softc(dev) = unit;
119
120 bus_release_resource(dev, SYS_RES_IOPORT, 0, port);
121
122 if (res) {
123 isa_set_portsize(dev, res);
124 return 0;
125 }
126
127 return ENXIO;
106}
107
128}
129
108static int32_t
109ata_isaattach(struct isa_device *devp)
130static int
131ata_isaattach(device_t dev)
110{
132{
111 return 1;
133 struct resource *port;
134 struct resource *irq;
135 int rid, unit;
136 void *ih;
137
138 /* Allocate the port range and interrupt */
139 rid = 0;
140 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
141 if (!port)
142 return (ENOMEM);
143
144 rid = 0;
145 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_ACTIVE);
146 if (!irq) {
147 bus_release_resource(dev, SYS_RES_IOPORT, 0, port);
148 return (ENOMEM);
149 }
150
151 /*
152 * The interrupt code could be changed to take the ata_softc as
153 * its argument directly.
154 */
155 unit = *(int *) device_get_softc(dev);
156 return bus_setup_intr(dev, irq, (driver_intr_t *) ataintr,
157 (void*)(uintptr_t) unit, &ih);
112}
158}
113#endif
114
159
115#if NPCI > 0
116static u_long ata_pcicount;
117static struct pci_device ata_pcidevice = {
118 "ata-pci", ata_pciprobe, ata_pciattach, &ata_pcicount, 0
160static device_method_t ata_isa_methods[] = {
161 /* Device interface */
162 DEVMETHOD(device_probe, ata_isaprobe),
163 DEVMETHOD(device_attach, ata_isaattach),
164 { 0, 0 }
119};
120
165};
166
121DATA_SET(pcidevice_set, ata_pcidevice);
167static driver_t ata_isa_driver = {
168 "ata",
169 ata_isa_methods,
170 DRIVER_TYPE_BIO,
171 sizeof(int),
172};
122
173
174DRIVER_MODULE(ata, isa, ata_isa_driver, ata_devclass, 0, 0);
175
176#endif
177
178#if NPCI > 0
179
123static const char *
180static const char *
124ata_pciprobe(pcici_t tag, pcidi_t type)
181ata_pcimatch(device_t dev)
125{
126 u_int32_t data;
127
182{
183 u_int32_t data;
184
128 data = pci_conf_read(tag, PCI_CLASS_REG);
129 if ((data & PCI_CLASS_MASK) == PCI_CLASS_MASS_STORAGE &&
130 ((data & PCI_SUBCLASS_MASK) == 0x00010000 ||
131 ((data & PCI_SUBCLASS_MASK) == 0x00040000))) {
132 switch (type) {
185 data = pci_read_config(dev, PCI_CLASS_REG, 4);
186 if (pci_get_class(dev) == PCIC_STORAGE &&
187 (pci_get_subclass(dev) == PCIS_STORAGE_IDE ||
188 pci_get_subclass(dev) == PCIS_STORAGE_RAID)) {
189 switch (pci_get_devid(dev)) {
133 case 0x12308086:
134 return "Intel PIIX IDE controller";
135 case 0x70108086:
136 return "Intel PIIX3 IDE controller";
137 case 0x71118086:
138 return "Intel PIIX4 IDE controller";
139 case 0x4d33105a:
140 return "Promise Ultra/33 IDE controller";
141 case 0x522910b9:
142 return "AcerLabs Aladdin IDE controller";
190 case 0x12308086:
191 return "Intel PIIX IDE controller";
192 case 0x70108086:
193 return "Intel PIIX3 IDE controller";
194 case 0x71118086:
195 return "Intel PIIX4 IDE controller";
196 case 0x4d33105a:
197 return "Promise Ultra/33 IDE controller";
198 case 0x522910b9:
199 return "AcerLabs Aladdin IDE controller";
200#if 0
201 case 0x05711106:
202 return "VIA Apollo IDE controller";
143 case 0x06401095:
144 return "CMD 640 IDE controller";
145 case 0x06461095:
146 return "CMD 646 IDE controller";
203 case 0x06401095:
204 return "CMD 640 IDE controller";
205 case 0x06461095:
206 return "CMD 646 IDE controller";
147#if 0
148 case 0x05711106:
149 return "VIA Apollo IDE controller";
207 case 0xc6931080:
208 return "Cypress 82C693 IDE controller";
150 case 0x01021078:
151 return "Cyrix 5530 IDE controller";
152#endif
153 default:
154 return "Unknown PCI IDE controller";
155 }
156 }
157 return NULL;
158}
159
209 case 0x01021078:
210 return "Cyrix 5530 IDE controller";
211#endif
212 default:
213 return "Unknown PCI IDE controller";
214 }
215 }
216 return NULL;
217}
218
160static void
161ata_pciattach(pcici_t tag, int32_t unit)
219static int
220ata_pciprobe(device_t dev)
162{
221{
163 pcidi_t type, class, cmd;
222 const char *desc = ata_pcimatch(dev);
223 if (desc) {
224 device_set_desc(dev, desc);
225 return 0;
226 }
227 else
228 return ENXIO;
229}
230
231static int
232ata_pciattach(device_t dev)
233{
234 int unit = device_get_unit(dev);
235 u_int32_t type;
236 u_int8_t class, subclass;
237 u_int32_t cmd;
164 int32_t iobase_1, iobase_2, altiobase_1, altiobase_2;
165 int32_t bmaddr_1 = 0, bmaddr_2 = 0, sysctrl = 0, irq1, irq2;
166 int32_t lun;
167
168 /* set up vendor-specific stuff */
238 int32_t iobase_1, iobase_2, altiobase_1, altiobase_2;
239 int32_t bmaddr_1 = 0, bmaddr_2 = 0, sysctrl = 0, irq1, irq2;
240 int32_t lun;
241
242 /* set up vendor-specific stuff */
169 type = pci_conf_read(tag, PCI_ID_REG);
170 class = pci_conf_read(tag, PCI_CLASS_REG);
171 cmd = pci_conf_read(tag, PCI_COMMAND_STATUS_REG);
243 type = pci_get_devid(dev);
244 class = pci_get_class(dev);
245 subclass = pci_get_subclass(dev);
246 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
172
173#ifdef ATA_DEBUG
247
248#ifdef ATA_DEBUG
174 printf("ata%d: type=%08x class=%08x cmd=%08x\n", unit, type, class, cmd);
249 printf("ata%d: type=%08x class=%02x subclass=%02x cmd=%08x\n",
250 unit, type, class, subclass, cmd);
175#endif
176
177 /* if this is a Promise controller handle it specially */
178 if (type == 0x4d33105a) {
251#endif
252
253 /* if this is a Promise controller handle it specially */
254 if (type == 0x4d33105a) {
179 iobase_1 = pci_conf_read(tag, 0x10) & 0xfffc;
180 altiobase_1 = pci_conf_read(tag, 0x14) & 0xfffc;
181 iobase_2 = pci_conf_read(tag, 0x18) & 0xfffc;
182 altiobase_2 = pci_conf_read(tag, 0x1c) & 0xfffc;
183 irq1 = irq2 = pci_conf_read(tag, PCI_INTERRUPT_REG) & 0xff;
184 bmaddr_1 = pci_conf_read(tag, 0x20) & 0xfffc;
255 iobase_1 = pci_read_config(dev, 0x10, 4) & 0xfffc;
256 altiobase_1 = pci_read_config(dev, 0x14, 4) & 0xfffc;
257 iobase_2 = pci_read_config(dev, 0x18, 4) & 0xfffc;
258 altiobase_2 = pci_read_config(dev, 0x1c, 4) & 0xfffc;
259 irq1 = irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
260 bmaddr_1 = pci_read_config(dev, 0x20, 4) & 0xfffc;
185 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
261 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
186 sysctrl = (pci_conf_read(tag, 0x20) & 0xfffc) + 0x1c;
262 sysctrl = (pci_read_config(dev, 0x20, 4) & 0xfffc) + 0x1c;
187 outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
188 printf("ata-pci%d: Busmastering DMA supported\n", unit);
189 }
190 /* everybody else seems to do it this way */
191 else {
263 outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
264 printf("ata-pci%d: Busmastering DMA supported\n", unit);
265 }
266 /* everybody else seems to do it this way */
267 else {
192 if ((class & 0x100) == 0) {
268 if ((unit == 0) &&
269 (pci_get_progif(dev) & PCIP_STORAGE_IDE_MODEPRIM) == 0) {
193 iobase_1 = IO_WD1;
194 altiobase_1 = iobase_1 + ATA_ALTPORT;
195 irq1 = 14;
196 }
197 else {
270 iobase_1 = IO_WD1;
271 altiobase_1 = iobase_1 + ATA_ALTPORT;
272 irq1 = 14;
273 }
274 else {
198 iobase_1 = pci_conf_read(tag, 0x10) & 0xfffc;
199 altiobase_1 = pci_conf_read(tag, 0x14) & 0xfffc;
200 irq1 = pci_conf_read(tag, PCI_INTERRUPT_REG) & 0xff;
275 iobase_1 = pci_read_config(dev, 0x10, 4) & 0xfffc;
276 altiobase_1 = pci_read_config(dev, 0x14, 4) & 0xfffc;
277 irq1 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
201 }
278 }
202 if ((class & 0x400) == 0) {
279 if ((unit == 0) &&
280 (pci_get_progif(dev) & PCIP_STORAGE_IDE_MODESEC) == 0) {
203 iobase_2 = IO_WD2;
204 altiobase_2 = iobase_2 + ATA_ALTPORT;
205 irq2 = 15;
206 }
207 else {
281 iobase_2 = IO_WD2;
282 altiobase_2 = iobase_2 + ATA_ALTPORT;
283 irq2 = 15;
284 }
285 else {
208 iobase_2 = pci_conf_read(tag, 0x18) & 0xfffc;
209 altiobase_2 = pci_conf_read(tag, 0x1c) & 0xfffc;
210 irq2 = pci_conf_read(tag, PCI_INTERRUPT_REG) & 0xff;
286 iobase_2 = pci_read_config(dev, 0x18, 4) & 0xfffc;
287 altiobase_2 = pci_read_config(dev, 0x1c, 4) & 0xfffc;
288 irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
211 }
212
213 /* is this controller busmaster capable ? */
289 }
290
291 /* is this controller busmaster capable ? */
214 if (pci_conf_read(tag, PCI_CLASS_REG) & 0x8000) {
292 if (pci_get_progif(dev) & PCIP_STORAGE_IDE_MASTERDEV) {
215 /* is busmastering support turned on ? */
293 /* is busmastering support turned on ? */
216 if ((pci_conf_read(tag, PCI_COMMAND_STATUS_REG) & 5) == 5) {
294 if ((pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4) & 5) == 5) {
217 /* is there a valid port range to connect to ? */
295 /* is there a valid port range to connect to ? */
218 if ((bmaddr_1 = pci_conf_read(tag, 0x20) & 0xfffc)) {
296 if ((bmaddr_1 = pci_read_config(dev, 0x20, 4) & 0xfffc)) {
219 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
220 printf("ata-pci%d: Busmastering DMA supported\n", unit);
221 }
222 else
223 printf("ata-pci%d: Busmastering DMA not configured\n",unit);
224 }
225 else
226 printf("ata-pci%d: Busmastering DMA not enabled\n", unit);
227 }
228 else
229 printf("ata-pci%d: Busmastering DMA not supported\n", unit);
230 }
231
232 /* now probe the addresse found for "real" ATA/ATAPI hardware */
233 lun = 0;
297 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
298 printf("ata-pci%d: Busmastering DMA supported\n", unit);
299 }
300 else
301 printf("ata-pci%d: Busmastering DMA not configured\n",unit);
302 }
303 else
304 printf("ata-pci%d: Busmastering DMA not enabled\n", unit);
305 }
306 else
307 printf("ata-pci%d: Busmastering DMA not supported\n", unit);
308 }
309
310 /* now probe the addresse found for "real" ATA/ATAPI hardware */
311 lun = 0;
234 if (ata_probe(iobase_1, altiobase_1, bmaddr_1, tag, &lun)) {
312 if (ata_probe(iobase_1, altiobase_1, bmaddr_1, dev, &lun)) {
235 if (iobase_1 == IO_WD1)
236#ifdef __i386__
313 if (iobase_1 == IO_WD1)
314#ifdef __i386__
237 register_intr(irq1, (int)"", 0, (inthand2_t *)ataintr,
238 &bio_imask, lun);
239#else
315 register_intr(irq1,(int)"",0,(inthand2_t *)ataintr,&bio_imask,lun);
316#endif
317#ifdef __alpha__
240 alpha_platform_setup_ide_intr(0, ataintr, (void *)(intptr_t)lun);
241#endif
242 else {
318 alpha_platform_setup_ide_intr(0, ataintr, (void *)(intptr_t)lun);
319#endif
320 else {
321 struct resource *irq;
322 int rid = 0;
323 void *ih;
324
325 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0,1,RF_ACTIVE);
243 if (sysctrl)
326 if (sysctrl)
244 pci_map_int(tag, (inthand2_t *)promise_intr,
245 (void *)(intptr_t)lun, &bio_imask);
327 bus_setup_intr(dev, irq, (driver_intr_t *)promise_intr,
328 (void *)lun, &ih);
246 else
329 else
247 pci_map_int(tag, (inthand2_t *)ataintr, (void *)(intptr_t)lun,&bio_imask);
330 bus_setup_intr(dev, irq, (driver_intr_t *)ataintr,
331 (void *)lun, &ih);
248 }
249 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
250 lun, iobase_1, isa_apic_irq(irq1), unit);
251 }
252 lun = 1;
332 }
333 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
334 lun, iobase_1, isa_apic_irq(irq1), unit);
335 }
336 lun = 1;
253 if (ata_probe(iobase_2, altiobase_2, bmaddr_2, tag, &lun)) {
337 if (ata_probe(iobase_2, altiobase_2, bmaddr_2, dev, &lun)) {
254 if (iobase_2 == IO_WD2)
255#ifdef __i386__
338 if (iobase_2 == IO_WD2)
339#ifdef __i386__
256 register_intr(irq2, (int)"", 0, (inthand2_t *)ataintr,
257 &bio_imask, lun);
258#else
340 register_intr(irq2,(int)"",0,(inthand2_t *)ataintr,&bio_imask,lun);
341#endif
342#ifdef __alpha__
259 alpha_platform_setup_ide_intr(1, ataintr, (void *)(intptr_t)lun);
260#endif
261 else {
343 alpha_platform_setup_ide_intr(1, ataintr, (void *)(intptr_t)lun);
344#endif
345 else {
346 struct resource *irq;
347 int rid = 0;
348 void *ih;
349
350 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0,1,RF_ACTIVE);
262 if (!sysctrl)
351 if (!sysctrl)
263 pci_map_int(tag, (inthand2_t *)ataintr, (void *)(intptr_t)lun,&bio_imask);
352 bus_setup_intr(dev, irq, (driver_intr_t *)ataintr,
353 (void *)lun, &ih);
264 }
265 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
266 lun, iobase_2, isa_apic_irq(irq2), unit);
267 }
354 }
355 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
356 lun, iobase_2, isa_apic_irq(irq2), unit);
357 }
358 return 0;
268}
269
359}
360
361static device_method_t ata_pci_methods[] = {
362 /* Device interface */
363 DEVMETHOD(device_probe, ata_pciprobe),
364 DEVMETHOD(device_attach, ata_pciattach),
365 { 0, 0 }
366};
367
368static driver_t ata_pci_driver = {
369 "ata",
370 ata_pci_methods,
371 DRIVER_TYPE_BIO,
372 sizeof(int),
373};
374
375DRIVER_MODULE(ata, pci, ata_pci_driver, ata_devclass, 0, 0);
376
270static void
271promise_intr(int32_t unit)
272{
273 struct ata_softc *scp = atadevices[unit];
377static void
378promise_intr(int32_t unit)
379{
380 struct ata_softc *scp = atadevices[unit];
274 int32_t channel = inl((pci_conf_read(scp->tag, 0x20) & 0xfffc) + 0x1c);
381 int32_t channel = inl((pci_read_config(scp->dev, 0x20, 4) & 0xfffc) + 0x1c);
275
276 if (channel & 0x00000400)
277 ataintr(unit);
278
279 if (channel & 0x00004000)
280 ataintr(unit+1);
281}
282#endif
283
284static int32_t
285ata_probe(int32_t ioaddr, int32_t altioaddr, int32_t bmaddr,
382
383 if (channel & 0x00000400)
384 ataintr(unit);
385
386 if (channel & 0x00004000)
387 ataintr(unit+1);
388}
389#endif
390
391static int32_t
392ata_probe(int32_t ioaddr, int32_t altioaddr, int32_t bmaddr,
286 pcici_t tag, int32_t *unit)
393 device_t dev, int32_t *unit)
287{
288 struct ata_softc *scp = atadevices[atanlun];
289 int32_t mask = 0;
290 int32_t timeout;
291 int32_t lun = atanlun;
292 u_int8_t status0, status1;
293
294#ifdef ATA_STATIC_ID

--- 130 unchanged lines hidden (view full) ---

425#endif
426 if (!scp->devices) {
427 free(scp, M_DEVBUF);
428 return 0;
429 }
430 bufq_init(&scp->ata_queue);
431 TAILQ_INIT(&scp->atapi_queue);
432 *unit = scp->lun;
394{
395 struct ata_softc *scp = atadevices[atanlun];
396 int32_t mask = 0;
397 int32_t timeout;
398 int32_t lun = atanlun;
399 u_int8_t status0, status1;
400
401#ifdef ATA_STATIC_ID

--- 130 unchanged lines hidden (view full) ---

532#endif
533 if (!scp->devices) {
534 free(scp, M_DEVBUF);
535 return 0;
536 }
537 bufq_init(&scp->ata_queue);
538 TAILQ_INIT(&scp->atapi_queue);
539 *unit = scp->lun;
433 scp->tag = tag;
540 scp->dev = dev;
434 if (bmaddr)
435 scp->bmaddr = bmaddr;
436 atadevices[scp->lun] = scp;
437#ifndef ATA_STATIC_ID
438 atanlun++;
439#endif
541 if (bmaddr)
542 scp->bmaddr = bmaddr;
543 atadevices[scp->lun] = scp;
544#ifndef ATA_STATIC_ID
545 atanlun++;
546#endif
440 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
441 return ATA_IOSIZE;
442}
443
444static void
445ataintr(int32_t unit)
446{
447 struct ata_softc *scp;
448 struct atapi_request *atapi_request;

--- 207 unchanged lines hidden --- 		547 return ATA_IOSIZE;
548}
549
550static void
551ataintr(int32_t unit)
552{
553 struct ata_softc *scp;
554 struct atapi_request *atapi_request;

--- 207 unchanged lines hidden ---