1/*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27/*-
28 * Copyright (c) 2002 Eric Moore
29 * Copyright (c) 2002, 2004 LSI Logic Corporation
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 * 3. The party using or redistributing the source code and binary forms
41 * agrees to the disclaimer below and the terms and conditions set forth
42 * herein.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 * SUCH DAMAGE.
55 */
56
57#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27/*-
28 * Copyright (c) 2002 Eric Moore
29 * Copyright (c) 2002, 2004 LSI Logic Corporation
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 * 3. The party using or redistributing the source code and binary forms
41 * agrees to the disclaimer below and the terms and conditions set forth
42 * herein.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 * SUCH DAMAGE.
55 */
56
57#include <sys/cdefs.h>
|
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/kernel.h>
63#include <sys/module.h>
64
65#include <dev/amr/amr_compat.h>
66#include <sys/bus.h>
67#include <sys/conf.h>
68
69#include <machine/bus_memio.h>
70#include <machine/bus_pio.h>
71#include <machine/bus.h>
72#include <machine/resource.h>
73#include <sys/rman.h>
74
75#include <dev/pci/pcireg.h>
76#include <dev/pci/pcivar.h>
77
78#include <dev/amr/amrio.h>
79#include <dev/amr/amrreg.h>
80#include <dev/amr/amrvar.h>
81
82static int amr_pci_probe(device_t dev);
83static int amr_pci_attach(device_t dev);
84static int amr_pci_detach(device_t dev);
85static int amr_pci_shutdown(device_t dev);
86static int amr_pci_suspend(device_t dev);
87static int amr_pci_resume(device_t dev);
88static void amr_pci_intr(void *arg);
89static void amr_pci_free(struct amr_softc *sc);
90static void amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
91static int amr_sglist_map(struct amr_softc *sc);
92static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
93static int amr_setup_mbox(struct amr_softc *sc);
94
95static device_method_t amr_methods[] = {
96 /* Device interface */
97 DEVMETHOD(device_probe, amr_pci_probe),
98 DEVMETHOD(device_attach, amr_pci_attach),
99 DEVMETHOD(device_detach, amr_pci_detach),
100 DEVMETHOD(device_shutdown, amr_pci_shutdown),
101 DEVMETHOD(device_suspend, amr_pci_suspend),
102 DEVMETHOD(device_resume, amr_pci_resume),
103
104 DEVMETHOD(bus_print_child, bus_generic_print_child),
105 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
106 { 0, 0 }
107};
108
109static driver_t amr_pci_driver = {
110 "amr",
111 amr_methods,
112 sizeof(struct amr_softc)
113};
114
115static devclass_t amr_devclass;
116DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0);
117
118static struct
119{
120 int vendor;
121 int device;
122 int flag;
123#define PROBE_SIGNATURE (1<<0)
124} amr_device_ids[] = {
125 {0x101e, 0x9010, 0},
126 {0x101e, 0x9060, 0},
127 {0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */
128 {0x101e, 0x1960, 0},
129 {0x1000, 0x1960, PROBE_SIGNATURE},
130 {0x1000, 0x0407, 0},
131 {0x1000, 0x0408, 0},
132 {0x1000, 0x0409, 0},
133 {0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */
134 {0x1028, 0x000f, 0}, /* perc4/di Verde*/
135 {0x1028, 0x0013, 0}, /* perc4/di */
136 {0, 0, 0}
137};
138
139static int
140amr_pci_probe(device_t dev)
141{
142 int i, sig;
143
144 debug_called(1);
145
146 for (i = 0; amr_device_ids[i].vendor != 0; i++) {
147 if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) &&
148 (pci_get_device(dev) == amr_device_ids[i].device)) {
149
150 /* do we need to test for a signature? */
151 if (amr_device_ids[i].flag & PROBE_SIGNATURE) {
152 sig = pci_read_config(dev, AMR_CFG_SIG, 2);
153 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2))
154 continue;
155 }
156 device_set_desc(dev, LSI_DESC_PCI);
| 59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/kernel.h>
63#include <sys/module.h>
64
65#include <dev/amr/amr_compat.h>
66#include <sys/bus.h>
67#include <sys/conf.h>
68
69#include <machine/bus_memio.h>
70#include <machine/bus_pio.h>
71#include <machine/bus.h>
72#include <machine/resource.h>
73#include <sys/rman.h>
74
75#include <dev/pci/pcireg.h>
76#include <dev/pci/pcivar.h>
77
78#include <dev/amr/amrio.h>
79#include <dev/amr/amrreg.h>
80#include <dev/amr/amrvar.h>
81
82static int amr_pci_probe(device_t dev);
83static int amr_pci_attach(device_t dev);
84static int amr_pci_detach(device_t dev);
85static int amr_pci_shutdown(device_t dev);
86static int amr_pci_suspend(device_t dev);
87static int amr_pci_resume(device_t dev);
88static void amr_pci_intr(void *arg);
89static void amr_pci_free(struct amr_softc *sc);
90static void amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
91static int amr_sglist_map(struct amr_softc *sc);
92static void amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
93static int amr_setup_mbox(struct amr_softc *sc);
94
95static device_method_t amr_methods[] = {
96 /* Device interface */
97 DEVMETHOD(device_probe, amr_pci_probe),
98 DEVMETHOD(device_attach, amr_pci_attach),
99 DEVMETHOD(device_detach, amr_pci_detach),
100 DEVMETHOD(device_shutdown, amr_pci_shutdown),
101 DEVMETHOD(device_suspend, amr_pci_suspend),
102 DEVMETHOD(device_resume, amr_pci_resume),
103
104 DEVMETHOD(bus_print_child, bus_generic_print_child),
105 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
106 { 0, 0 }
107};
108
109static driver_t amr_pci_driver = {
110 "amr",
111 amr_methods,
112 sizeof(struct amr_softc)
113};
114
115static devclass_t amr_devclass;
116DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0);
117
118static struct
119{
120 int vendor;
121 int device;
122 int flag;
123#define PROBE_SIGNATURE (1<<0)
124} amr_device_ids[] = {
125 {0x101e, 0x9010, 0},
126 {0x101e, 0x9060, 0},
127 {0x8086, 0x1960, PROBE_SIGNATURE},/* generic i960RD, check for signature */
128 {0x101e, 0x1960, 0},
129 {0x1000, 0x1960, PROBE_SIGNATURE},
130 {0x1000, 0x0407, 0},
131 {0x1000, 0x0408, 0},
132 {0x1000, 0x0409, 0},
133 {0x1028, 0x000e, PROBE_SIGNATURE}, /* perc4/di i960 */
134 {0x1028, 0x000f, 0}, /* perc4/di Verde*/
135 {0x1028, 0x0013, 0}, /* perc4/di */
136 {0, 0, 0}
137};
138
139static int
140amr_pci_probe(device_t dev)
141{
142 int i, sig;
143
144 debug_called(1);
145
146 for (i = 0; amr_device_ids[i].vendor != 0; i++) {
147 if ((pci_get_vendor(dev) == amr_device_ids[i].vendor) &&
148 (pci_get_device(dev) == amr_device_ids[i].device)) {
149
150 /* do we need to test for a signature? */
151 if (amr_device_ids[i].flag & PROBE_SIGNATURE) {
152 sig = pci_read_config(dev, AMR_CFG_SIG, 2);
153 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2))
154 continue;
155 }
156 device_set_desc(dev, LSI_DESC_PCI);
|
158 }
159 }
160 return(ENXIO);
161}
162
163static int
164amr_pci_attach(device_t dev)
165{
166 struct amr_softc *sc;
167 int rid, rtype, error;
168 u_int32_t command;
169
170 debug_called(1);
171
172 /*
173 * Initialise softc.
174 */
175 sc = device_get_softc(dev);
176 bzero(sc, sizeof(*sc));
177 sc->amr_dev = dev;
178 mtx_init(&sc->amr_io_lock, "AMR IO Lock", NULL, MTX_DEF);
179
180 /* assume failure is 'not configured' */
181 error = ENXIO;
182
183 /*
184 * Determine board type.
185 */
186 command = pci_read_config(dev, PCIR_COMMAND, 1);
187 if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) ||
188 (pci_get_device(dev) == 0x0408) || (pci_get_device(dev) == 0x0409) ||
189 (pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f) ||
190 (pci_get_device(dev) == 0x0013)) {
191 /*
192 * Make sure we are going to be able to talk to this board.
193 */
194 if ((command & PCIM_CMD_MEMEN) == 0) {
195 device_printf(dev, "memory window not available\n");
196 goto out;
197 }
198 sc->amr_type |= AMR_TYPE_QUARTZ;
199
200 } else {
201 /*
202 * Make sure we are going to be able to talk to this board.
203 */
204 if ((command & PCIM_CMD_PORTEN) == 0) {
205 device_printf(dev, "I/O window not available\n");
206 goto out;
207 }
208 }
209
210 /* force the busmaster enable bit on */
211 if (!(command & PCIM_CMD_BUSMASTEREN)) {
212 device_printf(dev, "busmaster bit not set, enabling\n");
213 command |= PCIM_CMD_BUSMASTEREN;
214 pci_write_config(dev, PCIR_COMMAND, command, 2);
215 }
216
217 /*
218 * Allocate the PCI register window.
219 */
220 rid = PCIR_BAR(0);
221 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT;
222 sc->amr_reg = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE);
223 if (sc->amr_reg == NULL) {
224 device_printf(sc->amr_dev, "can't allocate register window\n");
225 goto out;
226 }
227 sc->amr_btag = rman_get_bustag(sc->amr_reg);
228 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg);
229
230 /*
231 * Allocate and connect our interrupt.
232 */
233 rid = 0;
234 sc->amr_irq = bus_alloc_resource_any(sc->amr_dev, SYS_RES_IRQ, &rid,
235 RF_SHAREABLE | RF_ACTIVE);
236 if (sc->amr_irq == NULL) {
237 device_printf(sc->amr_dev, "can't allocate interrupt\n");
238 goto out;
239 }
240 if (bus_setup_intr(sc->amr_dev, sc->amr_irq, INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, amr_pci_intr, sc, &sc->amr_intr)) {
241 device_printf(sc->amr_dev, "can't set up interrupt\n");
242 goto out;
243 }
244
245 debug(2, "interrupt attached");
246
247 /* assume failure is 'out of memory' */
248 error = ENOMEM;
249
250 /*
251 * Allocate the parent bus DMA tag appropriate for PCI.
252 */
253 if (bus_dma_tag_create(NULL, /* parent */
254 1, 0, /* alignment, boundary */
255 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
256 BUS_SPACE_MAXADDR, /* highaddr */
257 NULL, NULL, /* filter, filterarg */
258 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
259 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
260 0, /* flags */
261 NULL, NULL, /* lockfunc, lockarg */
262 &sc->amr_parent_dmat)) {
263 device_printf(dev, "can't allocate parent DMA tag\n");
264 goto out;
265 }
266
267 /*
268 * Create DMA tag for mapping buffers into controller-addressable space.
269 */
270 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
271 1, 0, /* alignment, boundary */
272 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
273 BUS_SPACE_MAXADDR, /* highaddr */
274 NULL, NULL, /* filter, filterarg */
275 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
276 MAXBSIZE, /* maxsegsize */
277 BUS_DMA_ALLOCNOW, /* flags */
278 busdma_lock_mutex, &sc->amr_io_lock, /* lockfunc, lockarg */
279 &sc->amr_buffer_dmat)) {
280 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
281 goto out;
282 }
283
284 debug(2, "dma tag done");
285
286 /*
287 * Allocate and set up mailbox in a bus-visible fashion.
288 */
289 if ((error = amr_setup_mbox(sc)) != 0)
290 goto out;
291
292 debug(2, "mailbox setup");
293
294 /*
295 * Build the scatter/gather buffers.
296 */
297 if (amr_sglist_map(sc))
298 goto out;
299
300 debug(2, "s/g list mapped");
301
302 /*
303 * Do bus-independant initialisation, bring controller online.
304 */
305 error = amr_attach(sc);
306
307out:
308 if (error)
309 amr_pci_free(sc);
310 return(error);
311}
312
313/********************************************************************************
314 * Disconnect from the controller completely, in preparation for unload.
315 */
316static int
317amr_pci_detach(device_t dev)
318{
319 struct amr_softc *sc = device_get_softc(dev);
320 int error;
321
322 debug_called(1);
323
324 if (sc->amr_state & AMR_STATE_OPEN)
325 return(EBUSY);
326
327 if ((error = amr_pci_shutdown(dev)))
328 return(error);
329
330 amr_pci_free(sc);
331
332 return(0);
333}
334
335/********************************************************************************
336 * Bring the controller down to a dormant state and detach all child devices.
337 *
338 * This function is called before detach, system shutdown, or before performing
339 * an operation which may add or delete system disks. (Call amr_startup to
340 * resume normal operation.)
341 *
342 * Note that we can assume that the bioq on the controller is empty, as we won't
343 * allow shutdown if any device is open.
344 */
345static int
346amr_pci_shutdown(device_t dev)
347{
348 struct amr_softc *sc = device_get_softc(dev);
349 int i,error,s;
350
351 debug_called(1);
352
353 /* mark ourselves as in-shutdown */
354 sc->amr_state |= AMR_STATE_SHUTDOWN;
355
356
357 /* flush controller */
358 device_printf(sc->amr_dev, "flushing cache...");
359 printf("%s\n", amr_flush(sc) ? "failed" : "done");
360
361 s = splbio();
362 error = 0;
363
364 /* delete all our child devices */
365 for(i = 0 ; i < AMR_MAXLD; i++) {
366 if( sc->amr_drive[i].al_disk != 0) {
367 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0)
368 goto shutdown_out;
369 sc->amr_drive[i].al_disk = 0;
370 }
371 }
372
373 /* XXX disable interrupts? */
374
375shutdown_out:
376 splx(s);
377 return(error);
378}
379
380/********************************************************************************
381 * Bring the controller to a quiescent state, ready for system suspend.
382 */
383static int
384amr_pci_suspend(device_t dev)
385{
386 struct amr_softc *sc = device_get_softc(dev);
387
388 debug_called(1);
389
390 sc->amr_state |= AMR_STATE_SUSPEND;
391
392 /* flush controller */
393 device_printf(sc->amr_dev, "flushing cache...");
394 printf("%s\n", amr_flush(sc) ? "failed" : "done");
395
396 /* XXX disable interrupts? */
397
398 return(0);
399}
400
401/********************************************************************************
402 * Bring the controller back to a state ready for operation.
403 */
404static int
405amr_pci_resume(device_t dev)
406{
407 struct amr_softc *sc = device_get_softc(dev);
408
409 debug_called(1);
410
411 sc->amr_state &= ~AMR_STATE_SUSPEND;
412
413 /* XXX enable interrupts? */
414
415 return(0);
416}
417
418/*******************************************************************************
419 * Take an interrupt, or be poked by other code to look for interrupt-worthy
420 * status.
421 */
422static void
423amr_pci_intr(void *arg)
424{
425 struct amr_softc *sc = (struct amr_softc *)arg;
426
427 debug_called(2);
428
429 /* collect finished commands, queue anything waiting */
430 mtx_lock(&sc->amr_io_lock);
431 amr_done(sc);
432 mtx_unlock(&sc->amr_io_lock);
433}
434
435/********************************************************************************
436 * Free all of the resources associated with (sc)
437 *
438 * Should not be called if the controller is active.
439 */
440static void
441amr_pci_free(struct amr_softc *sc)
442{
443 u_int8_t *p;
444
445 debug_called(1);
446
447 amr_free(sc);
448
449 /* destroy data-transfer DMA tag */
450 if (sc->amr_buffer_dmat)
451 bus_dma_tag_destroy(sc->amr_buffer_dmat);
452
453 /* free and destroy DMA memory and tag for s/g lists */
454 if (sc->amr_sgtable)
455 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap);
456 if (sc->amr_sg_dmat)
457 bus_dma_tag_destroy(sc->amr_sg_dmat);
458
459 /* free and destroy DMA memory and tag for mailbox */
460 if (sc->amr_mailbox) {
461 p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox;
462 bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap);
463 }
464 if (sc->amr_mailbox_dmat)
465 bus_dma_tag_destroy(sc->amr_mailbox_dmat);
466
467 /* disconnect the interrupt handler */
468 if (sc->amr_intr)
469 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr);
470 if (sc->amr_irq != NULL)
471 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq);
472
473 /* destroy the parent DMA tag */
474 if (sc->amr_parent_dmat)
475 bus_dma_tag_destroy(sc->amr_parent_dmat);
476
477 /* release the register window mapping */
478 if (sc->amr_reg != NULL)
479 bus_release_resource(sc->amr_dev,
480 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT,
481 PCIR_BAR(0), sc->amr_reg);
482}
483
484/********************************************************************************
485 * Allocate and map the scatter/gather table in bus space.
486 */
487static void
488amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
489{
490 struct amr_softc *sc = (struct amr_softc *)arg;
491
492 debug_called(1);
493
494 /* save base of s/g table's address in bus space */
495 sc->amr_sgbusaddr = segs->ds_addr;
496}
497
498static int
499amr_sglist_map(struct amr_softc *sc)
500{
501 size_t segsize;
502 int error;
503
504 debug_called(1);
505
506 /*
507 * Create a single tag describing a region large enough to hold all of
508 * the s/g lists we will need.
509 *
510 * Note that we could probably use AMR_LIMITCMD here, but that may become tunable.
511 */
512 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD;
513 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
514 1, 0, /* alignment, boundary */
515 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
516 BUS_SPACE_MAXADDR, /* highaddr */
517 NULL, NULL, /* filter, filterarg */
518 segsize, 1, /* maxsize, nsegments */
519 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
520 0, /* flags */
521 busdma_lock_mutex, /* lockfunc */
522 &Giant, /* lockarg */
523 &sc->amr_sg_dmat);
524 if (error != 0) {
525 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n");
526 return(ENOMEM);
527 }
528
529 /*
530 * Allocate enough s/g maps for all commands and permanently map them into
531 * controller-visible space.
532 *
533 * XXX this assumes we can get enough space for all the s/g maps in one
534 * contiguous slab. We may need to switch to a more complex arrangement where
535 * we allocate in smaller chunks and keep a lookup table from slot to bus address.
536 *
537 * XXX HACK ALERT: at least some controllers don't like the s/g memory being
538 * allocated below 0x2000. We leak some memory if we get some
539 * below this mark and allocate again. We should be able to
540 * avoid this with the tag setup, but that does't seem to work.
541 */
542retry:
543 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
544 if (error) {
545 device_printf(sc->amr_dev, "can't allocate s/g table\n");
546 return(ENOMEM);
547 }
548 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0);
549 if (sc->amr_sgbusaddr < 0x2000) {
550 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr);
551 goto retry;
552 }
553 return(0);
554}
555
556/********************************************************************************
557 * Allocate and set up mailbox areas for the controller (sc)
558 *
559 * The basic mailbox structure should be 16-byte aligned. This means that the
560 * mailbox64 structure has 4 bytes hanging off the bottom.
561 */
562static void
563amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
564{
565 struct amr_softc *sc = (struct amr_softc *)arg;
566
567 debug_called(1);
568
569 /* save phsyical base of the basic mailbox structure */
570 sc->amr_mailboxphys = segs->ds_addr + 16;
571}
572
573static int
574amr_setup_mbox(struct amr_softc *sc)
575{
576 int error;
577 u_int8_t *p;
578
579 debug_called(1);
580
581 /*
582 * Create a single tag describing a region large enough to hold the entire
583 * mailbox.
584 */
585 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
586 16, 0, /* alignment, boundary */
587 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
588 BUS_SPACE_MAXADDR, /* highaddr */
589 NULL, NULL, /* filter, filterarg */
590 sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */
591 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
592 0, /* flags */
593 busdma_lock_mutex, /* lockfunc */
594 &Giant, /* lockarg */
595 &sc->amr_mailbox_dmat);
596 if (error != 0) {
597 device_printf(sc->amr_dev, "can't allocate mailbox tag\n");
598 return(ENOMEM);
599 }
600
601 /*
602 * Allocate the mailbox structure and permanently map it into
603 * controller-visible space.
604 */
605 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT,
606 &sc->amr_mailbox_dmamap);
607 if (error) {
608 device_printf(sc->amr_dev, "can't allocate mailbox memory\n");
609 return(ENOMEM);
610 }
611 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p,
612 sizeof(struct amr_mailbox64), amr_setup_mbox_helper, sc, 0);
613 /*
614 * Conventional mailbox is inside the mailbox64 region.
615 */
616 bzero(p, sizeof(struct amr_mailbox64));
617 sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12);
618 sc->amr_mailbox = (struct amr_mailbox *)(p + 16);
619
620 return(0);
621}
| 158 }
159 }
160 return(ENXIO);
161}
162
163static int
164amr_pci_attach(device_t dev)
165{
166 struct amr_softc *sc;
167 int rid, rtype, error;
168 u_int32_t command;
169
170 debug_called(1);
171
172 /*
173 * Initialise softc.
174 */
175 sc = device_get_softc(dev);
176 bzero(sc, sizeof(*sc));
177 sc->amr_dev = dev;
178 mtx_init(&sc->amr_io_lock, "AMR IO Lock", NULL, MTX_DEF);
179
180 /* assume failure is 'not configured' */
181 error = ENXIO;
182
183 /*
184 * Determine board type.
185 */
186 command = pci_read_config(dev, PCIR_COMMAND, 1);
187 if ((pci_get_device(dev) == 0x1960) || (pci_get_device(dev) == 0x0407) ||
188 (pci_get_device(dev) == 0x0408) || (pci_get_device(dev) == 0x0409) ||
189 (pci_get_device(dev) == 0x000e) || (pci_get_device(dev) == 0x000f) ||
190 (pci_get_device(dev) == 0x0013)) {
191 /*
192 * Make sure we are going to be able to talk to this board.
193 */
194 if ((command & PCIM_CMD_MEMEN) == 0) {
195 device_printf(dev, "memory window not available\n");
196 goto out;
197 }
198 sc->amr_type |= AMR_TYPE_QUARTZ;
199
200 } else {
201 /*
202 * Make sure we are going to be able to talk to this board.
203 */
204 if ((command & PCIM_CMD_PORTEN) == 0) {
205 device_printf(dev, "I/O window not available\n");
206 goto out;
207 }
208 }
209
210 /* force the busmaster enable bit on */
211 if (!(command & PCIM_CMD_BUSMASTEREN)) {
212 device_printf(dev, "busmaster bit not set, enabling\n");
213 command |= PCIM_CMD_BUSMASTEREN;
214 pci_write_config(dev, PCIR_COMMAND, command, 2);
215 }
216
217 /*
218 * Allocate the PCI register window.
219 */
220 rid = PCIR_BAR(0);
221 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT;
222 sc->amr_reg = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE);
223 if (sc->amr_reg == NULL) {
224 device_printf(sc->amr_dev, "can't allocate register window\n");
225 goto out;
226 }
227 sc->amr_btag = rman_get_bustag(sc->amr_reg);
228 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg);
229
230 /*
231 * Allocate and connect our interrupt.
232 */
233 rid = 0;
234 sc->amr_irq = bus_alloc_resource_any(sc->amr_dev, SYS_RES_IRQ, &rid,
235 RF_SHAREABLE | RF_ACTIVE);
236 if (sc->amr_irq == NULL) {
237 device_printf(sc->amr_dev, "can't allocate interrupt\n");
238 goto out;
239 }
240 if (bus_setup_intr(sc->amr_dev, sc->amr_irq, INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, amr_pci_intr, sc, &sc->amr_intr)) {
241 device_printf(sc->amr_dev, "can't set up interrupt\n");
242 goto out;
243 }
244
245 debug(2, "interrupt attached");
246
247 /* assume failure is 'out of memory' */
248 error = ENOMEM;
249
250 /*
251 * Allocate the parent bus DMA tag appropriate for PCI.
252 */
253 if (bus_dma_tag_create(NULL, /* parent */
254 1, 0, /* alignment, boundary */
255 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
256 BUS_SPACE_MAXADDR, /* highaddr */
257 NULL, NULL, /* filter, filterarg */
258 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
259 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
260 0, /* flags */
261 NULL, NULL, /* lockfunc, lockarg */
262 &sc->amr_parent_dmat)) {
263 device_printf(dev, "can't allocate parent DMA tag\n");
264 goto out;
265 }
266
267 /*
268 * Create DMA tag for mapping buffers into controller-addressable space.
269 */
270 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
271 1, 0, /* alignment, boundary */
272 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
273 BUS_SPACE_MAXADDR, /* highaddr */
274 NULL, NULL, /* filter, filterarg */
275 MAXBSIZE, AMR_NSEG, /* maxsize, nsegments */
276 MAXBSIZE, /* maxsegsize */
277 BUS_DMA_ALLOCNOW, /* flags */
278 busdma_lock_mutex, &sc->amr_io_lock, /* lockfunc, lockarg */
279 &sc->amr_buffer_dmat)) {
280 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
281 goto out;
282 }
283
284 debug(2, "dma tag done");
285
286 /*
287 * Allocate and set up mailbox in a bus-visible fashion.
288 */
289 if ((error = amr_setup_mbox(sc)) != 0)
290 goto out;
291
292 debug(2, "mailbox setup");
293
294 /*
295 * Build the scatter/gather buffers.
296 */
297 if (amr_sglist_map(sc))
298 goto out;
299
300 debug(2, "s/g list mapped");
301
302 /*
303 * Do bus-independant initialisation, bring controller online.
304 */
305 error = amr_attach(sc);
306
307out:
308 if (error)
309 amr_pci_free(sc);
310 return(error);
311}
312
313/********************************************************************************
314 * Disconnect from the controller completely, in preparation for unload.
315 */
316static int
317amr_pci_detach(device_t dev)
318{
319 struct amr_softc *sc = device_get_softc(dev);
320 int error;
321
322 debug_called(1);
323
324 if (sc->amr_state & AMR_STATE_OPEN)
325 return(EBUSY);
326
327 if ((error = amr_pci_shutdown(dev)))
328 return(error);
329
330 amr_pci_free(sc);
331
332 return(0);
333}
334
335/********************************************************************************
336 * Bring the controller down to a dormant state and detach all child devices.
337 *
338 * This function is called before detach, system shutdown, or before performing
339 * an operation which may add or delete system disks. (Call amr_startup to
340 * resume normal operation.)
341 *
342 * Note that we can assume that the bioq on the controller is empty, as we won't
343 * allow shutdown if any device is open.
344 */
345static int
346amr_pci_shutdown(device_t dev)
347{
348 struct amr_softc *sc = device_get_softc(dev);
349 int i,error,s;
350
351 debug_called(1);
352
353 /* mark ourselves as in-shutdown */
354 sc->amr_state |= AMR_STATE_SHUTDOWN;
355
356
357 /* flush controller */
358 device_printf(sc->amr_dev, "flushing cache...");
359 printf("%s\n", amr_flush(sc) ? "failed" : "done");
360
361 s = splbio();
362 error = 0;
363
364 /* delete all our child devices */
365 for(i = 0 ; i < AMR_MAXLD; i++) {
366 if( sc->amr_drive[i].al_disk != 0) {
367 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0)
368 goto shutdown_out;
369 sc->amr_drive[i].al_disk = 0;
370 }
371 }
372
373 /* XXX disable interrupts? */
374
375shutdown_out:
376 splx(s);
377 return(error);
378}
379
380/********************************************************************************
381 * Bring the controller to a quiescent state, ready for system suspend.
382 */
383static int
384amr_pci_suspend(device_t dev)
385{
386 struct amr_softc *sc = device_get_softc(dev);
387
388 debug_called(1);
389
390 sc->amr_state |= AMR_STATE_SUSPEND;
391
392 /* flush controller */
393 device_printf(sc->amr_dev, "flushing cache...");
394 printf("%s\n", amr_flush(sc) ? "failed" : "done");
395
396 /* XXX disable interrupts? */
397
398 return(0);
399}
400
401/********************************************************************************
402 * Bring the controller back to a state ready for operation.
403 */
404static int
405amr_pci_resume(device_t dev)
406{
407 struct amr_softc *sc = device_get_softc(dev);
408
409 debug_called(1);
410
411 sc->amr_state &= ~AMR_STATE_SUSPEND;
412
413 /* XXX enable interrupts? */
414
415 return(0);
416}
417
418/*******************************************************************************
419 * Take an interrupt, or be poked by other code to look for interrupt-worthy
420 * status.
421 */
422static void
423amr_pci_intr(void *arg)
424{
425 struct amr_softc *sc = (struct amr_softc *)arg;
426
427 debug_called(2);
428
429 /* collect finished commands, queue anything waiting */
430 mtx_lock(&sc->amr_io_lock);
431 amr_done(sc);
432 mtx_unlock(&sc->amr_io_lock);
433}
434
435/********************************************************************************
436 * Free all of the resources associated with (sc)
437 *
438 * Should not be called if the controller is active.
439 */
440static void
441amr_pci_free(struct amr_softc *sc)
442{
443 u_int8_t *p;
444
445 debug_called(1);
446
447 amr_free(sc);
448
449 /* destroy data-transfer DMA tag */
450 if (sc->amr_buffer_dmat)
451 bus_dma_tag_destroy(sc->amr_buffer_dmat);
452
453 /* free and destroy DMA memory and tag for s/g lists */
454 if (sc->amr_sgtable)
455 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap);
456 if (sc->amr_sg_dmat)
457 bus_dma_tag_destroy(sc->amr_sg_dmat);
458
459 /* free and destroy DMA memory and tag for mailbox */
460 if (sc->amr_mailbox) {
461 p = (u_int8_t *)(uintptr_t)(volatile void *)sc->amr_mailbox;
462 bus_dmamem_free(sc->amr_mailbox_dmat, p - 16, sc->amr_mailbox_dmamap);
463 }
464 if (sc->amr_mailbox_dmat)
465 bus_dma_tag_destroy(sc->amr_mailbox_dmat);
466
467 /* disconnect the interrupt handler */
468 if (sc->amr_intr)
469 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr);
470 if (sc->amr_irq != NULL)
471 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq);
472
473 /* destroy the parent DMA tag */
474 if (sc->amr_parent_dmat)
475 bus_dma_tag_destroy(sc->amr_parent_dmat);
476
477 /* release the register window mapping */
478 if (sc->amr_reg != NULL)
479 bus_release_resource(sc->amr_dev,
480 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT,
481 PCIR_BAR(0), sc->amr_reg);
482}
483
484/********************************************************************************
485 * Allocate and map the scatter/gather table in bus space.
486 */
487static void
488amr_sglist_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
489{
490 struct amr_softc *sc = (struct amr_softc *)arg;
491
492 debug_called(1);
493
494 /* save base of s/g table's address in bus space */
495 sc->amr_sgbusaddr = segs->ds_addr;
496}
497
498static int
499amr_sglist_map(struct amr_softc *sc)
500{
501 size_t segsize;
502 int error;
503
504 debug_called(1);
505
506 /*
507 * Create a single tag describing a region large enough to hold all of
508 * the s/g lists we will need.
509 *
510 * Note that we could probably use AMR_LIMITCMD here, but that may become tunable.
511 */
512 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD;
513 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
514 1, 0, /* alignment, boundary */
515 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
516 BUS_SPACE_MAXADDR, /* highaddr */
517 NULL, NULL, /* filter, filterarg */
518 segsize, 1, /* maxsize, nsegments */
519 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
520 0, /* flags */
521 busdma_lock_mutex, /* lockfunc */
522 &Giant, /* lockarg */
523 &sc->amr_sg_dmat);
524 if (error != 0) {
525 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n");
526 return(ENOMEM);
527 }
528
529 /*
530 * Allocate enough s/g maps for all commands and permanently map them into
531 * controller-visible space.
532 *
533 * XXX this assumes we can get enough space for all the s/g maps in one
534 * contiguous slab. We may need to switch to a more complex arrangement where
535 * we allocate in smaller chunks and keep a lookup table from slot to bus address.
536 *
537 * XXX HACK ALERT: at least some controllers don't like the s/g memory being
538 * allocated below 0x2000. We leak some memory if we get some
539 * below this mark and allocate again. We should be able to
540 * avoid this with the tag setup, but that does't seem to work.
541 */
542retry:
543 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
544 if (error) {
545 device_printf(sc->amr_dev, "can't allocate s/g table\n");
546 return(ENOMEM);
547 }
548 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, sc->amr_sgtable, segsize, amr_sglist_map_helper, sc, 0);
549 if (sc->amr_sgbusaddr < 0x2000) {
550 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr);
551 goto retry;
552 }
553 return(0);
554}
555
556/********************************************************************************
557 * Allocate and set up mailbox areas for the controller (sc)
558 *
559 * The basic mailbox structure should be 16-byte aligned. This means that the
560 * mailbox64 structure has 4 bytes hanging off the bottom.
561 */
562static void
563amr_setup_mbox_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
564{
565 struct amr_softc *sc = (struct amr_softc *)arg;
566
567 debug_called(1);
568
569 /* save phsyical base of the basic mailbox structure */
570 sc->amr_mailboxphys = segs->ds_addr + 16;
571}
572
573static int
574amr_setup_mbox(struct amr_softc *sc)
575{
576 int error;
577 u_int8_t *p;
578
579 debug_called(1);
580
581 /*
582 * Create a single tag describing a region large enough to hold the entire
583 * mailbox.
584 */
585 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
586 16, 0, /* alignment, boundary */
587 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
588 BUS_SPACE_MAXADDR, /* highaddr */
589 NULL, NULL, /* filter, filterarg */
590 sizeof(struct amr_mailbox) + 16, 1, /* maxsize, nsegments */
591 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
592 0, /* flags */
593 busdma_lock_mutex, /* lockfunc */
594 &Giant, /* lockarg */
595 &sc->amr_mailbox_dmat);
596 if (error != 0) {
597 device_printf(sc->amr_dev, "can't allocate mailbox tag\n");
598 return(ENOMEM);
599 }
600
601 /*
602 * Allocate the mailbox structure and permanently map it into
603 * controller-visible space.
604 */
605 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT,
606 &sc->amr_mailbox_dmamap);
607 if (error) {
608 device_printf(sc->amr_dev, "can't allocate mailbox memory\n");
609 return(ENOMEM);
610 }
611 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p,
612 sizeof(struct amr_mailbox64), amr_setup_mbox_helper, sc, 0);
613 /*
614 * Conventional mailbox is inside the mailbox64 region.
615 */
616 bzero(p, sizeof(struct amr_mailbox64));
617 sc->amr_mailbox64 = (struct amr_mailbox64 *)(p + 12);
618 sc->amr_mailbox = (struct amr_mailbox *)(p + 16);
619
620 return(0);
621}
|