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ar9300_radio.c (250172) ar9300_radio.c (252237)
1/*
2 * Copyright (c) 2013 Qualcomm Atheros, Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH

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81static HAL_BOOL
82ar9300_set_channel(struct ath_hal *ah, struct ieee80211_channel *chan)
83{
84 u_int16_t b_mode, frac_mode = 0, a_mode_ref_sel = 0;
85 u_int32_t freq, channel_sel, reg32;
86 u_int8_t clk_25mhz = AH9300(ah)->clk_25mhz;
87 CHAN_CENTERS centers;
88 int load_synth_channel;
1/*
2 * Copyright (c) 2013 Qualcomm Atheros, Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH

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81static HAL_BOOL
82ar9300_set_channel(struct ath_hal *ah, struct ieee80211_channel *chan)
83{
84 u_int16_t b_mode, frac_mode = 0, a_mode_ref_sel = 0;
85 u_int32_t freq, channel_sel, reg32;
86 u_int8_t clk_25mhz = AH9300(ah)->clk_25mhz;
87 CHAN_CENTERS centers;
88 int load_synth_channel;
89#ifdef AH_DEBUG_ALQ
90 HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
89 HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
91#endif
92
93 /*
94 * Put this behind AH_DEBUG_ALQ for now until the Hornet
95 * channel_sel code below is made to work.
96 */
97#ifdef AH_DEBUG_ALQ
98 OS_MARK(ah, AH_MARK_SETCHANNEL, ichan->channel);
99#endif
100
101 ar9300_get_channel_centers(ah, chan, &centers);
102 freq = centers.synth_center;
103
104
105 if (freq < 4800) { /* 2 GHz, fractional mode */
106 b_mode = 1; /* 2 GHz */
107
108 if (AR_SREV_HORNET(ah)) {
90
91 /*
92 * Put this behind AH_DEBUG_ALQ for now until the Hornet
93 * channel_sel code below is made to work.
94 */
95#ifdef AH_DEBUG_ALQ
96 OS_MARK(ah, AH_MARK_SETCHANNEL, ichan->channel);
97#endif
98
99 ar9300_get_channel_centers(ah, chan, &centers);
100 freq = centers.synth_center;
101
102
103 if (freq < 4800) { /* 2 GHz, fractional mode */
104 b_mode = 1; /* 2 GHz */
105
106 if (AR_SREV_HORNET(ah)) {
109 /*
110 * XXX TODO: this should call ieee80211_mhz2ieee which will
111 * take care of the up/down conversion and GSM mapping.
112 * However, the HAL _can't_ call that, so we'll need to
113 * introduce it in ah_osdep or something.
114 */
115#if 0
116 u_int32_t ichan =
117 ieee80211_mhz2ieee(ah, chan->ic_freq, chan->ic_flags);
118 HALASSERT(ichan > 0 && ichan <= 14);
119 if (clk_25mhz) {
120 channel_sel = ar9300_chansel_xtal_25M[ichan - 1];
121 } else {
122 channel_sel = ar9300_chansel_xtal_40M[ichan - 1];
123 }
107#if 0
108 u_int32_t ichan =
109 ieee80211_mhz2ieee(ah, chan->ic_freq, chan->ic_flags);
110 HALASSERT(ichan > 0 && ichan <= 14);
111 if (clk_25mhz) {
112 channel_sel = ar9300_chansel_xtal_25M[ichan - 1];
113 } else {
114 channel_sel = ar9300_chansel_xtal_40M[ichan - 1];
115 }
124#else
125 ath_hal_printf(ah, "%s: unimplemented, implement!\n", __func__);
126 return AH_FALSE;
127#endif
116#endif
117 uint32_t i;
118
119 i = ath_hal_mhz2ieee_2ghz(ah, ichan);
120 HALASSERT(i > 0 && i <= 14);
121 if (clk_25mhz) {
122 channel_sel = ar9300_chansel_xtal_25M[i - 1];
123 } else {
124 channel_sel = ar9300_chansel_xtal_40M[i - 1];
125 }
128 } else if (AR_SREV_POSEIDON(ah) || AR_SREV_APHRODITE(ah)) {
129 u_int32_t channel_frac;
130 /*
131 * freq_ref = (40 / (refdiva >> a_mode_ref_sel));
132 * (where refdiva = 1 and amoderefsel = 0)
133 * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
134 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
135 */

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126 } else if (AR_SREV_POSEIDON(ah) || AR_SREV_APHRODITE(ah)) {
127 u_int32_t channel_frac;
128 /*
129 * freq_ref = (40 / (refdiva >> a_mode_ref_sel));
130 * (where refdiva = 1 and amoderefsel = 0)
131 * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
132 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
133 */

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