1/* 2 * Copyright (c) 2013 Ian Lepore 3 * Copyright (c) 2012 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * Freescale i.MX6 Common Device Tree Source. 28 * There are enough differences between the Solo, Dual, Quad, and *-lite 29 * flavors of this SoC that eventually we will need a finer-grained breakdown 30 * of some of this stuff. For now this file works for all of them. I think. 31 *
| 1/* 2 * Copyright (c) 2013 Ian Lepore 3 * Copyright (c) 2012 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * Freescale i.MX6 Common Device Tree Source. 28 * There are enough differences between the Solo, Dual, Quad, and *-lite 29 * flavors of this SoC that eventually we will need a finer-grained breakdown 30 * of some of this stuff. For now this file works for all of them. I think. 31 *
|
32 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/imx6.dtsi 266348 2014-05-17 20:22:22Z ian $
| 32 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/imx6.dtsi 273661 2014-10-26 02:37:42Z ian $
|
33 */ 34 35/ { 36 cpus { 37 #address-cells = <1>; 38 #size-cells = <0>; 39 40 cpu@0 { 41 device_type = "cpu"; 42 compatible = "ARM,MCIMX6"; 43 reg = <0x0>; 44 d-cache-line-size = <32>; 45 i-cache-line-size = <32>; 46 d-cache-size = <0x8000>; 47 i-cache-size = <0x8000>; 48 /* TODO: describe L2 cache also */ 49 timebase-frequency = <0>; 50 bus-frequency = <0>; 51 clock-frequency = <0>; 52 }; 53 }; 54 55 aliases { 56 soc = &SOC; 57 }; 58 59 SOC: soc@00000000 { 60 compatible = "simple-bus"; 61 #address-cells = <1>; 62 #size-cells = <1>; 63 interrupt-parent = <&gic>; 64 ranges = <0x00000000 0x00000000 0x10000000>; 65 66 gic: generic-interrupt-controller@00a00100 { 67 compatible = "arm,gic"; 68 interrupt-controller; 69 #interrupt-cells = <1>; 70 reg = <0x00a01000 0x00001000 71 0x00a00100 0x00000100>; 72 }; 73 74 mp_tmr0@00a00200 { 75 compatible = "arm,mpcore-timers"; 76 reg = <0x00a00200 0x100 77 0x00a00600 0x100>; 78 interrupts = <27 29>; 79 interrupt-parent = <&gic>; 80 }; 81 82 l2-cache@00a02000 { 83 compatible = "arm,pl310-cache", "arm,pl310"; 84 reg = <0xa02000 0x1000>; 85 interrupts = <124>; 86 cache-level = <0x2>; 87 interrupt-parent = < &gic >; 88 }; 89 90 aips@02000000 { /* AIPS1 */ 91 compatible = "fsl,aips-bus", "simple-bus"; 92 #address-cells = <1>; 93 #size-cells = <1>; 94 interrupt-parent = <&gic>; 95 reg = <0x02000000 0x00100000>; 96 ranges; 97 98 /* Required by many devices, so better to stay first */ 99 clks: ccm@020c4000 { 100 compatible = "fsl,imx6q-ccm"; 101 reg = <0x020c4000 0x4000>; 102 interrupts = <119 120>; 103 }; 104
| 33 */ 34 35/ { 36 cpus { 37 #address-cells = <1>; 38 #size-cells = <0>; 39 40 cpu@0 { 41 device_type = "cpu"; 42 compatible = "ARM,MCIMX6"; 43 reg = <0x0>; 44 d-cache-line-size = <32>; 45 i-cache-line-size = <32>; 46 d-cache-size = <0x8000>; 47 i-cache-size = <0x8000>; 48 /* TODO: describe L2 cache also */ 49 timebase-frequency = <0>; 50 bus-frequency = <0>; 51 clock-frequency = <0>; 52 }; 53 }; 54 55 aliases { 56 soc = &SOC; 57 }; 58 59 SOC: soc@00000000 { 60 compatible = "simple-bus"; 61 #address-cells = <1>; 62 #size-cells = <1>; 63 interrupt-parent = <&gic>; 64 ranges = <0x00000000 0x00000000 0x10000000>; 65 66 gic: generic-interrupt-controller@00a00100 { 67 compatible = "arm,gic"; 68 interrupt-controller; 69 #interrupt-cells = <1>; 70 reg = <0x00a01000 0x00001000 71 0x00a00100 0x00000100>; 72 }; 73 74 mp_tmr0@00a00200 { 75 compatible = "arm,mpcore-timers"; 76 reg = <0x00a00200 0x100 77 0x00a00600 0x100>; 78 interrupts = <27 29>; 79 interrupt-parent = <&gic>; 80 }; 81 82 l2-cache@00a02000 { 83 compatible = "arm,pl310-cache", "arm,pl310"; 84 reg = <0xa02000 0x1000>; 85 interrupts = <124>; 86 cache-level = <0x2>; 87 interrupt-parent = < &gic >; 88 }; 89 90 aips@02000000 { /* AIPS1 */ 91 compatible = "fsl,aips-bus", "simple-bus"; 92 #address-cells = <1>; 93 #size-cells = <1>; 94 interrupt-parent = <&gic>; 95 reg = <0x02000000 0x00100000>; 96 ranges; 97 98 /* Required by many devices, so better to stay first */ 99 clks: ccm@020c4000 { 100 compatible = "fsl,imx6q-ccm"; 101 reg = <0x020c4000 0x4000>; 102 interrupts = <119 120>; 103 }; 104
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| 105 /* System Reset Controller */ 106 src: src@4006E000 { 107 compatible = "fsl,imx6-src"; 108 reg = <0x020D8000 0x100>; 109 }; 110 111 sdma: sdma@020ec000 { 112 compatible = "fsl,imx6q-sdma"; 113 reg = <0x020ec000 0x4000>; 114 interrupt-parent = <&gic>; 115 interrupts = <34>; 116 status = "disabled"; 117 }; 118
|
105 anatop: anatop@020c8000 { 106 compatible = "fsl,imx6q-anatop"; 107 reg = <0x020c8000 0x1000>; 108 interrupt-parent = <&gic>; 109 interrupts = <49>; 110 }; 111 112 gpt: timer@02098000 { 113 compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt"; 114 reg = <0x02098000 0x4000>; 115 interrupt-parent = <&gic>; interrupts = <87>; 116 }; 117
| 119 anatop: anatop@020c8000 { 120 compatible = "fsl,imx6q-anatop"; 121 reg = <0x020c8000 0x1000>; 122 interrupt-parent = <&gic>; 123 interrupts = <49>; 124 }; 125 126 gpt: timer@02098000 { 127 compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt"; 128 reg = <0x02098000 0x4000>; 129 interrupt-parent = <&gic>; interrupts = <87>; 130 }; 131
|
118// iomux@73fa8000 { 119// compatible = "fsl,imx51-iomux"; 120// reg = <0x73fa8000 0x4000>; 121// interrupt-parent = <&gic>; interrupts = <7>; 122// status = "disabled"; 123// };
| 132 iomux@020e0000 { 133 compatible = "fsl,imx6q-iomux"; 134 reg = <0x020e0000 0x4000>; 135 interrupt-parent = <&gic>; 136 interrupts = <32>; 137 status = "disabled"; 138 };
|
124 125 gpio1: gpio@0209c000 { 126 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 127 reg = <0x0209c000 0x4000>;
| 139 140 gpio1: gpio@0209c000 { 141 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 142 reg = <0x0209c000 0x4000>;
|
128 interrupts = <0 66 0x04 0 67 0x04>;
| 143 interrupts = < 98 99 >;
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129 gpio-controller; 130 #gpio-cells = <2>; 131 interrupt-controller; 132 #interrupt-cells = <2>;
| 144 gpio-controller; 145 #gpio-cells = <2>; 146 interrupt-controller; 147 #interrupt-cells = <2>;
|
| 148 status = "disabled";
|
133 };
| 149 };
|
134
| 150
|
135 gpio2: gpio@020a0000 { 136 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 137 reg = <0x020a0000 0x4000>;
| 151 gpio2: gpio@020a0000 { 152 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 153 reg = <0x020a0000 0x4000>;
|
138 interrupts = <0 68 0x04 0 69 0x04>;
| 154 interrupts = < 100 101 >;
|
139 gpio-controller; 140 #gpio-cells = <2>; 141 interrupt-controller; 142 #interrupt-cells = <2>;
| 155 gpio-controller; 156 #gpio-cells = <2>; 157 interrupt-controller; 158 #interrupt-cells = <2>;
|
| 159 status = "disabled";
|
143 };
| 160 };
|
144
| 161
|
145 gpio3: gpio@020a4000 { 146 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 147 reg = <0x020a4000 0x4000>;
| 162 gpio3: gpio@020a4000 { 163 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 164 reg = <0x020a4000 0x4000>;
|
148 interrupts = <0 70 0x04 0 71 0x04>;
| 165 interrupts = < 102 103 >;
|
149 gpio-controller; 150 #gpio-cells = <2>; 151 interrupt-controller; 152 #interrupt-cells = <2>;
| 166 gpio-controller; 167 #gpio-cells = <2>; 168 interrupt-controller; 169 #interrupt-cells = <2>;
|
| 170 status = "disabled";
|
153 };
| 171 };
|
154
| 172
|
155 gpio4: gpio@020a8000 { 156 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 157 reg = <0x020a8000 0x4000>;
| 173 gpio4: gpio@020a8000 { 174 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 175 reg = <0x020a8000 0x4000>;
|
158 interrupts = <0 72 0x04 0 73 0x04>;
| 176 interrupts = < 104 105 >;
|
159 gpio-controller; 160 #gpio-cells = <2>; 161 interrupt-controller; 162 #interrupt-cells = <2>;
| 177 gpio-controller; 178 #gpio-cells = <2>; 179 interrupt-controller; 180 #interrupt-cells = <2>;
|
| 181 status = "disabled";
|
163 };
| 182 };
|
164
| 183
|
165 gpio5: gpio@020ac000 { 166 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 167 reg = <0x020ac000 0x4000>;
| 184 gpio5: gpio@020ac000 { 185 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 186 reg = <0x020ac000 0x4000>;
|
168 interrupts = <0 74 0x04 0 75 0x04>;
| 187 interrupts = < 106 107 >;
|
169 gpio-controller; 170 #gpio-cells = <2>; 171 interrupt-controller; 172 #interrupt-cells = <2>;
| 188 gpio-controller; 189 #gpio-cells = <2>; 190 interrupt-controller; 191 #interrupt-cells = <2>;
|
| 192 status = "disabled";
|
173 };
| 193 };
|
174
| 194
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175 gpio6: gpio@020b0000 { 176 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 177 reg = <0x020b0000 0x4000>;
| 195 gpio6: gpio@020b0000 { 196 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 197 reg = <0x020b0000 0x4000>;
|
178 interrupts = <0 76 0x04 0 77 0x04>;
| 198 interrupts = < 108 109 >;
|
179 gpio-controller; 180 #gpio-cells = <2>; 181 interrupt-controller; 182 #interrupt-cells = <2>;
| 199 gpio-controller; 200 #gpio-cells = <2>; 201 interrupt-controller; 202 #interrupt-cells = <2>;
|
| 203 status = "disabled";
|
183 };
| 204 };
|
184
| 205
|
185 gpio7: gpio@020b4000 { 186 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 187 reg = <0x020b4000 0x4000>;
| 206 gpio7: gpio@020b4000 { 207 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 208 reg = <0x020b4000 0x4000>;
|
188 interrupts = <0 78 0x04 0 79 0x04>;
| 209 interrupts = < 110 111 >;
|
189 gpio-controller; 190 #gpio-cells = <2>; 191 interrupt-controller; 192 #interrupt-cells = <2>;
| 210 gpio-controller; 211 #gpio-cells = <2>; 212 interrupt-controller; 213 #interrupt-cells = <2>;
|
| 214 status = "disabled";
|
193 }; 194 195 uart1: serial@02020000 { 196 compatible = "fsl,imx6q-uart"; 197 reg = <0x02020000 0x4000>;
| 215 }; 216 217 uart1: serial@02020000 { 218 compatible = "fsl,imx6q-uart"; 219 reg = <0x02020000 0x4000>;
|
198 interrupt-parent = <&gic>;
| 220 interrupt-parent = <&gic>;
|
199 interrupts = <58>; 200 clock-frequency = <80000000>; 201 status = "disabled"; 202 }; 203 204 uart2: serial@021e8000 { 205 compatible = "fsl,imx6q-uart"; 206 reg = <0x021e8000 0x4000>;
| 221 interrupts = <58>; 222 clock-frequency = <80000000>; 223 status = "disabled"; 224 }; 225 226 uart2: serial@021e8000 { 227 compatible = "fsl,imx6q-uart"; 228 reg = <0x021e8000 0x4000>;
|
207 interrupt-parent = <&gic>;
| 229 interrupt-parent = <&gic>;
|
208 interrupts = <59>; 209 clock-frequency = <80000000>; 210 status = "disabled"; 211 }; 212 213 uart3: serial@021ec000 { 214 compatible = "fsl,imx6q-uart"; 215 reg = <0x021ec000 0x4000>;
| 230 interrupts = <59>; 231 clock-frequency = <80000000>; 232 status = "disabled"; 233 }; 234 235 uart3: serial@021ec000 { 236 compatible = "fsl,imx6q-uart"; 237 reg = <0x021ec000 0x4000>;
|
216 interrupt-parent = <&gic>;
| 238 interrupt-parent = <&gic>;
|
217 interrupts = <60>; 218 clock-frequency = <80000000>; 219 status = "disabled"; 220 }; 221 222 uart4: serial@021f0000 { 223 compatible = "fsl,imx6q-uart"; 224 reg = <0x021f0000 0x4000>;
| 239 interrupts = <60>; 240 clock-frequency = <80000000>; 241 status = "disabled"; 242 }; 243 244 uart4: serial@021f0000 { 245 compatible = "fsl,imx6q-uart"; 246 reg = <0x021f0000 0x4000>;
|
225 interrupt-parent = <&gic>;
| 247 interrupt-parent = <&gic>;
|
226 interrupts = <61>; 227 clock-frequency = <80000000>; 228 status = "disabled"; 229 }; 230 231 uart5: serial@021f4000 { 232 compatible = "fsl,imx6q-uart"; 233 reg = <0x021f4000 0x4000>;
| 248 interrupts = <61>; 249 clock-frequency = <80000000>; 250 status = "disabled"; 251 }; 252 253 uart5: serial@021f4000 { 254 compatible = "fsl,imx6q-uart"; 255 reg = <0x021f4000 0x4000>;
|
234 interrupt-parent = <&gic>;
| 256 interrupt-parent = <&gic>;
|
235 interrupts = <62>; 236 clock-frequency = <80000000>; 237 status = "disabled"; 238 }; 239 240 usbphy1: usbphy@020c9000 { 241 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 242 reg = <0x020c9000 0x1000>; 243 interrupts = <44>; 244 status = "disabled"; 245 };
| 257 interrupts = <62>; 258 clock-frequency = <80000000>; 259 status = "disabled"; 260 }; 261 262 usbphy1: usbphy@020c9000 { 263 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 264 reg = <0x020c9000 0x1000>; 265 interrupts = <44>; 266 status = "disabled"; 267 };
|
246
| 268
|
247 usbphy2: usbphy@020ca000 { 248 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 249 reg = <0x020ca000 0x1000>; 250 interrupts = <45>; 251 status = "disabled"; 252 };
| 269 usbphy2: usbphy@020ca000 { 270 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 271 reg = <0x020ca000 0x1000>; 272 interrupts = <45>; 273 status = "disabled"; 274 };
|
253
| 275 276 ecspi1: ecspi@02008000 { 277 compatible = "fsl,imx6q-ecspi"; 278 reg = <0x02008000 0x4000>; 279 interrupts = < 63 >; 280 status = "disabled"; 281 }; 282 283 ecspi2: ecspi@0200C000 { 284 compatible = "fsl,imx6q-ecspi"; 285 reg = <0x0200C000 0x4000>; 286 interrupts = < 64 >; 287 status = "disabled"; 288 }; 289 290 ecspi3: ecspi@02010000 { 291 compatible = "fsl,imx6q-ecspi"; 292 reg = <0x02010000 0x4000>; 293 interrupts = < 65 >; 294 status = "disabled"; 295 }; 296 297 ecspi4: ecspi@02014000 { 298 compatible = "fsl,imx6q-ecspi"; 299 reg = <0x02014000 0x4000>; 300 interrupts = < 66 >; 301 status = "disabled"; 302 }; 303 304 ecspi5: ecspi@02018000 { 305 compatible = "fsl,imx6q-ecspi"; 306 reg = <0x02018000 0x4000>; 307 interrupts = < 67 >; 308 status = "disabled"; 309 }; 310 311 ssi1: ssi@02028000 { 312 compatible = "fsl,imx6q-ssi"; 313 reg = <0x02028000 0x4000>; 314 interrupts = < 78 >; 315 status = "disabled"; 316 }; 317 318 ssi2: ssi@0202C000 { 319 compatible = "fsl,imx6q-ssi"; 320 reg = <0x0202C000 0x4000>; 321 interrupts = < 79 >; 322 status = "disabled"; 323 }; 324 325 ssi3: ssi@02030000 { 326 compatible = "fsl,imx6q-ssi"; 327 reg = <0x02030000 0x4000>; 328 interrupts = < 80 >; 329 status = "disabled"; 330 };
|
254 }; 255 256 aips@02100000 { /* AIPS2 */ 257 compatible = "fsl,aips-bus", "simple-bus"; 258 #address-cells = <1>; 259 #size-cells = <1>; 260 interrupt-parent = <&gic>; 261 reg = <0x02100000 0x00100000>; 262 ranges; 263 264 fec1: ethernet@02188000 { 265 compatible = "fsl,imx6q-fec"; 266 reg = <0x02188000 0x4000>; 267 interrupts = <150 151>; 268 status = "disabled"; 269 };
| 331 }; 332 333 aips@02100000 { /* AIPS2 */ 334 compatible = "fsl,aips-bus", "simple-bus"; 335 #address-cells = <1>; 336 #size-cells = <1>; 337 interrupt-parent = <&gic>; 338 reg = <0x02100000 0x00100000>; 339 ranges; 340 341 fec1: ethernet@02188000 { 342 compatible = "fsl,imx6q-fec"; 343 reg = <0x02188000 0x4000>; 344 interrupts = <150 151>; 345 status = "disabled"; 346 };
|
270
| 347
|
271 usbotg1: usb@02184000 { 272 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 273 reg = <0x02184000 0x200>; 274 interrupts = <75>; 275 fsl,usbphy = <&usbphy1>; 276 fsl,usbmisc = <&usbmisc 0>; 277 status = "disabled"; 278 };
| 348 usbotg1: usb@02184000 { 349 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 350 reg = <0x02184000 0x200>; 351 interrupts = <75>; 352 fsl,usbphy = <&usbphy1>; 353 fsl,usbmisc = <&usbmisc 0>; 354 status = "disabled"; 355 };
|
279
| 356
|
280 usbh1: usb@02184200 { 281 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 282 reg = <0x02184200 0x200>; 283 interrupts = <72>; 284 fsl,usbphy = <&usbphy2>; 285 fsl,usbmisc = <&usbmisc 1>; 286 status = "disabled"; 287 };
| 357 usbh1: usb@02184200 { 358 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 359 reg = <0x02184200 0x200>; 360 interrupts = <72>; 361 fsl,usbphy = <&usbphy2>; 362 fsl,usbmisc = <&usbmisc 1>; 363 status = "disabled"; 364 };
|
288
| 365
|
289 usbh2: usb@02184400 { 290 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 291 reg = <0x02184400 0x200>; 292 interrupts = <73>; 293 fsl,usbmisc = <&usbmisc 2>; 294 status = "disabled"; 295 };
| 366 usbh2: usb@02184400 { 367 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 368 reg = <0x02184400 0x200>; 369 interrupts = <73>; 370 fsl,usbmisc = <&usbmisc 2>; 371 status = "disabled"; 372 };
|
296
| 373
|
297 usbh3: usb@02184600 { 298 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 299 reg = <0x02184600 0x200>; 300 interrupts = <74>; 301 fsl,usbmisc = <&usbmisc 3>; 302 status = "disabled"; 303 };
| 374 usbh3: usb@02184600 { 375 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 376 reg = <0x02184600 0x200>; 377 interrupts = <74>; 378 fsl,usbmisc = <&usbmisc 3>; 379 status = "disabled"; 380 };
|
304
| 381
|
305 usbmisc: usbmisc@02184800 { 306 #index-cells = <1>; 307 compatible = "fsl,imx6q-usbmisc"; 308 reg = <0x02184800 0x200>; 309 // Not disabled on purpose. 310 }; 311 312 usdhc1: usdhc@02190000 { 313 compatible = "fsl,imx6q-usdhc"; 314 reg = <0x02190000 0x4000>; 315 interrupt-parent = <&gic>; 316 interrupts = <54>; 317 cd-gpios = <&gpio1 2 0>; 318 bus-width = <0x4>; 319 status ="disabled"; 320 }; 321 322 usdhc2: usdhc@02194000 { 323 compatible = "fsl,imx6q-usdhc"; 324 reg = <0x02194000 0x4000>; 325 interrupt-parent = <&gic>; 326 interrupts = <55>; 327 non-removable; 328 bus-width = <0x4>; 329 status ="disabled"; 330 }; 331 332 usdhc3: usdhc@02198000 { 333 compatible = "fsl,imx6q-usdhc"; 334 reg = <0x02198000 0x4000>; 335 interrupt-parent = <&gic>; 336 interrupts = <56>; 337 cd-gpios = <&gpio3 9 0>; 338 bus-width = <0x4>; 339 status ="disabled"; 340 }; 341 342 usdhc4: usdhc@0219c000 { 343 compatible = "fsl,imx6q-usdhc"; 344 reg = <0x0219c000 0x4000>; 345 interrupt-parent = <&gic>; 346 interrupts = <57>; 347 bus-width = <0x4>; 348 status ="disabled"; 349 }; 350 351 ocotp0: ocotp@021bc000 { 352 compatible = "fsl,imx6q-ocotp"; 353 reg = <0x021bc000 0x4000>; 354 };
| 382 usbmisc: usbmisc@02184800 { 383 #index-cells = <1>; 384 compatible = "fsl,imx6q-usbmisc"; 385 reg = <0x02184800 0x200>; 386 // Not disabled on purpose. 387 }; 388 389 usdhc1: usdhc@02190000 { 390 compatible = "fsl,imx6q-usdhc"; 391 reg = <0x02190000 0x4000>; 392 interrupt-parent = <&gic>; 393 interrupts = <54>; 394 cd-gpios = <&gpio1 2 0>; 395 bus-width = <0x4>; 396 status ="disabled"; 397 }; 398 399 usdhc2: usdhc@02194000 { 400 compatible = "fsl,imx6q-usdhc"; 401 reg = <0x02194000 0x4000>; 402 interrupt-parent = <&gic>; 403 interrupts = <55>; 404 non-removable; 405 bus-width = <0x4>; 406 status ="disabled"; 407 }; 408 409 usdhc3: usdhc@02198000 { 410 compatible = "fsl,imx6q-usdhc"; 411 reg = <0x02198000 0x4000>; 412 interrupt-parent = <&gic>; 413 interrupts = <56>; 414 cd-gpios = <&gpio3 9 0>; 415 bus-width = <0x4>; 416 status ="disabled"; 417 }; 418 419 usdhc4: usdhc@0219c000 { 420 compatible = "fsl,imx6q-usdhc"; 421 reg = <0x0219c000 0x4000>; 422 interrupt-parent = <&gic>; 423 interrupts = <57>; 424 bus-width = <0x4>; 425 status ="disabled"; 426 }; 427 428 ocotp0: ocotp@021bc000 { 429 compatible = "fsl,imx6q-ocotp"; 430 reg = <0x021bc000 0x4000>; 431 };
|
| 432 433 audmux: audmux@021d8000 { 434 compatible = "fsl,imx6q-audmux"; 435 reg = <0x021d8000 0x4000>; 436 status = "disabled"; 437 };
|
355 }; 356 }; 357};
| 438 }; 439 }; 440};
|