| zy7_machdep.c (259365) | zy7_machdep.c (266379) |
|---|---|
| 1/*- 2 * Copyright (c) 2013 Thomas Skibo 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2013 Thomas Skibo 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: stable/10/sys/arm/xilinx/zy7_machdep.c 259365 2013-12-14 00:16:08Z ian $ | 26 * $FreeBSD: stable/10/sys/arm/xilinx/zy7_machdep.c 266379 2014-05-17 23:25:20Z ian $ |
| 27 */ 28 29/* 30 * Machine dependent code for Xilinx Zynq-7000 Soc. 31 * 32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 33 * (v1.4) November 16, 2012. Xilinx doc UG585. 34 */ 35 36#include "opt_global.h" 37 38#include <sys/cdefs.h> | 27 */ 28 29/* 30 * Machine dependent code for Xilinx Zynq-7000 Soc. 31 * 32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 33 * (v1.4) November 16, 2012. Xilinx doc UG585. 34 */ 35 36#include "opt_global.h" 37 38#include <sys/cdefs.h> |
| 39__FBSDID("$FreeBSD: stable/10/sys/arm/xilinx/zy7_machdep.c 259365 2013-12-14 00:16:08Z ian $"); | 39__FBSDID("$FreeBSD: stable/10/sys/arm/xilinx/zy7_machdep.c 266379 2014-05-17 23:25:20Z ian $"); |
| 40 41#define _ARM32_BUS_DMA_PRIVATE 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/bus.h> 45 46#include <vm/vm.h> 47#include <vm/pmap.h> --- 7 unchanged lines hidden (view full) --- 55#include <arm/xilinx/zy7_reg.h> 56 57void (*zynq7_cpu_reset)(void); 58 59vm_offset_t 60initarm_lastaddr(void) 61{ 62 | 40 41#define _ARM32_BUS_DMA_PRIVATE 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/bus.h> 45 46#include <vm/vm.h> 47#include <vm/pmap.h> --- 7 unchanged lines hidden (view full) --- 55#include <arm/xilinx/zy7_reg.h> 56 57void (*zynq7_cpu_reset)(void); 58 59vm_offset_t 60initarm_lastaddr(void) 61{ 62 |
| 63 return (ZYNQ7_PSIO_VBASE); | 63 return (arm_devmap_lastaddr()); |
| 64} 65 66void 67initarm_early_init(void) 68{ 69 70} 71 72void 73initarm_gpio_init(void) 74{ 75} 76 77void 78initarm_late_init(void) 79{ 80} 81 | 64} 65 66void 67initarm_early_init(void) 68{ 69 70} 71 72void 73initarm_gpio_init(void) 74{ 75} 76 77void 78initarm_late_init(void) 79{ 80} 81 |
| 82#define FDT_DEVMAP_SIZE 3 83static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_SIZE]; 84 | |
| 85/* | 82/* |
| 86 * Construct pmap_devmap[] with DT-derived config data. | 83 * Set up static device mappings. Not strictly necessary -- simplebus will 84 * dynamically establish mappings as needed -- but doing it this way gets us 85 * nice efficient 1MB section mappings. |
| 87 */ 88int 89initarm_devmap_init(void) 90{ | 86 */ 87int 88initarm_devmap_init(void) 89{ |
| 91 int i = 0; | |
| 92 | 90 |
| 93 fdt_devmap[i].pd_va = ZYNQ7_PSIO_VBASE; 94 fdt_devmap[i].pd_pa = ZYNQ7_PSIO_HWBASE; 95 fdt_devmap[i].pd_size = ZYNQ7_PSIO_SIZE; 96 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 97 fdt_devmap[i].pd_cache = PTE_DEVICE; 98 i++; | 91 arm_devmap_add_entry(ZYNQ7_PSIO_HWBASE, ZYNQ7_PSIO_SIZE); 92 arm_devmap_add_entry(ZYNQ7_PSCTL_HWBASE, ZYNQ7_PSCTL_SIZE); |
| 99 | 93 |
| 100 fdt_devmap[i].pd_va = ZYNQ7_PSCTL_VBASE; 101 fdt_devmap[i].pd_pa = ZYNQ7_PSCTL_HWBASE; 102 fdt_devmap[i].pd_size = ZYNQ7_PSCTL_SIZE; 103 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 104 fdt_devmap[i].pd_cache = PTE_DEVICE; 105 i++; 106 107 /* end of table */ 108 fdt_devmap[i].pd_va = 0; 109 fdt_devmap[i].pd_pa = 0; 110 fdt_devmap[i].pd_size = 0; 111 fdt_devmap[i].pd_prot = 0; 112 fdt_devmap[i].pd_cache = 0; 113 114 arm_devmap_register_table(&fdt_devmap[0]); | |
| 115 return (0); 116} 117 118 119struct fdt_fixup_entry fdt_fixup_table[] = { 120 { NULL, NULL } 121}; 122 --- 45 unchanged lines hidden --- | 94 return (0); 95} 96 97 98struct fdt_fixup_entry fdt_fixup_table[] = { 99 { NULL, NULL } 100}; 101 --- 45 unchanged lines hidden --- |