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s3c24x0.c (205354) s3c24x0.c (210396)
1/* $NetBSD: s3c2410.c,v 1.4 2003/08/27 03:46:05 bsh Exp $ */
2
3/*
4 * Copyright (c) 2003 Genetec corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec corporation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
1/* $NetBSD: s3c2410.c,v 1.4 2003/08/27 03:46:05 bsh Exp $ */
2
3/*
4 * Copyright (c) 2003 Genetec corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec corporation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: head/sys/arm/s3c2xx0/s3c24x0.c 205354 2010-03-20 03:39:35Z imp $");
33__FBSDID("$FreeBSD: head/sys/arm/s3c2xx0/s3c24x0.c 210396 2010-07-22 23:12:19Z andrew $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/reboot.h>
39#include <sys/malloc.h>
40#include <sys/module.h>
41#include <sys/bus.h>

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78 int type;
79 u_long start;
80 u_long count;
81 } res[2];
82} s3c24x0_children[] = {
83 { "timer", 0, -1, { { 0 }, } },
84 { "uart", 1, 0, {
85 { SYS_RES_IRQ, S3C24X0_INT_UART0, 1 },
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/reboot.h>
39#include <sys/malloc.h>
40#include <sys/module.h>
41#include <sys/bus.h>

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78 int type;
79 u_long start;
80 u_long count;
81 } res[2];
82} s3c24x0_children[] = {
83 { "timer", 0, -1, { { 0 }, } },
84 { "uart", 1, 0, {
85 { SYS_RES_IRQ, S3C24X0_INT_UART0, 1 },
86 { SYS_RES_IOPORT, S3C24X0_UART_BASE(0),
86 { SYS_RES_IOPORT, S3C24X0_UART_PA_BASE(0),
87 S3C24X0_UART_BASE(1) - S3C24X0_UART_BASE(0) },
88 } },
89 { "uart", 1, 1, {
90 { SYS_RES_IRQ, S3C24X0_INT_UART1, 1 },
87 S3C24X0_UART_BASE(1) - S3C24X0_UART_BASE(0) },
88 } },
89 { "uart", 1, 1, {
90 { SYS_RES_IRQ, S3C24X0_INT_UART1, 1 },
91 { SYS_RES_IOPORT, S3C24X0_UART_BASE(1),
91 { SYS_RES_IOPORT, S3C24X0_UART_PA_BASE(1),
92 S3C24X0_UART_BASE(2) - S3C24X0_UART_BASE(1) },
93 } },
94 { "uart", 1, 2, {
95 { SYS_RES_IRQ, S3C24X0_INT_UART2, 1 },
92 S3C24X0_UART_BASE(2) - S3C24X0_UART_BASE(1) },
93 } },
94 { "uart", 1, 2, {
95 { SYS_RES_IRQ, S3C24X0_INT_UART2, 1 },
96 { SYS_RES_IOPORT, S3C24X0_UART_BASE(2),
96 { SYS_RES_IOPORT, S3C24X0_UART_PA_BASE(2),
97 S3C24X0_UART_BASE(3) - S3C24X0_UART_BASE(2) },
98 } },
99 { "ohci", 0, -1, {
100 { SYS_RES_IRQ, S3C24X0_INT_USBH, 0 },
97 S3C24X0_UART_BASE(3) - S3C24X0_UART_BASE(2) },
98 } },
99 { "ohci", 0, -1, {
100 { SYS_RES_IRQ, S3C24X0_INT_USBH, 0 },
101 { SYS_RES_IOPORT, S3C24X0_USBHC_BASE, S3C24X0_USBHC_SIZE },
101 { SYS_RES_IOPORT, S3C24X0_USBHC_PA_BASE, S3C24X0_USBHC_SIZE },
102 } },
103 { NULL },
104};
105
106
107/* prototypes */
108static device_t s3c24x0_add_child(device_t, int, const char *, int);
109

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252 count, flags, child);
253 break;
254
255 case SYS_RES_IOPORT:
256 case SYS_RES_MEMORY:
257 res = rman_reserve_resource(
258 &s3c2xx0_softc->s3c2xx0_mem_rman,
259 start, end, count, flags, child);
102 } },
103 { NULL },
104};
105
106
107/* prototypes */
108static device_t s3c24x0_add_child(device_t, int, const char *, int);
109

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252 count, flags, child);
253 break;
254
255 case SYS_RES_IOPORT:
256 case SYS_RES_MEMORY:
257 res = rman_reserve_resource(
258 &s3c2xx0_softc->s3c2xx0_mem_rman,
259 start, end, count, flags, child);
260 if (res == NULL)
261 panic("Unable to map address space %#lX-%#lX", start,
262 end);
263
260 rman_set_bustag(res, &s3c2xx0_bs_tag);
261 rman_set_bushandle(res, start);
264 rman_set_bustag(res, &s3c2xx0_bs_tag);
265 rman_set_bushandle(res, start);
266 if (flags & RF_ACTIVE) {
267 if (bus_activate_resource(child, type, *rid, res)) {
268 rman_release_resource(res);
269 return (NULL);
270 }
271 }
262 break;
263 }
264
265 if (res != NULL) {
266 rman_set_rid(res, *rid);
267 if (rle != NULL) {
268 rle->res = res;
269 rle->start = rman_get_start(res);

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274
275 return (res);
276}
277
278static int
279s3c24x0_activate_resource(device_t bus, device_t child, int type, int rid,
280 struct resource *r)
281{
272 break;
273 }
274
275 if (res != NULL) {
276 rman_set_rid(res, *rid);
277 if (rle != NULL) {
278 rle->res = res;
279 rle->start = rman_get_start(res);

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284
285 return (res);
286}
287
288static int
289s3c24x0_activate_resource(device_t bus, device_t child, int type, int rid,
290 struct resource *r)
291{
292 bus_space_handle_t p;
293 int error;
294
295 if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
296 error = bus_space_map(rman_get_bustag(r),
297 rman_get_bushandle(r), rman_get_size(r), 0, &p);
298 if (error)
299 return (error);
300 rman_set_bushandle(r, p);
301 }
282 return (rman_activate_resource(r));
283}
284
285static int
286s3c24x0_release_resource(device_t bus, device_t child, int type, int rid,
287 struct resource *r)
288{
289 struct s3c2xx0_ivar *ivar = device_get_ivars(child);

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330{
331 struct s3c24x0_softc *sc = device_get_softc(dev);
332 bus_space_tag_t iot;
333 device_t child;
334 unsigned int i, j;
335
336 s3c2xx0_softc = &(sc->sc_sx);
337 sc->sc_sx.sc_iot = iot = &s3c2xx0_bs_tag;
302 return (rman_activate_resource(r));
303}
304
305static int
306s3c24x0_release_resource(device_t bus, device_t child, int type, int rid,
307 struct resource *r)
308{
309 struct s3c2xx0_ivar *ivar = device_get_ivars(child);

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350{
351 struct s3c24x0_softc *sc = device_get_softc(dev);
352 bus_space_tag_t iot;
353 device_t child;
354 unsigned int i, j;
355
356 s3c2xx0_softc = &(sc->sc_sx);
357 sc->sc_sx.sc_iot = iot = &s3c2xx0_bs_tag;
358 s3c2xx0_softc->s3c2xx0_irq_rman.rm_type = RMAN_ARRAY;
359 s3c2xx0_softc->s3c2xx0_irq_rman.rm_descr = "S3C24X0 IRQs";
360 s3c2xx0_softc->s3c2xx0_mem_rman.rm_type = RMAN_ARRAY;
361 s3c2xx0_softc->s3c2xx0_mem_rman.rm_descr = "S3C24X0 Device Registers";
362 if (rman_init(&s3c2xx0_softc->s3c2xx0_irq_rman) != 0 ||
363 rman_manage_region(&s3c2xx0_softc->s3c2xx0_irq_rman, 0,
364 S3C2410_SUBIRQ_MAX) != 0) /* XXX Change S3C2440_SUBIRQ_MAX depending on micro */
365 panic("s3c24x0_attach: failed to set up IRQ rman");
366 /* Manage the registor memory space */
367 if ((rman_init(&s3c2xx0_softc->s3c2xx0_mem_rman) != 0) ||
368 (rman_manage_region(&s3c2xx0_softc->s3c2xx0_mem_rman,
369 S3C24X0_DEV_VA_OFFSET,
370 S3C24X0_DEV_VA_OFFSET + S3C24X0_DEV_VA_SIZE) != 0) ||
371 (rman_manage_region(&s3c2xx0_softc->s3c2xx0_mem_rman,
372 S3C24X0_DEV_START, S3C24X0_DEV_STOP) != 0))
373 panic("s3c24x0_attach: failed to set up register rman");
338
374
339 if (bus_space_map(iot,
340 S3C24X0_INTCTL_PA_BASE, S3C24X0_INTCTL_SIZE,
341 BUS_SPACE_MAP_LINEAR, &sc->sc_sx.sc_intctl_ioh))
342 panic("Cannot map the interrupt controller");
375 /* These are needed for things without a proper device to attach to */
376 sc->sc_sx.sc_intctl_ioh = S3C24X0_INTCTL_BASE;
377 sc->sc_sx.sc_gpio_ioh = S3C24X0_GPIO_BASE;
378 sc->sc_sx.sc_clkman_ioh = S3C24X0_CLKMAN_BASE;
379 sc->sc_sx.sc_wdt_ioh = S3C24X0_WDT_BASE;
380 sc->sc_timer_ioh = S3C24X0_TIMER_BASE;
343
381
344 /* Map the GPIO registers */
345 if (bus_space_map(iot, S3C24X0_GPIO_PA_BASE, S3C2410_GPIO_SIZE,
346 0, &sc->sc_sx.sc_gpio_ioh))
347 panic("Cannot map the GPIO");
348 /* Clock manager */
349 if (bus_space_map(iot, S3C24X0_CLKMAN_PA_BASE,
350 S3C24X0_CLKMAN_SIZE, 0, &sc->sc_sx.sc_clkman_ioh))
351 panic("cannot map the clock");
352
353 if (bus_space_map(iot, S3C24X0_TIMER_PA_BASE,
354 S3C24X0_TIMER_SIZE, 0, &sc->sc_timer_ioh))
355 panic("cannot map the TIMER");
356
357 if (bus_space_map(iot, S3C24X0_USBHC_PA_BASE,
358 S3C24X0_USBHC_SIZE, 0, &sc->sc_sx.sc_ohci_ioh))
359 panic("cannot map the USB Host");
360
361 if (bus_space_map(iot, S3C24X0_WDT_PA_BASE,
362 S3C24X0_WDT_SIZE, 0, &sc->sc_sx.sc_wdt_ioh))
363 panic("cannot map the watchdog timer");
364
365 /*
366 * Identify the CPU
367 */
368 s3c24x0_identify_cpu(dev);
369
370 /* calculate current clock frequency */
371 s3c24x0_clock_freq(&sc->sc_sx);
372 device_printf(dev, "fclk %d MHz hclk %d MHz pclk %d MHz\n",
373 sc->sc_sx.sc_fclk / 1000000, sc->sc_sx.sc_hclk / 1000000,
374 sc->sc_sx.sc_pclk / 1000000);
375
376 /*
377 * Attach children devices
378 */
382 /*
383 * Identify the CPU
384 */
385 s3c24x0_identify_cpu(dev);
386
387 /* calculate current clock frequency */
388 s3c24x0_clock_freq(&sc->sc_sx);
389 device_printf(dev, "fclk %d MHz hclk %d MHz pclk %d MHz\n",
390 sc->sc_sx.sc_fclk / 1000000, sc->sc_sx.sc_hclk / 1000000,
391 sc->sc_sx.sc_pclk / 1000000);
392
393 /*
394 * Attach children devices
395 */
379 s3c2xx0_softc->s3c2xx0_irq_rman.rm_type = RMAN_ARRAY;
380 s3c2xx0_softc->s3c2xx0_irq_rman.rm_descr = "S3C24X0 IRQs";
381 s3c2xx0_softc->s3c2xx0_mem_rman.rm_type = RMAN_ARRAY;
382 s3c2xx0_softc->s3c2xx0_mem_rman.rm_descr = "S3C24X0 Memory";
383 if (rman_init(&s3c2xx0_softc->s3c2xx0_irq_rman) != 0 ||
384 rman_manage_region(&s3c2xx0_softc->s3c2xx0_irq_rman, 0,
385 S3C2410_SUBIRQ_MAX) != 0)
386 panic("s3c24x0_attach: failed to set up IRQ rman");
387 /* Manage the registor memory space */
388 if ((rman_init(&s3c2xx0_softc->s3c2xx0_mem_rman) != 0) ||
389 (rman_manage_region(&s3c2xx0_softc->s3c2xx0_mem_rman,
390 S3C24X0_DEV_VA_OFFSET,
391 S3C24X0_DEV_VA_OFFSET + S3C24X0_DEV_VA_SIZE) != 0))
392 panic("s3c24x0_attach: failed to set up register rman");
393
394 for (i = 0; s3c24x0_children[i].name != NULL; i++) {
395 child = s3c24x0_add_child(dev, s3c24x0_children[i].prio,
396 s3c24x0_children[i].name, s3c24x0_children[i].unit);
397 for (j = 0; j < sizeof(s3c24x0_children[i].res) /
398 sizeof(s3c24x0_children[i].res[0]) &&
399 s3c24x0_children[i].res[j].type != 0; j++) {
400 bus_set_resource(child,

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397 for (i = 0; s3c24x0_children[i].name != NULL; i++) {
398 child = s3c24x0_add_child(dev, s3c24x0_children[i].prio,
399 s3c24x0_children[i].name, s3c24x0_children[i].unit);
400 for (j = 0; j < sizeof(s3c24x0_children[i].res) /
401 sizeof(s3c24x0_children[i].res[0]) &&
402 s3c24x0_children[i].res[j].type != 0; j++) {
403 bus_set_resource(child,

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