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mv_machdep.c (232295) mv_machdep.c (235609)
1/*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without

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34 *
35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
36 */
37
38#include "opt_ddb.h"
39#include "opt_platform.h"
40
41#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without

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34 *
35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
36 */
37
38#include "opt_ddb.h"
39#include "opt_platform.h"
40
41#include <sys/cdefs.h>
42__FBSDID("$FreeBSD: head/sys/arm/mv/mv_machdep.c 232295 2012-02-29 12:44:34Z cognet $");
42__FBSDID("$FreeBSD: head/sys/arm/mv/mv_machdep.c 235609 2012-05-18 14:41:14Z gber $");
43
44#define _ARM32_BUS_DMA_PRIVATE
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/sysproto.h>
48#include <sys/signalvar.h>
49#include <sys/imgact.h>
50#include <sys/kernel.h>

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309initarm(void *mdp, void *unused __unused)
310{
311 struct pv_addr kernel_l1pt;
312 struct pv_addr dpcpu;
313 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
314 uint32_t memsize, l2size;
315 void *kmdp;
316 u_int l1pagetable;
43
44#define _ARM32_BUS_DMA_PRIVATE
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/sysproto.h>
48#include <sys/signalvar.h>
49#include <sys/imgact.h>
50#include <sys/kernel.h>

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309initarm(void *mdp, void *unused __unused)
310{
311 struct pv_addr kernel_l1pt;
312 struct pv_addr dpcpu;
313 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
314 uint32_t memsize, l2size;
315 void *kmdp;
316 u_int l1pagetable;
317 int i = 0, j = 0;
317 int i = 0, j = 0, err_devmap = 0;
318
319 kmdp = NULL;
320 lastaddr = 0;
321 memsize = 0;
322 dtbp = (vm_offset_t)NULL;
323
324 set_cpufuncs();
325

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491
492 /* Link and map the vector page */
493 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
494 &kernel_pt_table[l2size - 1]);
495 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
496 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
497
498 /* Map pmap_devmap[] entries */
318
319 kmdp = NULL;
320 lastaddr = 0;
321 memsize = 0;
322 dtbp = (vm_offset_t)NULL;
323
324 set_cpufuncs();
325

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491
492 /* Link and map the vector page */
493 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
494 &kernel_pt_table[l2size - 1]);
495 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
496 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
497
498 /* Map pmap_devmap[] entries */
499 if (platform_devmap_init() != 0)
500 while (1);
499 err_devmap = platform_devmap_init();
501 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table);
502
503 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
504 DOMAIN_CLIENT);
505 setttb(kernel_l1pt.pv_pa);
506 cpu_tlb_flushID();
507 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
508

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525
526 debugf("initarm: console initialized\n");
527 debugf(" arg1 mdp = 0x%08x\n", (uint32_t)mdp);
528 debugf(" boothowto = 0x%08x\n", boothowto);
529 printf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
530 print_kernel_section_addr();
531 print_kenv();
532
500 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table);
501
502 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
503 DOMAIN_CLIENT);
504 setttb(kernel_l1pt.pv_pa);
505 cpu_tlb_flushID();
506 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
507

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524
525 debugf("initarm: console initialized\n");
526 debugf(" arg1 mdp = 0x%08x\n", (uint32_t)mdp);
527 debugf(" boothowto = 0x%08x\n", boothowto);
528 printf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
529 print_kernel_section_addr();
530 print_kenv();
531
532 if (err_devmap != 0)
533 printf("WARNING: could not fully configure devmap, error=%d\n",
534 err_devmap);
535
533 /*
534 * Re-initialise decode windows
535 */
536 if (soc_decode_win() != 0)
537 printf("WARNING: could not re-initialise decode windows! "
538 "Running with existing settings...\n");
536 /*
537 * Re-initialise decode windows
538 */
539 if (soc_decode_win() != 0)
540 printf("WARNING: could not re-initialise decode windows! "
541 "Running with existing settings...\n");
542
539 /*
540 * Pages were allocated during the secondary bootstrap for the
541 * stacks for different CPU modes.
542 * We must now set the r13 registers in the different CPU modes to
543 * point to these stacks.
544 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
545 * of the stack memory.
546 */

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728 else
729#endif
730 ctrl_offset += 4;
731 }
732
733 return (0);
734}
735
543 /*
544 * Pages were allocated during the secondary bootstrap for the
545 * stacks for different CPU modes.
546 * We must now set the r13 registers in the different CPU modes to
547 * point to these stacks.
548 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
549 * of the stack memory.
550 */

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732 else
733#endif
734 ctrl_offset += 4;
735 }
736
737 return (0);
738}
739
736#define FDT_DEVMAP_MAX (1 + 2 + 1 + 1)
740#define FDT_DEVMAP_MAX (MV_WIN_CPU_MAX + 1)
737static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = {
738 { 0, 0, 0, 0, 0, }
739};
740
741/*
741static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = {
742 { 0, 0, 0, 0, 0, }
743};
744
745/*
746 * XXX: When device entry in devmap has pd_size smaller than section size,
747 * system will freeze during initialization
748 */
749
750/*
742 * Construct pmap_devmap[] with DT-derived config data.
743 */
751 * Construct pmap_devmap[] with DT-derived config data.
752 */
753
744static int
745platform_devmap_init(void)
746{
747 phandle_t root, child;
754static int
755platform_devmap_init(void)
756{
757 phandle_t root, child;
758 pcell_t bank_count;
748 u_long base, size;
759 u_long base, size;
749 int i;
760 int i, num_mapped;
750
761
762 i = 0;
763 pmap_devmap_bootstrap_table = &fdt_devmap[0];
764
751 /*
752 * IMMR range.
753 */
765 /*
766 * IMMR range.
767 */
754 i = 0;
755 fdt_devmap[i].pd_va = fdt_immr_va;
756 fdt_devmap[i].pd_pa = fdt_immr_pa;
757 fdt_devmap[i].pd_size = fdt_immr_size;
758 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
759 fdt_devmap[i].pd_cache = PTE_NOCACHE;
760 i++;
761
762 /*
768 fdt_devmap[i].pd_va = fdt_immr_va;
769 fdt_devmap[i].pd_pa = fdt_immr_pa;
770 fdt_devmap[i].pd_size = fdt_immr_size;
771 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
772 fdt_devmap[i].pd_cache = PTE_NOCACHE;
773 i++;
774
775 /*
763 * PCI range(s).
776 * PCI range(s) and localbus.
764 */
765 if ((root = OF_finddevice("/")) == -1)
766 return (ENXIO);
767
777 */
778 if ((root = OF_finddevice("/")) == -1)
779 return (ENXIO);
780
768 for (child = OF_child(root); child != 0; child = OF_peer(child))
781 for (child = OF_child(root); child != 0; child = OF_peer(child)) {
769 if (fdt_is_type(child, "pci")) {
770 /*
771 * Check space: each PCI node will consume 2 devmap
772 * entries.
773 */
774 if (i + 1 >= FDT_DEVMAP_MAX) {
775 return (ENOMEM);
782 if (fdt_is_type(child, "pci")) {
783 /*
784 * Check space: each PCI node will consume 2 devmap
785 * entries.
786 */
787 if (i + 1 >= FDT_DEVMAP_MAX) {
788 return (ENOMEM);
776 break;
777 }
778
779 /*
780 * XXX this should account for PCI and multiple ranges
781 * of a given kind.
782 */
783 if (fdt_pci_devmap(child, &fdt_devmap[i],
784 MV_PCIE_IO_BASE, MV_PCIE_MEM_BASE) != 0)
785 return (ENXIO);
786 i += 2;
787 }
788
789 }
790
791 /*
792 * XXX this should account for PCI and multiple ranges
793 * of a given kind.
794 */
795 if (fdt_pci_devmap(child, &fdt_devmap[i],
796 MV_PCIE_IO_BASE, MV_PCIE_MEM_BASE) != 0)
797 return (ENXIO);
798 i += 2;
799 }
800
801 if (fdt_is_compatible(child, "mrvl,lbc")) {
802 /* Check available space */
803 if (OF_getprop(child, "bank-count", (void *)&bank_count,
804 sizeof(bank_count)) <= 0)
805 /* If no property, use default value */
806 bank_count = 1;
807 else
808 bank_count = fdt32_to_cpu(bank_count);
809
810 if ((i + bank_count) >= FDT_DEVMAP_MAX)
811 return (ENOMEM);
812
813 /* Add all localbus ranges to device map */
814 num_mapped = 0;
815
816 if (fdt_localbus_devmap(child, &fdt_devmap[i],
817 (int)bank_count, &num_mapped) != 0)
818 return (ENXIO);
819
820 i += num_mapped;
821 }
822 }
823
789 /*
790 * CESA SRAM range.
791 */
792 if ((child = OF_finddevice("sram")) != -1)
793 if (fdt_is_compatible(child, "mrvl,cesa-sram"))
794 goto moveon;
795
796 if ((child = fdt_find_compatible(root, "mrvl,cesa-sram", 0)) == 0)
797 /* No CESA SRAM node. */
824 /*
825 * CESA SRAM range.
826 */
827 if ((child = OF_finddevice("sram")) != -1)
828 if (fdt_is_compatible(child, "mrvl,cesa-sram"))
829 goto moveon;
830
831 if ((child = fdt_find_compatible(root, "mrvl,cesa-sram", 0)) == 0)
832 /* No CESA SRAM node. */
798 goto out;
833 return (0);
799moveon:
800 if (i >= FDT_DEVMAP_MAX)
801 return (ENOMEM);
802
803 if (fdt_regsize(child, &base, &size) != 0)
804 return (EINVAL);
805
806 fdt_devmap[i].pd_va = MV_CESA_SRAM_BASE; /* XXX */
807 fdt_devmap[i].pd_pa = base;
808 fdt_devmap[i].pd_size = size;
809 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
810 fdt_devmap[i].pd_cache = PTE_NOCACHE;
811
834moveon:
835 if (i >= FDT_DEVMAP_MAX)
836 return (ENOMEM);
837
838 if (fdt_regsize(child, &base, &size) != 0)
839 return (EINVAL);
840
841 fdt_devmap[i].pd_va = MV_CESA_SRAM_BASE; /* XXX */
842 fdt_devmap[i].pd_pa = base;
843 fdt_devmap[i].pd_size = size;
844 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
845 fdt_devmap[i].pd_cache = PTE_NOCACHE;
846
812out:
813 pmap_devmap_bootstrap_table = &fdt_devmap[0];
814 return (0);
815}
816
817struct arm32_dma_range *
818bus_dma_get_range(void)
819{
820
821 return (NULL);
822}
823
824int
825bus_dma_get_range_nb(void)
826{
827
828 return (0);
829}
847 return (0);
848}
849
850struct arm32_dma_range *
851bus_dma_get_range(void)
852{
853
854 return (NULL);
855}
856
857int
858bus_dma_get_range_nb(void)
859{
860
861 return (0);
862}