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vlapic_priv.h (259863) vlapic_priv.h (266339)
1/*-
2 * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/amd64/vmm/io/vlapic_priv.h 259863 2013-12-25 06:46:31Z neel $
26 * $FreeBSD: stable/10/sys/amd64/vmm/io/vlapic_priv.h 266339 2014-05-17 19:11:08Z jhb $
27 */
28
29#ifndef _VLAPIC_PRIV_H_
30#define _VLAPIC_PRIV_H_
31
27 */
28
29#ifndef _VLAPIC_PRIV_H_
30#define _VLAPIC_PRIV_H_
31
32#include <x86/apicreg.h>
33
32/*
33 * APIC Register: Offset Description
34 */
35#define APIC_OFFSET_ID 0x20 /* Local APIC ID */
36#define APIC_OFFSET_VER 0x30 /* Local APIC Version */
37#define APIC_OFFSET_TPR 0x80 /* Task Priority Register */
38#define APIC_OFFSET_APR 0x90 /* Arbitration Priority */
39#define APIC_OFFSET_PPR 0xA0 /* Processor Priority Register */

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75#define APIC_OFFSET_PERF_LVT 0x340 /* Local Vector Table (PMC) */
76#define APIC_OFFSET_LINT0_LVT 0x350 /* Local Vector Table (LINT0) */
77#define APIC_OFFSET_LINT1_LVT 0x360 /* Local Vector Table (LINT1) */
78#define APIC_OFFSET_ERROR_LVT 0x370 /* Local Vector Table (ERROR) */
79#define APIC_OFFSET_TIMER_ICR 0x380 /* Timer's Initial Count */
80#define APIC_OFFSET_TIMER_CCR 0x390 /* Timer's Current Count */
81#define APIC_OFFSET_TIMER_DCR 0x3E0 /* Timer's Divide Configuration */
82
34/*
35 * APIC Register: Offset Description
36 */
37#define APIC_OFFSET_ID 0x20 /* Local APIC ID */
38#define APIC_OFFSET_VER 0x30 /* Local APIC Version */
39#define APIC_OFFSET_TPR 0x80 /* Task Priority Register */
40#define APIC_OFFSET_APR 0x90 /* Arbitration Priority */
41#define APIC_OFFSET_PPR 0xA0 /* Processor Priority Register */

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77#define APIC_OFFSET_PERF_LVT 0x340 /* Local Vector Table (PMC) */
78#define APIC_OFFSET_LINT0_LVT 0x350 /* Local Vector Table (LINT0) */
79#define APIC_OFFSET_LINT1_LVT 0x360 /* Local Vector Table (LINT1) */
80#define APIC_OFFSET_ERROR_LVT 0x370 /* Local Vector Table (ERROR) */
81#define APIC_OFFSET_TIMER_ICR 0x380 /* Timer's Initial Count */
82#define APIC_OFFSET_TIMER_CCR 0x390 /* Timer's Current Count */
83#define APIC_OFFSET_TIMER_DCR 0x3E0 /* Timer's Divide Configuration */
84
85#define VLAPIC_CTR0(vlapic, format) \
86 VCPU_CTR0((vlapic)->vm, (vlapic)->vcpuid, format)
87
88#define VLAPIC_CTR1(vlapic, format, p1) \
89 VCPU_CTR1((vlapic)->vm, (vlapic)->vcpuid, format, p1)
90
91#define VLAPIC_CTR2(vlapic, format, p1, p2) \
92 VCPU_CTR2((vlapic)->vm, (vlapic)->vcpuid, format, p1, p2)
93
94#define VLAPIC_CTR_IRR(vlapic, msg) \
95do { \
96 uint32_t *irrptr = &(vlapic)->apic_page->irr0; \
97 irrptr[0] = irrptr[0]; /* silence compiler */ \
98 VLAPIC_CTR1((vlapic), msg " irr0 0x%08x", irrptr[0 << 2]); \
99 VLAPIC_CTR1((vlapic), msg " irr1 0x%08x", irrptr[1 << 2]); \
100 VLAPIC_CTR1((vlapic), msg " irr2 0x%08x", irrptr[2 << 2]); \
101 VLAPIC_CTR1((vlapic), msg " irr3 0x%08x", irrptr[3 << 2]); \
102 VLAPIC_CTR1((vlapic), msg " irr4 0x%08x", irrptr[4 << 2]); \
103 VLAPIC_CTR1((vlapic), msg " irr5 0x%08x", irrptr[5 << 2]); \
104 VLAPIC_CTR1((vlapic), msg " irr6 0x%08x", irrptr[6 << 2]); \
105 VLAPIC_CTR1((vlapic), msg " irr7 0x%08x", irrptr[7 << 2]); \
106} while (0)
107
108#define VLAPIC_CTR_ISR(vlapic, msg) \
109do { \
110 uint32_t *isrptr = &(vlapic)->apic_page->isr0; \
111 isrptr[0] = isrptr[0]; /* silence compiler */ \
112 VLAPIC_CTR1((vlapic), msg " isr0 0x%08x", isrptr[0 << 2]); \
113 VLAPIC_CTR1((vlapic), msg " isr1 0x%08x", isrptr[1 << 2]); \
114 VLAPIC_CTR1((vlapic), msg " isr2 0x%08x", isrptr[2 << 2]); \
115 VLAPIC_CTR1((vlapic), msg " isr3 0x%08x", isrptr[3 << 2]); \
116 VLAPIC_CTR1((vlapic), msg " isr4 0x%08x", isrptr[4 << 2]); \
117 VLAPIC_CTR1((vlapic), msg " isr5 0x%08x", isrptr[5 << 2]); \
118 VLAPIC_CTR1((vlapic), msg " isr6 0x%08x", isrptr[6 << 2]); \
119 VLAPIC_CTR1((vlapic), msg " isr7 0x%08x", isrptr[7 << 2]); \
120} while (0)
121
83enum boot_state {
84 BS_INIT,
85 BS_SIPI,
86 BS_RUNNING
87};
88
89/*
90 * 16 priority levels with at most one vector injected per level.
91 */
92#define ISRVEC_STK_SIZE (16 + 1)
93
122enum boot_state {
123 BS_INIT,
124 BS_SIPI,
125 BS_RUNNING
126};
127
128/*
129 * 16 priority levels with at most one vector injected per level.
130 */
131#define ISRVEC_STK_SIZE (16 + 1)
132
133#define VLAPIC_MAXLVT_INDEX APIC_LVT_CMCI
134
135struct vlapic;
136
137struct vlapic_ops {
138 int (*set_intr_ready)(struct vlapic *vlapic, int vector, bool level);
139 int (*pending_intr)(struct vlapic *vlapic, int *vecptr);
140 void (*intr_accepted)(struct vlapic *vlapic, int vector);
141 void (*post_intr)(struct vlapic *vlapic, int hostcpu);
142 void (*set_tmr)(struct vlapic *vlapic, int vector, bool level);
143};
144
94struct vlapic {
95 struct vm *vm;
96 int vcpuid;
97 struct LAPIC *apic_page;
145struct vlapic {
146 struct vm *vm;
147 int vcpuid;
148 struct LAPIC *apic_page;
149 struct vlapic_ops ops;
98
99 uint32_t esr_pending;
100 int esr_firing;
101
102 struct callout callout; /* vlapic timer */
103 struct bintime timer_fire_bt; /* callout expiry time */
104 struct bintime timer_freq_bt; /* timer frequency */
105 struct bintime timer_period_bt; /* timer period */
106 struct mtx timer_mtx;
107
108 /*
109 * The 'isrvec_stk' is a stack of vectors injected by the local apic.
110 * A vector is popped from the stack when the processor does an EOI.
111 * The vector on the top of the stack is used to compute the
112 * Processor Priority in conjunction with the TPR.
113 */
150
151 uint32_t esr_pending;
152 int esr_firing;
153
154 struct callout callout; /* vlapic timer */
155 struct bintime timer_fire_bt; /* callout expiry time */
156 struct bintime timer_freq_bt; /* timer frequency */
157 struct bintime timer_period_bt; /* timer period */
158 struct mtx timer_mtx;
159
160 /*
161 * The 'isrvec_stk' is a stack of vectors injected by the local apic.
162 * A vector is popped from the stack when the processor does an EOI.
163 * The vector on the top of the stack is used to compute the
164 * Processor Priority in conjunction with the TPR.
165 */
114 uint8_t isrvec_stk[ISRVEC_STK_SIZE];
115 int isrvec_stk_top;
166 uint8_t isrvec_stk[ISRVEC_STK_SIZE];
167 int isrvec_stk_top;
116
168
117 uint64_t msr_apicbase;
118 enum boot_state boot_state;
169 uint64_t msr_apicbase;
170 enum boot_state boot_state;
171
172 /*
173 * Copies of some registers in the virtual APIC page. We do this for
174 * a couple of different reasons:
175 * - to be able to detect what changed (e.g. svr_last)
176 * - to maintain a coherent snapshot of the register (e.g. lvt_last)
177 */
178 uint32_t svr_last;
179 uint32_t lvt_last[VLAPIC_MAXLVT_INDEX + 1];
119};
120
121void vlapic_init(struct vlapic *vlapic);
122void vlapic_cleanup(struct vlapic *vlapic);
123
124#endif /* _VLAPIC_PRIV_H_ */
180};
181
182void vlapic_init(struct vlapic *vlapic);
183void vlapic_cleanup(struct vlapic *vlapic);
184
185#endif /* _VLAPIC_PRIV_H_ */