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< * $FreeBSD: head/sys/amd64/vmm/io/vlapic_priv.h 259863 2013-12-25 06:46:31Z neel $
---
> * $FreeBSD: stable/10/sys/amd64/vmm/io/vlapic_priv.h 266339 2014-05-17 19:11:08Z jhb $
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> #include <x86/apicreg.h>
>
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> #define VLAPIC_CTR0(vlapic, format) \
> VCPU_CTR0((vlapic)->vm, (vlapic)->vcpuid, format)
>
> #define VLAPIC_CTR1(vlapic, format, p1) \
> VCPU_CTR1((vlapic)->vm, (vlapic)->vcpuid, format, p1)
>
> #define VLAPIC_CTR2(vlapic, format, p1, p2) \
> VCPU_CTR2((vlapic)->vm, (vlapic)->vcpuid, format, p1, p2)
>
> #define VLAPIC_CTR_IRR(vlapic, msg) \
> do { \
> uint32_t *irrptr = &(vlapic)->apic_page->irr0; \
> irrptr[0] = irrptr[0]; /* silence compiler */ \
> VLAPIC_CTR1((vlapic), msg " irr0 0x%08x", irrptr[0 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr1 0x%08x", irrptr[1 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr2 0x%08x", irrptr[2 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr3 0x%08x", irrptr[3 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr4 0x%08x", irrptr[4 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr5 0x%08x", irrptr[5 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr6 0x%08x", irrptr[6 << 2]); \
> VLAPIC_CTR1((vlapic), msg " irr7 0x%08x", irrptr[7 << 2]); \
> } while (0)
>
> #define VLAPIC_CTR_ISR(vlapic, msg) \
> do { \
> uint32_t *isrptr = &(vlapic)->apic_page->isr0; \
> isrptr[0] = isrptr[0]; /* silence compiler */ \
> VLAPIC_CTR1((vlapic), msg " isr0 0x%08x", isrptr[0 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr1 0x%08x", isrptr[1 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr2 0x%08x", isrptr[2 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr3 0x%08x", isrptr[3 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr4 0x%08x", isrptr[4 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr5 0x%08x", isrptr[5 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr6 0x%08x", isrptr[6 << 2]); \
> VLAPIC_CTR1((vlapic), msg " isr7 0x%08x", isrptr[7 << 2]); \
> } while (0)
>
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> #define VLAPIC_MAXLVT_INDEX APIC_LVT_CMCI
>
> struct vlapic;
>
> struct vlapic_ops {
> int (*set_intr_ready)(struct vlapic *vlapic, int vector, bool level);
> int (*pending_intr)(struct vlapic *vlapic, int *vecptr);
> void (*intr_accepted)(struct vlapic *vlapic, int vector);
> void (*post_intr)(struct vlapic *vlapic, int hostcpu);
> void (*set_tmr)(struct vlapic *vlapic, int vector, bool level);
> };
>
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> struct vlapic_ops ops;
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< uint8_t isrvec_stk[ISRVEC_STK_SIZE];
< int isrvec_stk_top;
---
> uint8_t isrvec_stk[ISRVEC_STK_SIZE];
> int isrvec_stk_top;
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< uint64_t msr_apicbase;
< enum boot_state boot_state;
---
> uint64_t msr_apicbase;
> enum boot_state boot_state;
>
> /*
> * Copies of some registers in the virtual APIC page. We do this for
> * a couple of different reasons:
> * - to be able to detect what changed (e.g. svr_last)
> * - to maintain a coherent snapshot of the register (e.g. lvt_last)
> */
> uint32_t svr_last;
> uint32_t lvt_last[VLAPIC_MAXLVT_INDEX + 1];