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vmcb.h (271152) vmcb.h (271203)
1/*-
2 * Copyright (c) 2013 Anish Gupta (akgupt3@gmail.com)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2013 Anish Gupta (akgupt3@gmail.com)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: projects/bhyve_svm/sys/amd64/vmm/amd/vmcb.h 271152 2014-09-05 03:33:16Z neel $
26 * $FreeBSD: projects/bhyve_svm/sys/amd64/vmm/amd/vmcb.h 271203 2014-09-06 19:02:52Z neel $
27 */
28
29#ifndef _VMCB_H_
30#define _VMCB_H_
31
32/*
33 * Secure Virtual Machine: AMD64 Programmer's Manual Vol2, Chapter 15
34 * Layout of VMCB: AMD64 Programmer's Manual Vol2, Appendix B

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99#define VMCB_CACHE_NP BIT(4) /* Nested Paging */
100#define VMCB_CACHE_CR BIT(5) /* CR0, CR3, CR4 & EFER */
101#define VMCB_CACHE_DR BIT(6) /* Debug registers */
102#define VMCB_CACHE_DT BIT(7) /* GDT/IDT */
103#define VMCB_CACHE_SEG BIT(8) /* User segments, CPL */
104#define VMCB_CACHE_CR2 BIT(9) /* page fault address */
105#define VMCB_CACHE_LBR BIT(10) /* Last branch */
106
27 */
28
29#ifndef _VMCB_H_
30#define _VMCB_H_
31
32/*
33 * Secure Virtual Machine: AMD64 Programmer's Manual Vol2, Chapter 15
34 * Layout of VMCB: AMD64 Programmer's Manual Vol2, Appendix B

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99#define VMCB_CACHE_NP BIT(4) /* Nested Paging */
100#define VMCB_CACHE_CR BIT(5) /* CR0, CR3, CR4 & EFER */
101#define VMCB_CACHE_DR BIT(6) /* Debug registers */
102#define VMCB_CACHE_DT BIT(7) /* GDT/IDT */
103#define VMCB_CACHE_SEG BIT(8) /* User segments, CPL */
104#define VMCB_CACHE_CR2 BIT(9) /* page fault address */
105#define VMCB_CACHE_LBR BIT(10) /* Last branch */
106
107
108/* VMCB control event injection */
109#define VMCB_EVENTINJ_EC_VALID BIT(11) /* Error Code valid */
110#define VMCB_EVENTINJ_VALID BIT(31) /* Event valid */
111
112/* Event types that can be injected */
113#define VMCB_EVENTINJ_TYPE_INTR 0
114#define VMCB_EVENTINJ_TYPE_NMI 2
115#define VMCB_EVENTINJ_TYPE_EXCEPTION 3

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272
273struct vmcb {
274 struct vmcb_ctrl ctrl;
275 struct vmcb_state state;
276} __attribute__ ((__packed__));
277CTASSERT(sizeof(struct vmcb) == PAGE_SIZE);
278CTASSERT(offsetof(struct vmcb, state) == 0x400);
279
107/* VMCB control event injection */
108#define VMCB_EVENTINJ_EC_VALID BIT(11) /* Error Code valid */
109#define VMCB_EVENTINJ_VALID BIT(31) /* Event valid */
110
111/* Event types that can be injected */
112#define VMCB_EVENTINJ_TYPE_INTR 0
113#define VMCB_EVENTINJ_TYPE_NMI 2
114#define VMCB_EVENTINJ_TYPE_EXCEPTION 3

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271
272struct vmcb {
273 struct vmcb_ctrl ctrl;
274 struct vmcb_state state;
275} __attribute__ ((__packed__));
276CTASSERT(sizeof(struct vmcb) == PAGE_SIZE);
277CTASSERT(offsetof(struct vmcb, state) == 0x400);
278
280int svm_init_vmcb(struct vmcb *vmcb, uint64_t iopm_base_pa,
281 uint64_t msrpm_base_pa, uint64_t np_pml4, uint32_t asid);
279void svm_init_vmcb(struct vmcb *vmcb, uint64_t iopm_base_pa,
280 uint64_t msrpm_base_pa, uint64_t np_pml4);
282int vmcb_read(struct vmcb *vmcb, int ident, uint64_t *retval);
283int vmcb_write(struct vmcb *vmcb, int ident, uint64_t val);
284struct vmcb_segment *vmcb_seg(struct vmcb *vmcb, int type);
285void vmcb_eventinject(struct vmcb_ctrl *ctrl, int type, int vector,
286 uint32_t error, bool ec_valid);
287
288#endif /* _VMCB_H_ */
281int vmcb_read(struct vmcb *vmcb, int ident, uint64_t *retval);
282int vmcb_write(struct vmcb *vmcb, int ident, uint64_t val);
283struct vmcb_segment *vmcb_seg(struct vmcb *vmcb, int type);
284void vmcb_eventinject(struct vmcb_ctrl *ctrl, int type, int vector,
285 uint32_t error, bool ec_valid);
286
287#endif /* _VMCB_H_ */