2,3c2,3
< Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
< 1998, 1999, 2000 Free Software Foundation, Inc.
---
> Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
> 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5c5
< This file is part of GNU CC.
---
> This file is part of GCC.
7,10c7,10
< GNU CC is free software; you can redistribute it and/or modify
< it under the terms of the GNU General Public License as published by
< the Free Software Foundation; either version 2, or (at your option)
< any later version.
---
> GCC is free software; you can redistribute it and/or modify it under
> the terms of the GNU General Public License as published by the Free
> Software Foundation; either version 2, or (at your option) any later
> version.
12,15c12,15
< GNU CC is distributed in the hope that it will be useful,
< but WITHOUT ANY WARRANTY; without even the implied warranty of
< MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
< GNU General Public License for more details.
---
> GCC is distributed in the hope that it will be useful, but WITHOUT ANY
> WARRANTY; without even the implied warranty of MERCHANTABILITY or
> FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
> for more details.
18,20c18,20
< along with GNU CC; see the file COPYING. If not, write to
< the Free Software Foundation, 59 Temple Place - Suite 330,
< Boston, MA 02111-1307, USA. */
---
> along with GCC; see the file COPYING. If not, write to the Free
> Software Foundation, 59 Temple Place - Suite 330, Boston, MA
> 02111-1307, USA. */
22d21
< /* $FreeBSD: head/contrib/gcc/reload.c 72564 2001-02-17 08:35:00Z obrien $ */
23a23
> /* $FreeBSD: head/contrib/gcc/reload.c 90285 2002-02-06 05:01:51Z obrien $ */
24a25
>
76d76
<
95a96
> #include "tm_p.h"
97c98,99
< #include "insn-codes.h"
---
> #include "expr.h"
> #include "optabs.h"
105c107
< #include "expr.h"
---
> #include "function.h"
109c111
< #define REGISTER_MOVE_COST(x, y) 2
---
> #define REGISTER_MOVE_COST(m, x, y) 2
120,174c122,123
< /* The variables set up by `find_reloads' are:
<
< n_reloads number of distinct reloads needed; max reload # + 1
< tables indexed by reload number
< reload_in rtx for value to reload from
< reload_out rtx for where to store reload-reg afterward if nec
< (often the same as reload_in)
< reload_reg_class enum reg_class, saying what regs to reload into
< reload_inmode enum machine_mode; mode this operand should have
< when reloaded, on input.
< reload_outmode enum machine_mode; mode this operand should have
< when reloaded, on output.
< reload_optional char, nonzero for an optional reload.
< Optional reloads are ignored unless the
< value is already sitting in a register.
< reload_nongroup char, nonzero when a reload must use a register
< not already allocated to a group.
< reload_inc int, positive amount to increment or decrement by if
< reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
< Ignored otherwise (don't assume it is zero).
< reload_in_reg rtx. A reg for which reload_in is the equivalent.
< If reload_in is a symbol_ref which came from
< reg_equiv_constant, then this is the pseudo
< which has that symbol_ref as equivalent.
< reload_reg_rtx rtx. This is the register to reload into.
< If it is zero when `find_reloads' returns,
< you must find a suitable register in the class
< specified by reload_reg_class, and store here
< an rtx for that register with mode from
< reload_inmode or reload_outmode.
< reload_nocombine char, nonzero if this reload shouldn't be
< combined with another reload.
< reload_opnum int, operand number being reloaded. This is
< used to group related reloads and need not always
< be equal to the actual operand number in the insn,
< though it current will be; for in-out operands, it
< is one of the two operand numbers.
< reload_when_needed enum, classifies reload as needed either for
< addressing an input reload, addressing an output,
< for addressing a non-reloaded mem ref,
< or for unspecified purposes (i.e., more than one
< of the above).
< reload_secondary_p int, 1 if this is a secondary register for one
< or more reloads.
< reload_secondary_in_reload
< reload_secondary_out_reload
< int, gives the reload number of a secondary
< reload, when needed; otherwise -1
< reload_secondary_in_icode
< reload_secondary_out_icode
< enum insn_code, if a secondary reload is required,
< gives the INSN_CODE that uses the secondary
< reload as a scratch register, or CODE_FOR_nothing
< if the secondary reload register is to be an
< intermediate register. */
---
> /* All reloads of the current insn are recorded here. See reload.h for
> comments. */
175a125
> struct reload rld[MAX_RELOADS];
177,196d126
< rtx reload_in[MAX_RELOADS];
< rtx reload_out[MAX_RELOADS];
< enum reg_class reload_reg_class[MAX_RELOADS];
< enum machine_mode reload_inmode[MAX_RELOADS];
< enum machine_mode reload_outmode[MAX_RELOADS];
< rtx reload_reg_rtx[MAX_RELOADS];
< char reload_optional[MAX_RELOADS];
< char reload_nongroup[MAX_RELOADS];
< int reload_inc[MAX_RELOADS];
< rtx reload_in_reg[MAX_RELOADS];
< rtx reload_out_reg[MAX_RELOADS];
< char reload_nocombine[MAX_RELOADS];
< int reload_opnum[MAX_RELOADS];
< enum reload_type reload_when_needed[MAX_RELOADS];
< int reload_secondary_p[MAX_RELOADS];
< int reload_secondary_in_reload[MAX_RELOADS];
< int reload_secondary_out_reload[MAX_RELOADS];
< enum insn_code reload_secondary_in_icode[MAX_RELOADS];
< enum insn_code reload_secondary_out_icode[MAX_RELOADS];
<
242c172
< is used per mode, but normally only one or two modes are ever used.
---
> is used per mode, but normally only one or two modes are ever used.
244c174
< We keep two versions, before and after register elimination. The one
---
> We keep two versions, before and after register elimination. The one
313c243
< static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
---
> static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
317,323c247,251
< static enum reg_class find_valid_class PROTO((enum machine_mode, int));
< static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
< enum machine_mode, enum machine_mode,
< int, int, int, enum reload_type));
< static void push_replacement PROTO((rtx *, int, enum machine_mode));
< static void combine_reloads PROTO((void));
< static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
---
> static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
> static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
> static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
> static void combine_reloads PARAMS ((void));
> static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
325c253
< static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
---
> static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
328,334c256,263
< static int hard_reg_set_here_p PROTO((int, int, rtx));
< static struct decomposition decompose PROTO((rtx));
< static int immune_p PROTO((rtx, rtx, struct decomposition));
< static int alternative_allows_memconst PROTO((const char *, int));
< static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
< static rtx make_memloc PROTO((rtx, int));
< static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
---
> static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
> static struct decomposition decompose PARAMS ((rtx));
> static int immune_p PARAMS ((rtx, rtx, struct decomposition));
> static int alternative_allows_memconst PARAMS ((const char *, int));
> static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
> int, rtx, int *));
> static rtx make_memloc PARAMS ((rtx, int));
> static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
336,338c265,268
< static rtx subst_reg_equivs PROTO((rtx, rtx));
< static rtx subst_indexed_address PROTO((rtx));
< static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
---
> static rtx subst_reg_equivs PARAMS ((rtx, rtx));
> static rtx subst_indexed_address PARAMS ((rtx));
> static void update_auto_inc_notes PARAMS ((rtx, int, int));
> static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
340c270
< static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
---
> static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
343c273
< static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
---
> static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
345,346c275
< static int find_inc_amount PROTO((rtx, rtx));
< static int loc_mentioned_in_p PROTO((rtx *, rtx));
---
> static int find_inc_amount PARAMS ((rtx, rtx));
431,432c360,361
< && insn_operand_predicate[(int) icode][in_p]
< && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
---
> && insn_data[(int) icode].operand[in_p].predicate
> && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
443c372
< /* If IN_P is non-zero, the reload register will be the output in
---
> /* If IN_P is non-zero, the reload register will be the output in
448,451c377
< char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
< enum reg_class insn_class
< = (insn_letter == 'r' ? GENERAL_REGS
< : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
---
> enum reg_class insn_class;
453,457c379,398
< if (insn_class == NO_REGS
< || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
< /* The scratch register's constraint must start with "=&". */
< || insn_operand_constraint[(int) icode][2][0] != '='
< || insn_operand_constraint[(int) icode][2][1] != '&')
---
> if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
> insn_class = ALL_REGS;
> else
> {
> char insn_letter
> = insn_data[(int) icode].operand[!in_p].constraint[in_p];
> insn_class
> = (insn_letter == 'r' ? GENERAL_REGS
> : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
>
> if (insn_class == NO_REGS)
> abort ();
> if (in_p
> && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
> abort ();
> }
>
> /* The scratch register's constraint must start with "=&". */
> if (insn_data[(int) icode].operand[2].constraint[0] != '='
> || insn_data[(int) icode].operand[2].constraint[1] != '&')
461c402
< mode = insn_operand_mode[(int) icode][2];
---
> mode = insn_data[(int) icode].operand[2].mode;
464c405
< char t_letter = insn_operand_constraint[(int) icode][2][2];
---
> char t_letter = insn_data[(int) icode].operand[2].constraint[2];
466c407
< t_mode = insn_operand_mode[(int) icode][2];
---
> t_mode = insn_data[(int) icode].operand[2].mode;
485,487c426,427
< Allow this when MODE is not reload_mode and assume that the generated
< code handles this case (it does on the Alpha, which is the only place
< this currently happens). */
---
> Allow this when a reload_in/out pattern is being used. I.e. assume
> that the generated code handles this case. */
489c429,430
< if (in_p && class == reload_class && mode == reload_mode)
---
> if (in_p && class == reload_class && icode == CODE_FOR_nothing
> && t_icode == CODE_FOR_nothing)
498,503c439,444
< if (reload_secondary_p[t_reload]
< && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
< || reg_class_subset_p (reload_reg_class[t_reload], t_class))
< && ((in_p && reload_inmode[t_reload] == t_mode)
< || (! in_p && reload_outmode[t_reload] == t_mode))
< && ((in_p && (reload_secondary_in_icode[t_reload]
---
> if (rld[t_reload].secondary_p
> && (reg_class_subset_p (t_class, rld[t_reload].class)
> || reg_class_subset_p (rld[t_reload].class, t_class))
> && ((in_p && rld[t_reload].inmode == t_mode)
> || (! in_p && rld[t_reload].outmode == t_mode))
> && ((in_p && (rld[t_reload].secondary_in_icode
505c446
< || (! in_p &&(reload_secondary_out_icode[t_reload]
---
> || (! in_p &&(rld[t_reload].secondary_out_icode
509,510c450,451
< reload_when_needed[t_reload],
< opnum, reload_opnum[t_reload]))
---
> rld[t_reload].when_needed,
> opnum, rld[t_reload].opnum))
513c454
< reload_inmode[t_reload] = t_mode;
---
> rld[t_reload].inmode = t_mode;
515c456
< reload_outmode[t_reload] = t_mode;
---
> rld[t_reload].outmode = t_mode;
517,518c458,459
< if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
< reload_reg_class[t_reload] = t_class;
---
> if (reg_class_subset_p (t_class, rld[t_reload].class))
> rld[t_reload].class = t_class;
520,525c461,466
< reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
< reload_optional[t_reload] &= optional;
< reload_secondary_p[t_reload] = 1;
< if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
< opnum, reload_opnum[t_reload]))
< reload_when_needed[t_reload] = RELOAD_OTHER;
---
> rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
> rld[t_reload].optional &= optional;
> rld[t_reload].secondary_p = 1;
> if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
> opnum, rld[t_reload].opnum))
> rld[t_reload].when_needed = RELOAD_OTHER;
531,538c472,478
< reload_in[t_reload] = reload_out[t_reload] = 0;
< reload_reg_class[t_reload] = t_class;
< reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
< reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
< reload_reg_rtx[t_reload] = 0;
< reload_optional[t_reload] = optional;
< reload_nongroup[t_reload] = 0;
< reload_inc[t_reload] = 0;
---
> rld[t_reload].in = rld[t_reload].out = 0;
> rld[t_reload].class = t_class;
> rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
> rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
> rld[t_reload].reg_rtx = 0;
> rld[t_reload].optional = optional;
> rld[t_reload].inc = 0;
540,549c480,489
< reload_nocombine[t_reload] = 1;
< reload_in_reg[t_reload] = 0;
< reload_out_reg[t_reload] = 0;
< reload_opnum[t_reload] = opnum;
< reload_when_needed[t_reload] = secondary_type;
< reload_secondary_in_reload[t_reload] = -1;
< reload_secondary_out_reload[t_reload] = -1;
< reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
< reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
< reload_secondary_p[t_reload] = 1;
---
> rld[t_reload].nocombine = 1;
> rld[t_reload].in_reg = 0;
> rld[t_reload].out_reg = 0;
> rld[t_reload].opnum = opnum;
> rld[t_reload].when_needed = secondary_type;
> rld[t_reload].secondary_in_reload = -1;
> rld[t_reload].secondary_out_reload = -1;
> rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
> rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
> rld[t_reload].secondary_p = 1;
557,565c497,505
< if (reload_secondary_p[s_reload]
< && (reg_class_subset_p (class, reload_reg_class[s_reload])
< || reg_class_subset_p (reload_reg_class[s_reload], class))
< && ((in_p && reload_inmode[s_reload] == mode)
< || (! in_p && reload_outmode[s_reload] == mode))
< && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
< || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
< && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
< || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
---
> if (rld[s_reload].secondary_p
> && (reg_class_subset_p (class, rld[s_reload].class)
> || reg_class_subset_p (rld[s_reload].class, class))
> && ((in_p && rld[s_reload].inmode == mode)
> || (! in_p && rld[s_reload].outmode == mode))
> && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
> || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
> && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
> || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
567,568c507,508
< && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
< opnum, reload_opnum[s_reload]))
---
> && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
> opnum, rld[s_reload].opnum))
571c511
< reload_inmode[s_reload] = mode;
---
> rld[s_reload].inmode = mode;
573c513
< reload_outmode[s_reload] = mode;
---
> rld[s_reload].outmode = mode;
575,576c515,516
< if (reg_class_subset_p (class, reload_reg_class[s_reload]))
< reload_reg_class[s_reload] = class;
---
> if (reg_class_subset_p (class, rld[s_reload].class))
> rld[s_reload].class = class;
578,583c518,523
< reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
< reload_optional[s_reload] &= optional;
< reload_secondary_p[s_reload] = 1;
< if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
< opnum, reload_opnum[s_reload]))
< reload_when_needed[s_reload] = RELOAD_OTHER;
---
> rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
> rld[s_reload].optional &= optional;
> rld[s_reload].secondary_p = 1;
> if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
> opnum, rld[s_reload].opnum))
> rld[s_reload].when_needed = RELOAD_OTHER;
591c531
< the reload and the output case after. This is due to the
---
> the reload and the output case after. This is due to the
606,607c546,547
< reload_in[s_reload] = reload_out[s_reload] = 0;
< reload_reg_class[s_reload] = class;
---
> rld[s_reload].in = rld[s_reload].out = 0;
> rld[s_reload].class = class;
609,614c549,553
< reload_inmode[s_reload] = in_p ? mode : VOIDmode;
< reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
< reload_reg_rtx[s_reload] = 0;
< reload_optional[s_reload] = optional;
< reload_nongroup[s_reload] = 0;
< reload_inc[s_reload] = 0;
---
> rld[s_reload].inmode = in_p ? mode : VOIDmode;
> rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
> rld[s_reload].reg_rtx = 0;
> rld[s_reload].optional = optional;
> rld[s_reload].inc = 0;
616,624c555,563
< reload_nocombine[s_reload] = 1;
< reload_in_reg[s_reload] = 0;
< reload_out_reg[s_reload] = 0;
< reload_opnum[s_reload] = opnum;
< reload_when_needed[s_reload] = secondary_type;
< reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
< reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
< reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
< reload_secondary_out_icode[s_reload]
---
> rld[s_reload].nocombine = 1;
> rld[s_reload].in_reg = 0;
> rld[s_reload].out_reg = 0;
> rld[s_reload].opnum = opnum;
> rld[s_reload].when_needed = secondary_type;
> rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
> rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
> rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
> rld[s_reload].secondary_out_icode
626c565
< reload_secondary_p[s_reload] = 1;
---
> rld[s_reload].secondary_p = 1;
644c583
< /* Return a memory location that will be used to copy X in mode MODE.
---
> /* Return a memory location that will be used to copy X in mode MODE.
650c589
< rtx x;
---
> rtx x ATTRIBUTE_UNUSED;
666c605
< if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
---
> if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
674c613
< /* If this is the first time we've tried to get a MEM for this mode,
---
> /* If this is the first time we've tried to get a MEM for this mode,
710c649
< find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
---
> find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0),
723c662
< bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
---
> memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
732c671
< enum machine_mode m1;
---
> enum machine_mode m1 ATTRIBUTE_UNUSED;
737,738c676,677
< enum reg_class best_class;
< int best_size = 0;
---
> enum reg_class best_class = NO_REGS;
> unsigned int best_size = 0;
765a705
>
784c724
< (A zero compared against anything is neutral.)
---
> (A zero compared against anything is neutral.)
789c729
<
---
>
791,792c731,732
< if ((reg_class_subset_p (class, reload_reg_class[i])
< || reg_class_subset_p (reload_reg_class[i], class))
---
> if ((reg_class_subset_p (class, rld[i].class)
> || reg_class_subset_p (rld[i].class, class))
794c734
< && (reload_reg_rtx[i] == 0
---
> && (rld[i].reg_rtx == 0
796,802c736,741
< true_regnum (reload_reg_rtx[i])))
< && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
< && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
< ||
< (out != 0 && MATCHES (reload_out[i], out)
< && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
< && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
---
> true_regnum (rld[i].reg_rtx)))
> && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
> && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
> || (out != 0 && MATCHES (rld[i].out, out)
> && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
> && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
804,805c743
< && MERGABLE_RELOADS (type, reload_when_needed[i],
< opnum, reload_opnum[i]))
---
> && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
814,815c752,753
< if ((reg_class_subset_p (class, reload_reg_class[i])
< || reg_class_subset_p (reload_reg_class[i], class))
---
> if ((reg_class_subset_p (class, rld[i].class)
> || reg_class_subset_p (rld[i].class, class))
818c756
< && (reload_reg_rtx[i] == 0
---
> && (rld[i].reg_rtx == 0
820,821c758,759
< true_regnum (reload_reg_rtx[i])))
< && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
---
> true_regnum (rld[i].reg_rtx)))
> && out == 0 && rld[i].out == 0 && rld[i].in != 0
823,835c761,766
< && (GET_CODE (reload_in[i]) == POST_INC
< || GET_CODE (reload_in[i]) == POST_DEC
< || GET_CODE (reload_in[i]) == PRE_INC
< || GET_CODE (reload_in[i]) == PRE_DEC)
< && MATCHES (XEXP (reload_in[i], 0), in))
< ||
< (GET_CODE (reload_in[i]) == REG
< && (GET_CODE (in) == POST_INC
< || GET_CODE (in) == POST_DEC
< || GET_CODE (in) == PRE_INC
< || GET_CODE (in) == PRE_DEC)
< && MATCHES (XEXP (in, 0), reload_in[i])))
< && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
---
> && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
> && MATCHES (XEXP (rld[i].in, 0), in))
> || (GET_CODE (rld[i].in) == REG
> && GET_RTX_CLASS (GET_CODE (in)) == 'a'
> && MATCHES (XEXP (in, 0), rld[i].in)))
> && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
837,838c768,769
< && MERGABLE_RELOADS (type, reload_when_needed[i],
< opnum, reload_opnum[i]))
---
> && MERGABLE_RELOADS (type, rld[i].when_needed,
> opnum, rld[i].opnum))
843c774
< *p_in = reload_in[i];
---
> *p_in = rld[i].in;
848a780,818
> /* Return nonzero if X is a SUBREG which will require reloading of its
> SUBREG_REG expression. */
>
> static int
> reload_inner_reg_of_subreg (x, mode)
> rtx x;
> enum machine_mode mode;
> {
> rtx inner;
>
> /* Only SUBREGs are problematical. */
> if (GET_CODE (x) != SUBREG)
> return 0;
>
> inner = SUBREG_REG (x);
>
> /* If INNER is a constant or PLUS, then INNER must be reloaded. */
> if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
> return 1;
>
> /* If INNER is not a hard register, then INNER will not need to
> be reloaded. */
> if (GET_CODE (inner) != REG
> || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
> return 0;
>
> /* If INNER is not ok for MODE, then INNER will need reloading. */
> if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
> return 1;
>
> /* If the outer part is a word or smaller, INNER larger than a
> word and the number of regs for INNER is not the same as the
> number of words in INNER, then INNER will need reloading. */
> return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
> && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
> && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
> != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
> }
>
882c852
< static int
---
> int
894c864
< register int i;
---
> int i;
910c880
< /* If IN is a pseudo register everywhere-equivalent to a constant, and
---
> /* If IN is a pseudo register everywhere-equivalent to a constant, and
916c886
< register int regno = REGNO (in);
---
> int regno = REGNO (in);
928c898
< register int regno = REGNO (out);
---
> int regno = REGNO (out);
938,945c908,912
< {
< if (GET_CODE (XEXP (in, 0)) == POST_INC
< || GET_CODE (XEXP (in, 0)) == POST_DEC)
< in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
< if (GET_CODE (XEXP (in, 0)) == PRE_INC
< || GET_CODE (XEXP (in, 0)) == PRE_DEC)
< out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
< }
---
> switch (GET_CODE (XEXP (in, 0)))
> {
> case POST_INC: case POST_DEC: case POST_MODIFY:
> in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
> break;
946a914,921
> case PRE_INC: case PRE_DEC: case PRE_MODIFY:
> out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
> break;
>
> default:
> break;
> }
>
972c947
< and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
---
> and M1 is not the same size as M2. If subreg_lowpart_p is false, we
978,980c953,956
< && (SUBREG_WORD (in) == 0 || strict_low)
< #ifdef CLASS_CANNOT_CHANGE_SIZE
< && class != CLASS_CANNOT_CHANGE_SIZE
---
> && (subreg_lowpart_p (in) || strict_low)
> #ifdef CLASS_CANNOT_CHANGE_MODE
> && (class != CLASS_CANNOT_CHANGE_MODE
> || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
1011c987
< && (out == 0 || SUBREG_WORD (in) == 0)
---
> && (out == 0 || subreg_lowpart_p (in))
1019,1021c995
< || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
< + SUBREG_WORD (in)),
< inmode)))
---
> || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1029c1003
< #ifdef CLASS_CANNOT_CHANGE_SIZE
---
> #ifdef CLASS_CANNOT_CHANGE_MODE
1033c1007
< (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
---
> (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1035,1036c1009,1010
< && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
< != GET_MODE_SIZE (inmode)))
---
> && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
> inmode))
1061c1035
< code above. This can happen if SUBREG_WORD != 0. */
---
> code above. This can happen if SUBREG_BYTE != 0. */
1063,1076c1037
< if (in != 0 && GET_CODE (in) == SUBREG
< && (CONSTANT_P (SUBREG_REG (in))
< || (GET_CODE (SUBREG_REG (in)) == REG
< && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
< && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
< + SUBREG_WORD (in),
< inmode)
< || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
< && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
< > UNITS_PER_WORD)
< && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
< / UNITS_PER_WORD)
< != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
< GET_MODE (SUBREG_REG (in)))))))))
---
> if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
1077a1039,1048
> enum reg_class in_class = class;
>
> if (GET_CODE (SUBREG_REG (in)) == REG)
> in_class
> = find_valid_class (inmode,
> subreg_regno_offset (REGNO (SUBREG_REG (in)),
> GET_MODE (SUBREG_REG (in)),
> SUBREG_BYTE (in),
> GET_MODE (in)));
>
1083,1085c1054,1055
< push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
< find_valid_class (inmode, SUBREG_WORD (in)),
< VOIDmode, VOIDmode, 0, 0, opnum, type);
---
> push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
> in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1096,1098c1066,1070
< && (SUBREG_WORD (out) == 0 || strict_low)
< #ifdef CLASS_CANNOT_CHANGE_SIZE
< && class != CLASS_CANNOT_CHANGE_SIZE
---
> && (subreg_lowpart_p (out) || strict_low)
> #ifdef CLASS_CANNOT_CHANGE_MODE
> && (class != CLASS_CANNOT_CHANGE_MODE
> || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
> outmode))
1114c1086
< ))
---
> ))
1124,1126c1096
< || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
< + SUBREG_WORD (out)),
< outmode)))
---
> || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1134c1104
< #ifdef CLASS_CANNOT_CHANGE_SIZE
---
> #ifdef CLASS_CANNOT_CHANGE_MODE
1138c1108
< (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
---
> (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1140,1141c1110,1111
< && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
< != GET_MODE_SIZE (outmode)))
---
> && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
> outmode))
1147c1117
< out = *outloc;
---
> out = *outloc;
1149c1119
< if (GET_CODE (out) == MEM
---
> if (GET_CODE (out) == MEM
1163,1174c1133
< if (out != 0 && GET_CODE (out) == SUBREG
< && GET_CODE (SUBREG_REG (out)) == REG
< && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
< && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
< outmode)
< || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
< && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
< > UNITS_PER_WORD)
< && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
< / UNITS_PER_WORD)
< != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
< GET_MODE (SUBREG_REG (out)))))))
---
> if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
1184c1143,1147
< find_valid_class (outmode, SUBREG_WORD (out)),
---
> find_valid_class (outmode,
> subreg_regno_offset (REGNO (SUBREG_REG (out)),
> GET_MODE (SUBREG_REG (out)),
> SUBREG_BYTE (out),
> GET_MODE (out))),
1201,1202c1164
< in = gen_rtx_REG (GET_MODE (in),
< REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
---
> in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1209,1210c1171
< out = gen_rtx_REG (GET_MODE (out),
< REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
---
> out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1314c1275
< class, inmode))
---
> class, inmode))
1319,1337c1280,1297
< reload_in[i] = in;
< reload_out[i] = out;
< reload_reg_class[i] = class;
< reload_inmode[i] = inmode;
< reload_outmode[i] = outmode;
< reload_reg_rtx[i] = 0;
< reload_optional[i] = optional;
< reload_nongroup[i] = 0;
< reload_inc[i] = 0;
< reload_nocombine[i] = 0;
< reload_in_reg[i] = inloc ? *inloc : 0;
< reload_out_reg[i] = outloc ? *outloc : 0;
< reload_opnum[i] = opnum;
< reload_when_needed[i] = type;
< reload_secondary_in_reload[i] = secondary_in_reload;
< reload_secondary_out_reload[i] = secondary_out_reload;
< reload_secondary_in_icode[i] = secondary_in_icode;
< reload_secondary_out_icode[i] = secondary_out_icode;
< reload_secondary_p[i] = 0;
---
> rld[i].in = in;
> rld[i].out = out;
> rld[i].class = class;
> rld[i].inmode = inmode;
> rld[i].outmode = outmode;
> rld[i].reg_rtx = 0;
> rld[i].optional = optional;
> rld[i].inc = 0;
> rld[i].nocombine = 0;
> rld[i].in_reg = inloc ? *inloc : 0;
> rld[i].out_reg = outloc ? *outloc : 0;
> rld[i].opnum = opnum;
> rld[i].when_needed = type;
> rld[i].secondary_in_reload = secondary_in_reload;
> rld[i].secondary_out_reload = secondary_out_reload;
> rld[i].secondary_in_icode = secondary_in_icode;
> rld[i].secondary_out_icode = secondary_out_icode;
> rld[i].secondary_p = 0;
1359,1360c1319,1320
< && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
< reload_inmode[i] = inmode;
---
> && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
> rld[i].inmode = inmode;
1362,1363c1322,1323
< && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
< reload_outmode[i] = outmode;
---
> && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
> rld[i].outmode = outmode;
1381,1382c1341,1342
< if (reload_in[i] != in && rtx_equal_p (in, reload_in[i])
< && ! (reload_optional[i] && optional))
---
> if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
> && ! (rld[i].optional && optional))
1386c1346
< if (opnum > reload_opnum[i])
---
> if (opnum > rld[i].opnum)
1389,1390c1349,1350
< in = reload_in[i];
< in_reg = reload_in_reg[i];
---
> in = rld[i].in;
> in_reg = rld[i].in_reg;
1393c1353
< remove_address_replacements (reload_in[i]);
---
> remove_address_replacements (rld[i].in);
1395,1396c1355,1356
< reload_in[i] = in;
< reload_in_reg[i] = in_reg;
---
> rld[i].in = in;
> rld[i].in_reg = in_reg;
1400,1401c1360,1361
< reload_out[i] = out;
< reload_out_reg[i] = outloc ? *outloc : 0;
---
> rld[i].out = out;
> rld[i].out_reg = outloc ? *outloc : 0;
1403,1409c1363,1369
< if (reg_class_subset_p (class, reload_reg_class[i]))
< reload_reg_class[i] = class;
< reload_optional[i] &= optional;
< if (MERGE_TO_OTHER (type, reload_when_needed[i],
< opnum, reload_opnum[i]))
< reload_when_needed[i] = RELOAD_OTHER;
< reload_opnum[i] = MIN (reload_opnum[i], opnum);
---
> if (reg_class_subset_p (class, rld[i].class))
> rld[i].class = class;
> rld[i].optional &= optional;
> if (MERGE_TO_OTHER (type, rld[i].when_needed,
> opnum, rld[i].opnum))
> rld[i].when_needed = RELOAD_OTHER;
> rld[i].opnum = MIN (rld[i].opnum, opnum);
1412c1372
< /* If the ostensible rtx being reload differs from the rtx found
---
> /* If the ostensible rtx being reloaded differs from the rtx found
1417c1377
< reload_nocombine[i] = 1;
---
> rld[i].nocombine = 1;
1431,1432c1391,1392
< reload_out[i] = 0;
< reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
---
> rld[i].out = 0;
> rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1436c1396
< if (reload_inc[i] == 0)
---
> if (rld[i].inc == 0)
1449c1409
< register struct replacement *r = &replacements[n_replacements++];
---
> struct replacement *r = &replacements[n_replacements++];
1457c1417
< register struct replacement *r = &replacements[n_replacements++];
---
> struct replacement *r = &replacements[n_replacements++];
1470c1430
< If one of them is acceptable, set reload_reg_rtx[i]
---
> If one of them is acceptable, set rld[i].reg_rtx
1473c1433
< if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
---
> if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1475,1478c1435,1438
< reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
< inmode, outmode,
< reload_reg_class[i], i,
< earlyclobber_operand_p (out));
---
> rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
> inmode, outmode,
> rld[i].class, i,
> earlyclobber_operand_p (out));
1484c1444
< if (reload_reg_rtx[i] == out
---
> if (rld[i].reg_rtx == out
1488c1448
< reload_in[i] = out;
---
> rld[i].in = out;
1503c1463
< if (reload_reg_rtx[i] == 0 && in != 0)
---
> if (rld[i].reg_rtx == 0 && in != 0)
1506a1467
> enum machine_mode rel_mode = inmode;
1507a1469,1471
> if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
> rel_mode = outmode;
>
1516c1480
< inmode)),
---
> rel_mode)),
1525c1489
< inmode)),
---
> rel_mode)),
1537c1501,1502
< && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
---
> && (GET_MODE_SIZE (rel_mode)
> <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1539d1503
< && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1554c1518
< reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
---
> rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1580c1544
< register struct replacement *r = &replacements[n_replacements++];
---
> struct replacement *r = &replacements[n_replacements++];
1614c1578
< bzero (reload_flags, sizeof reload_flags);
---
> memset (reload_flags, 0, sizeof reload_flags);
1633,1634c1597,1598
< remove_address_replacements (reload_in[i]);
< reload_in[i] = 0;
---
> remove_address_replacements (rld[i].in);
> rld[i].in = 0;
1640,1665d1603
<
< /* Return non-zero if IN contains a piece of rtl that has the address LOC */
< static int
< loc_mentioned_in_p (loc, in)
< rtx *loc, in;
< {
< enum rtx_code code = GET_CODE (in);
< char *fmt = GET_RTX_FORMAT (code);
< int i, j;
<
< for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
< {
< if (loc == &XEXP (in, i))
< return 1;
< if (fmt[i] == 'e')
< {
< if (loc_mentioned_in_p (loc, XEXP (in, i)))
< return 1;
< }
< else if (fmt[i] == 'E')
< for (j = XVECLEN (in, i) - 1; i >= 0; i--)
< if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
< return 1;
< }
< return 0;
< }
1691c1629
< if (reload_out[i] != 0)
---
> if (rld[i].out != 0)
1698c1636
< if (output_reload < 0 || reload_optional[output_reload])
---
> if (output_reload < 0 || rld[output_reload].optional)
1703c1641
< if (reload_in[output_reload] != 0)
---
> if (rld[output_reload].in != 0)
1707c1645
< if (earlyclobber_operand_p (reload_out[output_reload]))
---
> if (earlyclobber_operand_p (rld[output_reload].out))
1709a1648,1657
> /* If there is a reload for part of the address of this operand, we would
> need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
> its life to the point where doing this combine would not lower the
> number of spill registers needed. */
> for (i = 0; i < n_reloads; i++)
> if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> && rld[i].opnum == rld[output_reload].opnum)
> return;
>
1713c1661
< if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
---
> if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1715,1722c1663,1670
< && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
< && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
< && reload_when_needed[i] != RELOAD_OTHER
< && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
< == CLASS_MAX_NREGS (reload_reg_class[output_reload],
< reload_outmode[output_reload]))
< && reload_inc[i] == 0
< && reload_reg_rtx[i] == 0
---
> && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
> && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
> && rld[i].when_needed != RELOAD_OTHER
> && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
> == CLASS_MAX_NREGS (rld[output_reload].class,
> rld[output_reload].outmode))
> && rld[i].inc == 0
> && rld[i].reg_rtx == 0
1726,1729c1674,1677
< && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
< || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
< || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
< secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
---
> && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
> || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
> || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
> secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1732,1737c1680,1685
< ? (reload_reg_class[i] == reload_reg_class[output_reload])
< : (reg_class_subset_p (reload_reg_class[i],
< reload_reg_class[output_reload])
< || reg_class_subset_p (reload_reg_class[output_reload],
< reload_reg_class[i])))
< && (MATCHES (reload_in[i], reload_out[output_reload])
---
> ? (rld[i].class == rld[output_reload].class)
> : (reg_class_subset_p (rld[i].class,
> rld[output_reload].class)
> || reg_class_subset_p (rld[output_reload].class,
> rld[i].class)))
> && (MATCHES (rld[i].in, rld[output_reload].out)
1741,1742c1689,1690
< || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
< reload_in[i])
---
> || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
> rld[i].in)
1749,1752c1697,1701
< && ! (GET_CODE (reload_in[i]) == REG
< && reg_overlap_mentioned_for_reload_p (reload_in[i],
< reload_out[output_reload]))))
< && (reg_class_size[(int) reload_reg_class[i]]
---
> && ! (GET_CODE (rld[i].in) == REG
> && reg_overlap_mentioned_for_reload_p (rld[i].in,
> rld[output_reload].out))))
> && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
> && (reg_class_size[(int) rld[i].class]
1756,1757c1705,1706
< && (reload_when_needed[i] == RELOAD_FOR_INPUT
< || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
---
> && (rld[i].when_needed == RELOAD_FOR_INPUT
> || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1762,1764c1711,1713
< reload_out[i] = reload_out[output_reload];
< reload_out_reg[i] = reload_out_reg[output_reload];
< reload_outmode[i] = reload_outmode[output_reload];
---
> rld[i].out = rld[output_reload].out;
> rld[i].out_reg = rld[output_reload].out_reg;
> rld[i].outmode = rld[output_reload].outmode;
1766c1715
< reload_out[output_reload] = 0;
---
> rld[output_reload].out = 0;
1768c1717
< reload_when_needed[i] = RELOAD_OTHER;
---
> rld[i].when_needed = RELOAD_OTHER;
1770c1719
< if (reload_secondary_out_reload[output_reload] != -1)
---
> if (rld[output_reload].secondary_out_reload != -1)
1772,1775c1721,1724
< reload_secondary_out_reload[i]
< = reload_secondary_out_reload[output_reload];
< reload_secondary_out_icode[i]
< = reload_secondary_out_icode[output_reload];
---
> rld[i].secondary_out_reload
> = rld[output_reload].secondary_out_reload;
> rld[i].secondary_out_icode
> = rld[output_reload].secondary_out_icode;
1780,1782c1729,1731
< if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
< secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
< = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
---
> if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
> secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
> = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1785,1787c1734,1736
< if (reg_class_subset_p (reload_reg_class[output_reload],
< reload_reg_class[i]))
< reload_reg_class[i] = reload_reg_class[output_reload];
---
> if (reg_class_subset_p (rld[output_reload].class,
> rld[i].class))
> rld[i].class = rld[output_reload].class;
1806,1808c1755,1757
< for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
< if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
< || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
---
> for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
> if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
> || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1818c1767
< reload_out[output_reload])
---
> rld[output_reload].out)
1820,1821c1769,1770
< && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
< && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
---
> && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
> && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1823c1772
< && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
---
> && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1827,1831c1776,1780
< && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
< || (! (TEST_HARD_REG_BIT
< (reg_class_contents[(int) reload_reg_class[secondary_out]],
< REGNO (XEXP (note, 0))))
< && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
---
> && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
> || (! (TEST_HARD_REG_BIT
> (reg_class_contents[(int) rld[secondary_out].class],
> REGNO (XEXP (note, 0))))
> && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1833c1782
< (reg_class_contents[(int) reload_reg_class[secondary_out]],
---
> (reg_class_contents[(int) rld[secondary_out].class],
1837,1838c1786,1787
< reload_reg_rtx[output_reload]
< = gen_rtx_REG (reload_outmode[output_reload],
---
> rld[output_reload].reg_rtx
> = gen_rtx_REG (rld[output_reload].outmode,
1854c1803
< to be computed, clear out reload_out[FOR_REAL].
---
> to be computed, clear out rld[FOR_REAL].out.
1886a1836,1838
> /* Note that {in,out}_offset are needed only when 'in' or 'out'
> respectively refers to a hard register. */
>
1890c1842,1847
< out_offset = SUBREG_WORD (out);
---
> if (GET_CODE (SUBREG_REG (out)) == REG
> && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
> out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
> GET_MODE (SUBREG_REG (out)),
> SUBREG_BYTE (out),
> GET_MODE (out));
1895c1852,1857
< in_offset = SUBREG_WORD (in);
---
> if (GET_CODE (SUBREG_REG (in)) == REG
> && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
> in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
> GET_MODE (SUBREG_REG (in)),
> SUBREG_BYTE (in),
> GET_MODE (in));
1907,1908c1869,1870
< register int regno = REGNO (out) + out_offset;
< int nwords = HARD_REGNO_NREGS (regno, outmode);
---
> unsigned int regno = REGNO (out) + out_offset;
> unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1924,1928d1885
< /* A fixed reg that can overlap other regs better not be used
< for reloading in any way. */
< #ifdef OVERLAPPING_REGNO_P
< && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
< #endif
1932c1889,1890
< int i;
---
> unsigned int i;
>
1971,1972c1929,1930
< register int regno = REGNO (in) + in_offset;
< int nwords = HARD_REGNO_NREGS (regno, inmode);
---
> unsigned int regno = REGNO (in) + in_offset;
> unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1974c1932
< if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
---
> if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1981c1939,1940
< int i;
---
> unsigned int i;
>
1993c1952
< reload_out[for_real] = 0;
---
> rld[for_real].out = 0;
2031c1990
< register int beg_regno, end_regno;
---
> unsigned int beg_regno, end_regno;
2036c1995,1996
< register rtx op0 = SET_DEST (x);
---
> rtx op0 = SET_DEST (x);
>
2041c2001,2002
< register int r = REGNO (op0);
---
> unsigned int r = REGNO (op0);
>
2050c2011,2012
< register int i = XVECLEN (x, 0) - 1;
---
> int i = XVECLEN (x, 0) - 1;
>
2065,2066c2027,2028
< enum machine_mode mode;
< register rtx addr;
---
> enum machine_mode mode ATTRIBUTE_UNUSED;
> rtx addr;
2092c2054
< register rtx x, y;
---
> rtx x, y;
2094,2096c2056,2058
< register int i;
< register RTX_CODE code = GET_CODE (x);
< register char *fmt;
---
> int i;
> RTX_CODE code = GET_CODE (x);
> const char *fmt;
2098c2060
<
---
>
2105c2067
< register int j;
---
> int j;
2112c2074,2077
< i += SUBREG_WORD (x);
---
> i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
> GET_MODE (SUBREG_REG (x)),
> SUBREG_BYTE (x),
> GET_MODE (x));
2122c2087,2090
< j += SUBREG_WORD (y);
---
> j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
> GET_MODE (SUBREG_REG (y)),
> SUBREG_BYTE (y),
> GET_MODE (y));
2144c2112
< if (code == POST_DEC || code == POST_INC)
---
> if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2152c2120,2121
< if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
---
> if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
> || GET_CODE (y) == PRE_MODIFY)
2157c2126
< /* Now we have disposed of all the cases
---
> /* Now we have disposed of all the cases
2228c2197
< If X is a register, set REG_FLAG and put the first register
---
> If X is a register, set REG_FLAG and put the first register
2230c2199
< If X is a memory reference, put a base address into BASE
---
> If X is a memory reference, put a base address into BASE
2232c2201
< If X is pushing on the stack, we can assume it causes no trouble,
---
> If X is pushing on the stack, we can assume it causes no trouble,
2247c2216
< rtx base, offset = 0;
---
> rtx base = NULL_RTX, offset = 0;
2254c2223
< val.start = - GET_MODE_SIZE (GET_MODE (x));
---
> val.start = -GET_MODE_SIZE (GET_MODE (x));
2259a2229,2242
> if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
> {
> if (GET_CODE (XEXP (addr, 1)) == PLUS
> && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
> && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
> {
> val.base = XEXP (addr, 0);
> val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
> val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
> val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
> return val;
> }
> }
>
2283c2266
< }
---
> }
2324c2307
< val.start = true_regnum (x);
---
> val.start = true_regnum (x);
2341c2324
< val.start = true_regnum (x);
---
> val.start = true_regnum (x);
2368c2351
< return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
---
> return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2378c2361
< xdata = decompose (x);
---
> xdata = decompose (x);
2400d2382
<
2445,2448c2427,2428
< #ifdef REGISTER_CONSTRAINTS
<
< register int insn_code_number;
< register int i, j;
---
> int insn_code_number;
> int i, j;
2467a2448
> char this_alternative_match_win[MAX_RECOG_OPERANDS];
2475c2456
< int goal_alternative_number;
---
> int goal_alternative_number = 0;
2478a2460
> char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2485d2466
< int changed;
2490c2471
< int goal_earlyclobber, this_earlyclobber;
---
> int goal_earlyclobber = 0, this_earlyclobber;
2493,2495d2473
< /* Cache the last regno for the last pseudo we did an output reload
< for in case the next insn uses it. */
< static int last_output_reload_regno = -1;
2517c2495
<
---
>
2522c2500
< bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
---
> memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2533c2511,2512
< && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
---
> && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
> REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2539,2540c2518,2519
< noperands = reload_n_operands = recog_n_operands;
< n_alternatives = recog_n_alternatives;
---
> noperands = reload_n_operands = recog_data.n_operands;
> n_alternatives = recog_data.n_alternatives;
2549,2552c2528,2530
< bcopy ((char *) recog_operand_mode, (char *) operand_mode,
< noperands * sizeof (enum machine_mode));
< bcopy ((char *) recog_constraints, (char *) constraints,
< noperands * sizeof (char *));
---
> memcpy (operand_mode, recog_data.operand_mode,
> noperands * sizeof (enum machine_mode));
> memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2563,2564c2541,2542
< register char *p;
< register int c;
---
> char *p;
> int c;
2566c2544
< substed_operand[i] = recog_operand[i];
---
> substed_operand[i] = recog_data.operand[i];
2571c2549
< /* Scan this operand's constraint to see if it is an output operand,
---
> /* Scan this operand's constraint to see if it is an output operand,
2588c2566
< else if (c >= '0' && c <= '9')
---
> else if (ISDIGIT (c))
2590c2568,2569
< c -= '0';
---
> c = strtoul (p - 1, &p, 10);
>
2592c2571,2572
< = operands_match_p (recog_operand[c], recog_operand[i]);
---
> = operands_match_p (recog_data.operand[c],
> recog_data.operand[i]);
2606c2586,2587
< = operands_match_p (recog_operand[other], recog_operand[i]);
---
> = operands_match_p (recog_data.operand[other],
> recog_data.operand[i]);
2612c2593,2594
< = operands_match_p (recog_operand[c], recog_operand[other]);
---
> = operands_match_p (recog_data.operand[c],
> recog_data.operand[other]);
2626c2608
< with those constants. Nobody will ever see them again.
---
> with those constants. Nobody will ever see them again.
2632c2614
< register RTX_CODE code = GET_CODE (recog_operand[i]);
---
> RTX_CODE code = GET_CODE (recog_data.operand[i]);
2648,2649c2630,2632
< find_reloads_address (VOIDmode, NULL_PTR,
< recog_operand[i], recog_operand_loc[i],
---
> find_reloads_address (VOIDmode, (rtx*) 0,
> recog_data.operand[i],
> recog_data.operand_loc[i],
2652c2635
< /* If we now have a simple operand where we used to have a
---
> /* If we now have a simple operand where we used to have a
2654,2657c2637,2640
< if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
< || GET_CODE (*recog_operand_loc[i]) == SUBREG)
< && (GET_CODE (recog_operand[i]) == MULT
< || GET_CODE (recog_operand[i]) == PLUS))
---
> if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
> || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
> && (GET_CODE (recog_data.operand[i]) == MULT
> || GET_CODE (recog_data.operand[i]) == PLUS))
2665c2648,2649
< substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
---
> recog_data.operand[i] = *recog_data.operand_loc[i];
> substed_operand[i] = recog_data.operand[i];
2670,2673c2654,2657
< = find_reloads_address (GET_MODE (recog_operand[i]),
< recog_operand_loc[i],
< XEXP (recog_operand[i], 0),
< &XEXP (recog_operand[i], 0),
---
> = find_reloads_address (GET_MODE (recog_data.operand[i]),
> recog_data.operand_loc[i],
> XEXP (recog_data.operand[i], 0),
> &XEXP (recog_data.operand[i], 0),
2675c2659,2660
< substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
---
> recog_data.operand[i] = *recog_data.operand_loc[i];
> substed_operand[i] = recog_data.operand[i];
2679c2664
< rtx reg = SUBREG_REG (recog_operand[i]);
---
> rtx reg = SUBREG_REG (recog_data.operand[i]);
2681c2666
< = find_reloads_toplev (recog_operand[i], i, address_type[i],
---
> = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2684,2685c2669,2671
< && &SET_DEST (set) == recog_operand_loc[i],
< insn);
---
> && &SET_DEST (set) == recog_data.operand_loc[i],
> insn,
> &address_reloaded[i]);
2691c2677
<
---
>
2697,2699c2683,2685
< REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
< = gen_rtx_EXPR_LIST (REG_EQUAL,
< reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
---
> set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
> insn),
> REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2701c2687
< substed_operand[i] = recog_operand[i] = op;
---
> substed_operand[i] = recog_data.operand[i] = op;
2707,2709c2693,2696
< substed_operand[i] = recog_operand[i]
< = find_reloads_toplev (recog_operand[i], i, address_type[i],
< ind_levels, 0, insn);
---
> substed_operand[i] = recog_data.operand[i]
> = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
> ind_levels, 0, insn,
> &address_reloaded[i]);
2717,2718c2704,2705
< is being set. */
< register int regno = REGNO (recog_operand[i]);
---
> is being set. */
> int regno = REGNO (recog_data.operand[i]);
2720c2707
< && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
---
> && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2723c2710
< allowed will work when operand_mode isn't specified. */
---
> allowed will work when operand_mode isn't specified. */
2726c2713
< operand_mode[i] = GET_MODE (recog_operand[i]);
---
> operand_mode[i] = GET_MODE (recog_data.operand[i]);
2728,2729c2715,2716
< substed_operand[i] = recog_operand[i]
< = reg_equiv_constant[regno];
---
> substed_operand[i] = recog_data.operand[i]
> = reg_equiv_constant[regno];
2735,2737c2722,2725
< substed_operand[i] = recog_operand[i]
< = find_reloads_toplev (recog_operand[i], i, address_type[i],
< ind_levels, 0, insn);
---
> substed_operand[i] = recog_data.operand[i]
> = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
> ind_levels, 0, insn,
> &address_reloaded[i]);
2741c2729
< code = GET_CODE (recog_operand[i]);
---
> code = GET_CODE (recog_data.operand[i]);
2743,2744c2731,2734
< = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
< ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
---
> = ((code == REG && REGNO (recog_data.operand[i])
> >= FIRST_PSEUDO_REGISTER)
> ? reg_preferred_class (REGNO (recog_data.operand[i]))
> : NO_REGS);
2746,2747c2736,2738
< = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
< && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
---
> = (code == REG
> && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
> && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2750,2758d2740
< #ifdef HAVE_cc0
< /* If we made any reloads for addresses, see if they violate a
< "no input reloads" requirement for this insn. */
< if (no_input_reloads)
< for (i = 0; i < n_reloads; i++)
< if (reload_in[i] != 0)
< abort ();
< #endif
<
2761,2762c2743,2744
< if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
< && recog_operand[1] == SET_SRC (set))
---
> if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
> && recog_data.operand[1] == SET_SRC (set))
2801c2783
< counted against it in addition to the reloading needed. Each
---
> counted against it in addition to the reloading needed. Each
2810,2812c2792,2795
< register char *p = constraints[i];
< register int win = 0;
< /* 0 => this operand can be reloaded somehow for this alternative */
---
> char *p = constraints[i];
> int win = 0;
> int did_match = 0;
> /* 0 => this operand can be reloaded somehow for this alternative. */
2817c2800
< register rtx operand = recog_operand[i];
---
> rtx operand = recog_data.operand[i];
2829c2812
< we need to reload the operand, but do not do this for
---
> we need to reload the operand, but do not do this for
2840c2823,2834
< offset += SUBREG_WORD (operand);
---
> /* Offset only matters when operand is a REG and
> it is a hard reg. This is because it is passed
> to reg_fits_class_p if it is a REG and all pseudos
> return 0 from that function. */
> if (GET_CODE (SUBREG_REG (operand)) == REG
> && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
> {
> offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
> GET_MODE (SUBREG_REG (operand)),
> SUBREG_BYTE (operand),
> GET_MODE (operand));
> }
2859c2853
< register and let the insn do the different-sized
---
> register and let the insn do the different-sized
2862c2856
< This is doubly true if WORD_REGISTER_OPERATIONS. In
---
> This is doubly true if WORD_REGISTER_OPERATIONS. In
2890a2885,2889
> /* This following hunk of code should no longer be
> needed at all with SUBREG_BYTE. If you need this
> code back, please explain to me why so I can
> fix the real problem. -DaveM */
> #if 0
2904c2903,2905
< operand_mode[i]))))
---
> operand_mode[i])))
> #endif
> )
2909a2911
> this_alternative_match_win[i] = 0;
2929,2931c2931
< case '=':
< case '+':
< case '*':
---
> case '=': case '+': case '*':
2951c2951,2952
< while (*p && *p != ',') p++;
---
> while (*p && *p != ',')
> p++;
2954,2959c2955,2958
< case '0':
< case '1':
< case '2':
< case '3':
< case '4':
< c -= '0';
---
> case '0': case '1': case '2': case '3': case '4':
> case '5': case '6': case '7': case '8': case '9':
> c = strtoul (p - 1, &p, 10);
>
2976,2979c2975,2978
< [(c == commutative || c == commutative + 1)
< ? 2*commutative + 1 - c : c]
< [(i == commutative || i == commutative + 1)
< ? 2*commutative + 1 - i : i])
---
> [(c == commutative || c == commutative + 1)
> ? 2 * commutative + 1 - c : c]
> [(i == commutative || i == commutative + 1)
> ? 2 * commutative + 1 - i : i])
2986c2985
< && GET_CODE (recog_operand[c]) == MEM
---
> && GET_CODE (recog_data.operand[c]) == MEM
2991c2990
< win = this_alternative_win[c];
---
> did_match = this_alternative_win[c];
3007,3008c3006,3009
< = find_dummy_reload (recog_operand[i], recog_operand[c],
< recog_operand_loc[i], recog_operand_loc[c],
---
> = find_dummy_reload (recog_data.operand[i],
> recog_data.operand[c],
> recog_data.operand_loc[i],
> recog_data.operand_loc[c],
3025c3026
< if (! win || force_reload)
---
> if (! did_match || force_reload)
3030d3030
<
3036c3036
< this_alternative[i] = (int) BASE_REG_CLASS;
---
> this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3197,3198c3197,3198
< && (! CONSTANT_P (operand)
< || ! flag_pic
---
> && (! CONSTANT_P (operand)
> || ! flag_pic
3206c3206
< /* Drop through into 'r' case */
---
> /* Drop through into 'r' case. */
3212a3213,3215
> default:
> if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
> {
3214,3221c3217,3218
< case 'Q':
< case 'R':
< case 'S':
< case 'T':
< case 'U':
< if (EXTRA_CONSTRAINT (operand, c))
< win = 1;
< break;
---
> if (EXTRA_CONSTRAINT (operand, c))
> win = 1;
3223,3224c3220,3222
<
< default:
---
> break;
> }
>
3227d3224
<
3234c3231
< offset, GET_MODE (recog_operand[i])))
---
> offset, GET_MODE (recog_data.operand[i])))
3249a3247,3248
> else if (did_match && ! force_reload)
> this_alternative_match_win[i] = 1;
3264,3278d3262
< #if 0
< /* If this is a pseudo-register that is set in the previous
< insns, there's a good chance that it will already be in a
< spill register and we can use that spill register. So
< make this case cheaper.
<
< Disabled for egcs. egcs has better inheritance code and
< this change causes problems with the improved reload
< inheritance code. */
< if (GET_CODE (operand) == REG
< && REGNO (operand) >= FIRST_PSEUDO_REGISTER
< && REGNO (operand) == last_output_reload_regno)
< reject--;
< #endif
<
3284c3268
< an early reload pass. Note that the test here is
---
> an early reload pass. Note that the test here is
3291c3275
< (enum reg_class) this_alternative[i])
---
> (enum reg_class) this_alternative[i])
3317,3318c3301,3302
< && modified[i] != RELOAD_READ && no_output_reloads
< && ! find_reg_note (insn, REG_UNUSED, operand))
---
> && modified[i] != RELOAD_READ && no_output_reloads
> && ! find_reg_note (insn, REG_UNUSED, operand))
3324d3307
<
3328c3311
< insns, just using a register, so it is also preferred.
---
> insns, just using a register, so it is also preferred.
3346c3329
< /* If this operand is a pseudo register that didn't get a hard
---
> /* If this operand is a pseudo register that didn't get a hard
3367,3368c3350,3351
<
< if (! win && this_alternative[i] != (int) NO_REGS
---
> if (! win && ! did_match
> && this_alternative[i] != (int) NO_REGS
3377c3360
< is a subset of the class we have; that's the most
---
> is a subset of the class we have; that's the most
3394c3377
< && this_alternative_win[i])
---
> && (this_alternative_win[i] || this_alternative_match_win[i]))
3396c3379
< struct decomposition early_data;
---
> struct decomposition early_data;
3398c3381
< early_data = decompose (recog_operand[i]);
---
> early_data = decompose (recog_data.operand[i]);
3402c3385
<
---
>
3415c3398
< if ((GET_CODE (recog_operand[j]) == MEM
---
> if ((GET_CODE (recog_data.operand[j]) == MEM
3419c3402
< && *recog_constraints[j] != 0
---
> && *recog_data.constraints[j] != 0
3423c3406,3407
< && rtx_equal_p (recog_operand[i], recog_operand[j]))
---
> && rtx_equal_p (recog_data.operand[i],
> recog_data.operand[j]))
3425c3409,3410
< && !immune_p (recog_operand[j], recog_operand[i], early_data))
---
> && !immune_p (recog_data.operand[j], recog_data.operand[i],
> early_data))
3430,3431c3415,3416
< && (GET_CODE (recog_operand[j]) == REG
< || GET_CODE (recog_operand[j]) == SUBREG))
---
> && (GET_CODE (recog_data.operand[j]) == REG
> || GET_CODE (recog_data.operand[j]) == SUBREG))
3434a3420
> this_alternative_match_win[j] = 0;
3444a3431
> this_alternative_match_win[j] = 0;
3447c3434
< && this_alternative_win[j])
---
> && this_alternative_match_win[j])
3449a3437
> this_alternative_match_win[j] = 0;
3462,3463c3450,3451
< recog_operand[commutative] = substed_operand[commutative];
< recog_operand[commutative + 1]
---
> recog_data.operand[commutative] = substed_operand[commutative];
> recog_data.operand[commutative + 1]
3468c3456,3457
< goal_alternative_win[i] = 1;
---
> goal_alternative_win[i] = this_alternative_win[i];
> goal_alternative_match_win[i] = this_alternative_match_win[i];
3495a3485
> goal_alternative_match_win[i] = this_alternative_match_win[i];
3522,3523c3512,3513
< register enum reg_class tclass;
< register int t;
---
> enum reg_class tclass;
> int t;
3525,3526c3515,3522
< recog_operand[commutative] = substed_operand[commutative + 1];
< recog_operand[commutative + 1] = substed_operand[commutative];
---
> recog_data.operand[commutative] = substed_operand[commutative + 1];
> recog_data.operand[commutative + 1] = substed_operand[commutative];
> /* Swap the duplicates too. */
> for (i = 0; i < recog_data.n_dups; i++)
> if (recog_data.dup_num[i] == commutative
> || recog_data.dup_num[i] == commutative + 1)
> *recog_data.dup_loc[i]
> = recog_data.operand[(int) recog_data.dup_num[i]];
3536,3537c3532,3533
< bcopy ((char *) recog_constraints, (char *) constraints,
< noperands * sizeof (char *));
---
> memcpy (constraints, recog_data.constraints,
> noperands * sizeof (char *));
3542,3543c3538,3546
< recog_operand[commutative] = substed_operand[commutative];
< recog_operand[commutative + 1] = substed_operand[commutative + 1];
---
> recog_data.operand[commutative] = substed_operand[commutative];
> recog_data.operand[commutative + 1]
> = substed_operand[commutative + 1];
> /* Unswap the duplicates too. */
> for (i = 0; i < recog_data.n_dups; i++)
> if (recog_data.dup_num[i] == commutative
> || recog_data.dup_num[i] == commutative + 1)
> *recog_data.dup_loc[i]
> = recog_data.operand[(int) recog_data.dup_num[i]];
3556c3559
< fatal_insn ("Unable to generate reloads for:", insn);
---
> fatal_insn ("unable to generate reloads for:", insn);
3576c3579
<
---
>
3581a3585,3587
> for (i = 0; i < noperands; i++)
> goal_alternative_win[i] |= goal_alternative_match_win[i];
>
3588c3594
< register rtx tem;
---
> rtx tem;
3593,3598c3599,3605
< tem = recog_operand[commutative];
< recog_operand[commutative] = recog_operand[commutative + 1];
< recog_operand[commutative + 1] = tem;
< tem = *recog_operand_loc[commutative];
< *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
< *recog_operand_loc[commutative+1] = tem;
---
> tem = recog_data.operand[commutative];
> recog_data.operand[commutative] = recog_data.operand[commutative + 1];
> recog_data.operand[commutative + 1] = tem;
> tem = *recog_data.operand_loc[commutative];
> *recog_data.operand_loc[commutative]
> = *recog_data.operand_loc[commutative + 1];
> *recog_data.operand_loc[commutative + 1] = tem;
3602,3605c3609,3612
< if (reload_opnum[i] == commutative)
< reload_opnum[i] = commutative + 1;
< else if (reload_opnum[i] == commutative + 1)
< reload_opnum[i] = commutative;
---
> if (rld[i].opnum == commutative)
> rld[i].opnum = commutative + 1;
> else if (rld[i].opnum == commutative + 1)
> rld[i].opnum = commutative;
3621c3628
< a SCRATCH). In this case, we only need have the reload live
---
> a SCRATCH). In this case, we only need have the reload live
3623c3630
< reloads.
---
> reloads.
3632c3639
< = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
---
> = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3640c3647
< && CONSTANT_P (recog_operand[i])
---
> && CONSTANT_P (recog_data.operand[i])
3642,3644c3649,3651
< && GET_CODE (recog_operand[i]) != HIGH
< && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
< (enum reg_class) goal_alternative[i])
---
> && GET_CODE (recog_data.operand[i]) != HIGH
> && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
> (enum reg_class) goal_alternative[i])
3649c3656
< substed_operand[i] = recog_operand[i]
---
> substed_operand[i] = recog_data.operand[i]
3651,3653c3658,3661
< recog_operand[i]),
< i, address_type[i], ind_levels, 0, insn);
< if (alternative_allows_memconst (recog_constraints[i],
---
> recog_data.operand[i]),
> i, address_type[i], ind_levels, 0, insn,
> NULL);
> if (alternative_allows_memconst (recog_data.constraints[i],
3662c3670
< reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
---
> reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3665d3672
< last_output_reload_regno = -1;
3681c3688
< && GET_CODE (recog_operand[i]) == MEM)
---
> && GET_CODE (recog_data.operand[i]) == MEM)
3684,3686c3691,3694
< = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
< &XEXP (recog_operand[i], 0), NULL_PTR,
< BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
---
> = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
> &XEXP (recog_data.operand[i], 0), (rtx*) 0,
> MODE_BASE_REG_CLASS (VOIDmode),
> GET_MODE (XEXP (recog_data.operand[i], 0)),
3688,3689c3696,3697
< reload_inc[operand_reloadnum[i]]
< = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
---
> rld[operand_reloadnum[i]].inc
> = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3700c3708
< if (reload_opnum[j] == i)
---
> if (rld[j].opnum == i)
3702,3704c3710,3712
< if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
< reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
< else if (reload_when_needed[j]
---
> if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
> rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
> else if (rld[j].when_needed
3706c3714
< reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
---
> rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3715,3716c3723,3725
< ? recog_operand[i] : 0),
< modified[i] != RELOAD_READ ? recog_operand[i] : 0,
---
> ? recog_data.operand[i] : 0),
> (modified[i] != RELOAD_READ
> ? recog_data.operand[i] : 0),
3718c3727
< ? recog_operand_loc[i] : 0),
---
> ? recog_data.operand_loc[i] : 0),
3720c3729
< ? recog_operand_loc[i] : 0),
---
> ? recog_data.operand_loc[i] : 0),
3727c3736
< : insn_operand_strict_low[insn_code_number][i]),
---
> : insn_data[insn_code_number].operand[i].strict_low),
3729,3731d3737
< if (modified[i] != RELOAD_READ
< && GET_CODE (recog_operand[i]) == REG)
< last_output_reload_regno = REGNO (recog_operand[i]);
3740,3743c3746,3749
< = push_reload (recog_operand[i],
< recog_operand[goal_alternative_matched[i]],
< recog_operand_loc[i],
< recog_operand_loc[goal_alternative_matched[i]],
---
> = push_reload (recog_data.operand[i],
> recog_data.operand[goal_alternative_matched[i]],
> recog_data.operand_loc[i],
> recog_data.operand_loc[goal_alternative_matched[i]],
3749,3751d3754
< if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
< last_output_reload_regno
< = REGNO (recog_operand[goal_alternative_matched[i]]);
3757,3760c3760,3763
< = push_reload (recog_operand[goal_alternative_matched[i]],
< recog_operand[i],
< recog_operand_loc[goal_alternative_matched[i]],
< recog_operand_loc[i],
---
> = push_reload (recog_data.operand[goal_alternative_matched[i]],
> recog_data.operand[i],
> recog_data.operand_loc[goal_alternative_matched[i]],
> recog_data.operand_loc[i],
3766,3767d3768
< if (GET_CODE (recog_operand[i]) == REG)
< last_output_reload_regno = REGNO (recog_operand[i]);
3784c3785
< /* For each non-matching operand that's a MEM or a pseudo-register
---
> /* For each non-matching operand that's a MEM or a pseudo-register
3788c3789
< rtx operand = recog_operand[i];
---
> rtx operand = recog_data.operand[i];
3791c3792
< operand = XEXP (operand, 0);
---
> operand = SUBREG_REG (operand);
3811,3812c3812,3815
< = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
< modified[i] != RELOAD_READ ? recog_operand[i] : 0,
---
> = push_reload ((modified[i] != RELOAD_WRITE
> ? recog_data.operand[i] : 0),
> (modified[i] != RELOAD_READ
> ? recog_data.operand[i] : 0),
3814c3817
< ? recog_operand_loc[i] : 0),
---
> ? recog_data.operand_loc[i] : 0),
3816c3819
< ? recog_operand_loc[i] : 0),
---
> ? recog_data.operand_loc[i] : 0),
3823c3826
< : insn_operand_strict_low[insn_code_number][i]),
---
> : insn_data[insn_code_number].operand[i].strict_low),
3836c3839
< operand = *recog_operand_loc[i];
---
> operand = *recog_data.operand_loc[i];
3839c3842
< operand = XEXP (operand, 0);
---
> operand = SUBREG_REG (operand);
3843c3846,3850
< emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
---
> /* We mark the USE with QImode so that we recognize
> it as one that can be safely deleted at the end
> of reload. */
> PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
> insn), QImode);
3859c3866
< rtx operand = recog_operand[i];
---
> rtx operand = recog_data.operand[i];
3862c3869
< operand = XEXP (operand, 0);
---
> operand = SUBREG_REG (operand);
3869,3872c3876,3879
< = push_reload (recog_operand[goal_alternative_matches[i]],
< recog_operand[i],
< recog_operand_loc[goal_alternative_matches[i]],
< recog_operand_loc[i],
---
> = push_reload (recog_data.operand[goal_alternative_matches[i]],
> recog_data.operand[i],
> recog_data.operand_loc[goal_alternative_matches[i]],
> recog_data.operand_loc[i],
3878c3885
<
---
>
3886,3888c3893,3895
< possible for some data (like reg_equiv_address) to be changed during
< later passes. Moreover, we loose the opportunity to get a useful
< reload_{in,out}_reg when we do these replacements. */
---
> possible for some data (like reg_equiv_address) to be changed during
> later passes. Moreover, we loose the opportunity to get a useful
> reload_{in,out}_reg when we do these replacements. */
3894c3901
< *recog_operand_loc[i] = substitution;
---
> *recog_data.operand_loc[i] = substitution;
3902c3909
< REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
---
> REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3907c3914
< retval |= (substed_operand[i] != *recog_operand_loc[i]);
---
> retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3919c3926
< for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
---
> for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3921,3922c3928,3929
< int opno = recog_dup_num[i];
< *recog_dup_loc[i] = *recog_operand_loc[opno];
---
> int opno = recog_data.dup_num[i];
> *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3924,3925c3931,3932
< push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
< insn_operand_mode[insn_code_number][opno]);
---
> push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
> insn_data[insn_code_number].operand[opno].mode);
3939,3942c3946,3949
< if (reload_reg_rtx[i] == 0
< && reload_in[i] != 0
< && GET_CODE (reload_in[i]) == REG
< && reload_out[i] == 0)
---
> if (rld[i].reg_rtx == 0
> && rld[i].in != 0
> && GET_CODE (rld[i].in) == REG
> && rld[i].out == 0)
3944,3946c3951,3953
< reload_reg_rtx[i]
< = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
< static_reload_reg_p, 0, reload_inmode[i]);
---
> rld[i].reg_rtx
> = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
> static_reload_reg_p, 0, rld[i].inmode);
3949,3950c3956,3957
< if (reload_reg_rtx[i])
< reload_in[i] = reload_reg_rtx[i];
---
> if (rld[i].reg_rtx)
> rld[i].in = rld[i].reg_rtx;
3969,3984c3976,3991
< if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
< && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
< || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
< || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
< || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
< && rtx_equal_p (reload_in[i], reload_in[j])
< && (operand_reloadnum[reload_opnum[i]] < 0
< || reload_optional[operand_reloadnum[reload_opnum[i]]])
< && (operand_reloadnum[reload_opnum[j]] < 0
< || reload_optional[operand_reloadnum[reload_opnum[j]]])
< && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
< || (goal_alternative_matches[reload_opnum[j]]
< == reload_opnum[i])))
---
> if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
> || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
> || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
> || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> && rtx_equal_p (rld[i].in, rld[j].in)
> && (operand_reloadnum[rld[i].opnum] < 0
> || rld[operand_reloadnum[rld[i].opnum]].optional)
> && (operand_reloadnum[rld[j].opnum] < 0
> || rld[operand_reloadnum[rld[j].opnum]].optional)
> && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
> || (goal_alternative_matches[rld[j].opnum]
> == rld[i].opnum)))
3990,3992c3997,3999
< if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
< reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
---
> if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3994,3995c4001,4002
< reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
< reload_in[j] = 0;
---
> rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
> rld[j].in = 0;
3999c4006
< /* Scan all the reloads and update their type.
---
> /* Scan all the reloads and update their type.
4018,4020c4025,4027
< if (reload_secondary_p[i]
< && reload_when_needed[i] == operand_type[reload_opnum[i]])
< reload_when_needed[i] = address_type[reload_opnum[i]];
---
> if (rld[i].secondary_p
> && rld[i].when_needed == operand_type[rld[i].opnum])
> rld[i].when_needed = address_type[rld[i].opnum];
4022,4027c4029,4034
< if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
< && (operand_reloadnum[reload_opnum[i]] < 0
< || reload_optional[operand_reloadnum[reload_opnum[i]]]))
---
> if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> && (operand_reloadnum[rld[i].opnum] < 0
> || rld[operand_reloadnum[rld[i].opnum]].optional))
4032,4034c4039,4041
< if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
< && reload_secondary_in_reload[i] != -1)
---
> if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
> && rld[i].secondary_in_reload != -1)
4036c4043
< int secondary_in_reload = reload_secondary_in_reload[i];
---
> int secondary_in_reload = rld[i].secondary_in_reload;
4038,4039c4045
< reload_when_needed[secondary_in_reload]
< = RELOAD_FOR_OPADDR_ADDR;
---
> rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4043,4044c4049,4050
< && reload_secondary_in_reload[secondary_in_reload] != -1)
< reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
---
> && rld[secondary_in_reload].secondary_in_reload != -1)
> rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4048,4050c4054,4056
< if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
< && reload_secondary_out_reload[i] != -1)
---
> if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> && rld[i].secondary_out_reload != -1)
4052c4058
< int secondary_out_reload = reload_secondary_out_reload[i];
---
> int secondary_out_reload = rld[i].secondary_out_reload;
4054,4055c4060
< reload_when_needed[secondary_out_reload]
< = RELOAD_FOR_OPADDR_ADDR;
---
> rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4059,4060c4064,4065
< && reload_secondary_out_reload[secondary_out_reload] != -1)
< reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
---
> && rld[secondary_out_reload].secondary_out_reload != -1)
> rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4064,4066c4069,4071
< if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
< reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
---
> if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
> rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4068c4073
< reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
---
> rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4071,4074c4076,4079
< if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
< && operand_reloadnum[reload_opnum[i]] >= 0
< && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
---
> if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
> && operand_reloadnum[rld[i].opnum] >= 0
> && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4076c4081
< reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
---
> rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4078,4079c4083,4084
< if (goal_alternative_matches[reload_opnum[i]] >= 0)
< reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
---
> if (goal_alternative_matches[rld[i].opnum] >= 0)
> rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4109c4114
< int need_change= 0;
---
> int need_change = 0;
4120c4125
< switch (reload_when_needed[i])
---
> switch (rld[i].when_needed)
4130c4135
< if (++first_inpaddr_num[reload_opnum[i]] >= 0)
---
> if (++first_inpaddr_num[rld[i].opnum] >= 0)
4132c4137
< first_inpaddr_num[reload_opnum[i]] = i;
---
> first_inpaddr_num[rld[i].opnum] = i;
4137c4142
< if (++first_outpaddr_num[reload_opnum[i]] >= 0)
---
> if (++first_outpaddr_num[rld[i].opnum] >= 0)
4139c4144
< first_outpaddr_num[reload_opnum[i]] = i;
---
> first_outpaddr_num[rld[i].opnum] = i;
4152c4157,4158
< int first_num, type;
---
> int first_num;
> enum reload_type type;
4154c4160
< switch (reload_when_needed[i])
---
> switch (rld[i].when_needed)
4161c4167
< first_num = first_inpaddr_num[reload_opnum[i]];
---
> first_num = first_inpaddr_num[rld[i].opnum];
4165c4171
< first_num = first_outpaddr_num[reload_opnum[i]];
---
> first_num = first_outpaddr_num[rld[i].opnum];
4174c4180
< reload_when_needed[i] = type;
---
> rld[i].when_needed = type;
4181,4184c4187,4190
< if (reload_when_needed[j] == type
< && (reload_secondary_p[i]
< ? reload_secondary_in_reload[j] == i
< : reg_mentioned_p (reload_in[i], reload_in[j])))
---
> if (rld[j].when_needed == type
> && (rld[i].secondary_p
> ? rld[j].secondary_in_reload == i
> : reg_mentioned_p (rld[i].in, rld[j].in)))
4186c4192
< reload_when_needed[i] = type;
---
> rld[i].when_needed = type;
4201,4204c4207,4210
< if (reload_in[i] != 0 && reload_out[i] == 0
< && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
< || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
< || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
---
> if (rld[i].in != 0 && rld[i].out == 0
> && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
> || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
> || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4206,4211c4212,4217
< if (i != j && reload_in[j] != 0 && reload_out[j] == 0
< && reload_when_needed[j] == reload_when_needed[i]
< && MATCHES (reload_in[i], reload_in[j])
< && reload_reg_class[i] == reload_reg_class[j]
< && !reload_nocombine[i] && !reload_nocombine[j]
< && reload_reg_rtx[i] == reload_reg_rtx[j])
---
> if (i != j && rld[j].in != 0 && rld[j].out == 0
> && rld[j].when_needed == rld[i].when_needed
> && MATCHES (rld[i].in, rld[j].in)
> && rld[i].class == rld[j].class
> && !rld[i].nocombine && !rld[j].nocombine
> && rld[i].reg_rtx == rld[j].reg_rtx)
4213c4219
< reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
---
> rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4215c4221
< reload_in[j] = 0;
---
> rld[j].in = 0;
4218,4220c4224,4234
< /* Set which reloads must use registers not used in any group. Start
< with those that conflict with a group and then include ones that
< conflict with ones that are already known to conflict with a group. */
---
> #ifdef HAVE_cc0
> /* If we made any reloads for addresses, see if they violate a
> "no input reloads" requirement for this insn. But loads that we
> do after the insn (such as for output addresses) are fine. */
> if (no_input_reloads)
> for (i = 0; i < n_reloads; i++)
> if (rld[i].in != 0
> && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
> && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
> abort ();
> #endif
4222c4236
< changed = 0;
---
> /* Compute reload_mode and reload_nregs. */
4225,4227c4239,4243
< enum machine_mode mode = reload_inmode[i];
< enum reg_class class = reload_reg_class[i];
< int size;
---
> rld[i].mode
> = (rld[i].inmode == VOIDmode
> || (GET_MODE_SIZE (rld[i].outmode)
> > GET_MODE_SIZE (rld[i].inmode)))
> ? rld[i].outmode : rld[i].inmode;
4229,4249c4245
< if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
< mode = reload_outmode[i];
< size = CLASS_MAX_NREGS (class, mode);
<
< if (size == 1)
< for (j = 0; j < n_reloads; j++)
< if ((CLASS_MAX_NREGS (reload_reg_class[j],
< (GET_MODE_SIZE (reload_outmode[j])
< > GET_MODE_SIZE (reload_inmode[j]))
< ? reload_outmode[j] : reload_inmode[j])
< > 1)
< && !reload_optional[j]
< && (reload_in[j] != 0 || reload_out[j] != 0
< || reload_secondary_p[j])
< && reloads_conflict (i, j)
< && reg_classes_intersect_p (class, reload_reg_class[j]))
< {
< reload_nongroup[i] = 1;
< changed = 1;
< break;
< }
---
> rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4252,4254c4248,4257
< while (changed)
< {
< changed = 0;
---
> /* Special case a simple move with an input reload and a
> destination of a hard reg, if the hard reg is ok, use it. */
> for (i = 0; i < n_reloads; i++)
> if (rld[i].when_needed == RELOAD_FOR_INPUT
> && GET_CODE (PATTERN (insn)) == SET
> && GET_CODE (SET_DEST (PATTERN (insn))) == REG
> && SET_SRC (PATTERN (insn)) == rld[i].in)
> {
> rtx dest = SET_DEST (PATTERN (insn));
> unsigned int regno = REGNO (dest);
4256,4260c4259,4263
< for (i = 0; i < n_reloads; i++)
< {
< enum machine_mode mode = reload_inmode[i];
< enum reg_class class = reload_reg_class[i];
< int size;
---
> if (regno < FIRST_PSEUDO_REGISTER
> && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
> && HARD_REGNO_MODE_OK (regno, rld[i].mode))
> rld[i].reg_rtx = dest;
> }
4262,4345d4264
< if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
< mode = reload_outmode[i];
< size = CLASS_MAX_NREGS (class, mode);
<
< if (! reload_nongroup[i] && size == 1)
< for (j = 0; j < n_reloads; j++)
< if (reload_nongroup[j]
< && reloads_conflict (i, j)
< && reg_classes_intersect_p (class, reload_reg_class[j]))
< {
< reload_nongroup[i] = 1;
< changed = 1;
< break;
< }
< }
< }
<
< #else /* no REGISTER_CONSTRAINTS */
< int noperands;
< int insn_code_number;
< int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
< register int i;
< rtx body = PATTERN (insn);
< int retval = 0;
<
< n_reloads = 0;
< n_replacements = 0;
< n_earlyclobbers = 0;
< replace_reloads = replace;
< this_insn = insn;
<
< extract_insn (insn);
<
< noperands = reload_n_operands = recog_n_operands;
<
< /* Return if the insn needs no reload processing. */
< if (noperands == 0)
< return;
<
< for (i = 0; i < noperands; i++)
< {
< register RTX_CODE code = GET_CODE (recog_operand[i]);
< int is_set_dest = GET_CODE (body) == SET && (i == 0);
<
< if (insn_code_number >= 0)
< if (insn_operand_address_p[insn_code_number][i])
< find_reloads_address (VOIDmode, NULL_PTR,
< recog_operand[i], recog_operand_loc[i],
< i, RELOAD_FOR_INPUT, ind_levels, insn);
<
< /* In these cases, we can't tell if the operand is an input
< or an output, so be conservative. In practice it won't be
< problem. */
<
< if (code == MEM)
< find_reloads_address (GET_MODE (recog_operand[i]),
< recog_operand_loc[i],
< XEXP (recog_operand[i], 0),
< &XEXP (recog_operand[i], 0),
< i, RELOAD_OTHER, ind_levels, insn);
< if (code == SUBREG)
< recog_operand[i] = *recog_operand_loc[i]
< = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
< ind_levels, is_set_dest);
< if (code == REG)
< {
< register int regno = REGNO (recog_operand[i]);
< if (reg_equiv_constant[regno] != 0 && !is_set_dest)
< recog_operand[i] = *recog_operand_loc[i]
< = reg_equiv_constant[regno];
< #if 0 /* This might screw code in reload1.c to delete prior output-reload
< that feeds this insn. */
< if (reg_equiv_mem[regno] != 0)
< recog_operand[i] = *recog_operand_loc[i]
< = reg_equiv_mem[regno];
< #endif
< }
< }
<
< /* Perhaps an output reload can be combined with another
< to reduce needs by one. */
< if (!goal_earlyclobber)
< combine_reloads ();
< #endif /* no REGISTER_CONSTRAINTS */
4357c4276
< register int c;
---
> int c;
4389c4308
< for pseudos that we have to replace with stack slots. */
---
> for pseudos that we have to replace with stack slots.
4390a4310,4312
> ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
> result of find_reloads_address. */
>
4392c4314,4315
< find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
---
> find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
> address_reloaded)
4398a4322
> int *address_reloaded;
4400c4324
< register RTX_CODE code = GET_CODE (x);
---
> RTX_CODE code = GET_CODE (x);
4402,4403c4326,4327
< register char *fmt = GET_RTX_FORMAT (code);
< register int i;
---
> const char *fmt = GET_RTX_FORMAT (code);
> int i;
4409c4333
< register int regno = REGNO (x);
---
> int regno = REGNO (x);
4413,4414c4337,4338
< /* This creates (subreg (mem...)) which would cause an unnecessary
< reload of the mem. */
---
> /* This creates (subreg (mem...)) which would cause an unnecessary
> reload of the mem. */
4428,4429c4352,4357
< if (replace_reloads && recog_operand[opnum] != x)
< emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
---
> if (replace_reloads && recog_data.operand[opnum] != x)
> /* We mark the USE with QImode so that we recognize it
> as one that can be safely deleted at the end of
> reload. */
> PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
> QImode);
4431,4432c4359,4362
< find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
< opnum, type, ind_levels, insn);
---
> i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
> opnum, type, ind_levels, insn);
> if (address_reloaded)
> *address_reloaded = i;
4440,4441c4370,4375
< find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
< opnum, type, ind_levels, insn);
---
>
> i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
> opnum, type, ind_levels, insn);
> if (address_reloaded)
> *address_reloaded = i;
>
4447c4381
< /* Check for SUBREG containing a REG that's equivalent to a constant.
---
> /* Check for SUBREG containing a REG that's equivalent to a constant.
4456c4390
< register int regno = REGNO (SUBREG_REG (x));
---
> int regno = REGNO (SUBREG_REG (x));
4470c4404
< SUBREG_WORD (x), 0,
---
> SUBREG_BYTE (x) / UNITS_PER_WORD, 0,
4495,4506c4429,4440
< {
< int shift = SUBREG_WORD (x) * BITS_PER_WORD;
< if (WORDS_BIG_ENDIAN)
< shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
< - GET_MODE_BITSIZE (GET_MODE (x))
< - shift);
< /* Here we use the knowledge that CONST_INTs have a
< HOST_WIDE_INT field. */
< if (shift >= HOST_BITS_PER_WIDE_INT)
< shift = HOST_BITS_PER_WIDE_INT - 1;
< return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
< }
---
> {
> int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
> if (WORDS_BIG_ENDIAN)
> shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
> - GET_MODE_BITSIZE (GET_MODE (x))
> - shift);
> /* Here we use the knowledge that CONST_INTs have a
> HOST_WIDE_INT field. */
> if (shift >= HOST_BITS_PER_WIDE_INT)
> shift = HOST_BITS_PER_WIDE_INT - 1;
> return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
> }
4533c4467
< && (! strict_memory_address_p (GET_MODE (x),
---
> && (! strict_memory_address_p (GET_MODE (x),
4546c4480,4481
< ind_levels, is_set_dest, insn);
---
> ind_levels, is_set_dest, insn,
> address_reloaded);
4578c4513
< if (rtx_varies_p (tem))
---
> if (rtx_varies_p (tem, 0))
4581,4582c4516,4522
< tem = gen_rtx_MEM (GET_MODE (ad), tem);
< RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
---
> tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
> tem = adjust_address_nv (tem, GET_MODE (ad), 0);
>
> /* Copy the result if it's still the same as the equivalence, to avoid
> modifying it when we do the substitution for the reload. */
> if (tem == reg_equiv_memory_loc[regno])
> tem = copy_rtx (tem);
4621c4561
< register int regno;
---
> int regno;
4633,4634c4573,4578
< if (reg_equiv_constant[regno] != 0
< && strict_memory_address_p (mode, reg_equiv_constant[regno]))
---
> /* If the register is equivalent to an invariant expression, substitute
> the invariant, and eliminate any eliminable register references. */
> tem = reg_equiv_constant[regno];
> if (tem != 0
> && (tem = eliminate_regs (tem, mode, insn))
> && strict_memory_address_p (mode, tem))
4636c4580
< *loc = ad = reg_equiv_constant[regno];
---
> *loc = ad = tem;
4648c4592
< find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
---
> find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0),
4672c4616,4621
< emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
---
> /* We mark the USE with QImode so that we
> recognize it as one that can be safely
> deleted at the end of reload. */
> PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
> insn), QImode);
>
4688c4637
< && ! regno_clobbered_p (regno, this_insn, GET_MODE (ad), 0))
---
> && ! regno_clobbered_p (regno, this_insn, mode, 0))
4692c4641
< push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
---
> push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4792,4793c4741,4742
< push_reload (tem, NULL_RTX, loc, NULL_PTR,
< BASE_REG_CLASS, GET_MODE (tem),
---
> push_reload (tem, NULL_RTX, loc, (rtx*) 0,
> MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4839c4788
< find_reloads_address_part (ad, loc, BASE_REG_CLASS,
---
> find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4848c4797
< constant out of range, or both reasons might apply.
---
> constant out of range, or both reasons might apply.
4857,4864d4805
< There is still a case when we might generate an extra reload,
< however. In certain cases eliminate_regs will return a MEM for a REG
< (see the code there for details). In those cases, memory_address_p
< applied to our address will return 0 so we will think that our offset
< must be too large. But it might indeed be valid and the only problem
< is that a MEM is present where a REG should be. This case should be
< very rare and there doesn't seem to be any way to avoid it.
<
4889,4890c4830,4832
< XEXP (XEXP (ad, 0), 1));
< find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
---
> XEXP (XEXP (ad, 0), 1));
> find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
> MODE_BASE_REG_CLASS (mode),
4897c4839
<
---
>
4914c4856,4857
< find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
---
> find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
> MODE_BASE_REG_CLASS (mode),
4921c4864
<
---
>
4949c4892
< /* If AD is in address in the constant pool, the MEM rtx may be shared.
---
> /* If AD is an address in the constant pool, the MEM rtx may be shared.
4960,4961c4903,4904
< find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
< ind_levels);
---
> find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
> Pmode, opnum, type, ind_levels);
4980,4982c4923,4925
< register RTX_CODE code = GET_CODE (ad);
< register int i;
< register char *fmt;
---
> RTX_CODE code = GET_CODE (ad);
> int i;
> const char *fmt;
4998c4941
< register int regno = REGNO (ad);
---
> int regno = REGNO (ad);
5011c4954,4958
< emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
---
> /* We mark the USE with QImode so that we recognize it
> as one that can be safely deleted at the end of
> reload. */
> PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
> QImode);
5024c4971
<
---
>
5116,5118c5063,5065
< && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
< && reg_renumber[regno] < 0
< && reg_equiv_constant[regno] != 0)
---
> && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
> && reg_renumber[regno] < 0
> && reg_equiv_constant[regno] != 0)
5145a5093,5118
> /* Update the REG_INC notes for an insn. It updates all REG_INC
> notes for the instruction which refer to REGNO the to refer
> to the reload number.
>
> INSN is the insn for which any REG_INC notes need updating.
>
> REGNO is the register number which has been reloaded.
>
> RELOADNUM is the reload number. */
>
> static void
> update_auto_inc_notes (insn, regno, reloadnum)
> rtx insn ATTRIBUTE_UNUSED;
> int regno ATTRIBUTE_UNUSED;
> int reloadnum ATTRIBUTE_UNUSED;
> {
> #ifdef AUTO_INC_DEC
> rtx link;
>
> for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
> if (REG_NOTE_KIND (link) == REG_INC
> && REGNO (XEXP (link, 0)) == regno)
> push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
> #endif
> }
> 
5167c5140
< such as vaxes and 68000's and 32000's, but other possible machines
---
> such as VAXen and 68000's and 32000's, but other possible machines
5181c5154
< register RTX_CODE code = GET_CODE (x);
---
> RTX_CODE code = GET_CODE (x);
5187,5192c5160,5165
< register rtx orig_op0 = XEXP (x, 0);
< register rtx orig_op1 = XEXP (x, 1);
< register RTX_CODE code0 = GET_CODE (orig_op0);
< register RTX_CODE code1 = GET_CODE (orig_op1);
< register rtx op0 = orig_op0;
< register rtx op1 = orig_op1;
---
> rtx orig_op0 = XEXP (x, 0);
> rtx orig_op1 = XEXP (x, 1);
> RTX_CODE code0 = GET_CODE (orig_op0);
> RTX_CODE code1 = GET_CODE (orig_op1);
> rtx op0 = orig_op0;
> rtx op1 = orig_op1;
5200c5173,5177
< REGNO (op0) + SUBREG_WORD (orig_op0));
---
> (REGNO (op0) +
> subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
> GET_MODE (SUBREG_REG (orig_op0)),
> SUBREG_BYTE (orig_op0),
> GET_MODE (orig_op0))));
5207a5185,5186
> /* ??? Why is this given op1's mode and above for
> ??? op0 SUBREGs we use word_mode? */
5209c5188,5192
< REGNO (op1) + SUBREG_WORD (orig_op1));
---
> (REGNO (op1) +
> subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
> GET_MODE (SUBREG_REG (orig_op1)),
> SUBREG_BYTE (orig_op1),
> GET_MODE (orig_op1))));
5212c5195
< if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
---
> if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5287a5271,5359
> case POST_MODIFY:
> case PRE_MODIFY:
> {
> rtx op0 = XEXP (x, 0);
> rtx op1 = XEXP (x, 1);
>
> if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
> return 0;
>
> /* Currently, we only support {PRE,POST}_MODIFY constructs
> where a base register is {inc,dec}remented by the contents
> of another register or by a constant value. Thus, these
> operands must match. */
> if (op0 != XEXP (op1, 0))
> abort ();
>
> /* Require index register (or constant). Let's just handle the
> register case in the meantime... If the target allows
> auto-modify by a constant then we could try replacing a pseudo
> register with its equivalent constant where applicable. */
> if (REG_P (XEXP (op1, 1)))
> if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
> find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
> opnum, type, ind_levels, insn);
>
> if (REG_P (XEXP (op1, 0)))
> {
> int regno = REGNO (XEXP (op1, 0));
> int reloadnum;
>
> /* A register that is incremented cannot be constant! */
> if (regno >= FIRST_PSEUDO_REGISTER
> && reg_equiv_constant[regno] != 0)
> abort ();
>
> /* Handle a register that is equivalent to a memory location
> which cannot be addressed directly. */
> if (reg_equiv_memory_loc[regno] != 0
> && (reg_equiv_address[regno] != 0
> || num_not_at_initial_offset))
> {
> rtx tem = make_memloc (XEXP (x, 0), regno);
>
> if (reg_equiv_address[regno]
> || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
> {
> /* First reload the memory location's address.
> We can't use ADDR_TYPE (type) here, because we need to
> write back the value after reading it, hence we actually
> need two registers. */
> find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
> &XEXP (tem, 0), opnum,
> RELOAD_OTHER,
> ind_levels, insn);
>
> /* Then reload the memory location into a base
> register. */
> reloadnum = push_reload (tem, tem, &XEXP (x, 0),
> &XEXP (op1, 0),
> MODE_BASE_REG_CLASS (mode),
> GET_MODE (x), GET_MODE (x), 0,
> 0, opnum, RELOAD_OTHER);
>
> update_auto_inc_notes (this_insn, regno, reloadnum);
> return 0;
> }
> }
>
> if (reg_renumber[regno] >= 0)
> regno = reg_renumber[regno];
>
> /* We require a base register here... */
> if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
> {
> reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
> &XEXP (op1, 0), &XEXP (x, 0),
> MODE_BASE_REG_CLASS (mode),
> GET_MODE (x), GET_MODE (x), 0, 0,
> opnum, RELOAD_OTHER);
>
> update_auto_inc_notes (this_insn, regno, reloadnum);
> return 0;
> }
> }
> else
> abort ();
> }
> return 0;
>
5294c5366
< register int regno = REGNO (XEXP (x, 0));
---
> int regno = REGNO (XEXP (x, 0));
5342,5344d5413
< #ifdef AUTO_INC_DEC
< register rtx link;
< #endif
5365,5366c5434,5437
< && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
< && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
---
> && ((*insn_data[icode].operand[0].predicate)
> (equiv, Pmode))
> && ((*insn_data[icode].operand[1].predicate)
> (equiv, Pmode))))
5377,5380c5448,5451
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
< GET_MODE (x), GET_MODE (x), 0, 0,
< opnum, RELOAD_OTHER);
<
---
> (context ? INDEX_REG_CLASS :
> MODE_BASE_REG_CLASS (mode)),
> GET_MODE (x), GET_MODE (x), 0, 0,
> opnum, RELOAD_OTHER);
5385,5386c5456,5458
< = push_reload (x, NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> = push_reload (x, NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS :
> MODE_BASE_REG_CLASS (mode)),
5389c5461
< reload_inc[reloadnum]
---
> rld[reloadnum].inc
5391c5463
<
---
>
5395,5403c5467,5468
< #ifdef AUTO_INC_DEC
< /* Update the REG_INC notes. */
<
< for (link = REG_NOTES (this_insn);
< link; link = XEXP (link, 1))
< if (REG_NOTE_KIND (link) == REG_INC
< && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
< push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
< #endif
---
> update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
> reloadnum);
5414c5479
< /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
---
> /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5416c5481
< register rtx link;
---
> rtx link;
5432,5433c5497,5499
< reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS :
> MODE_BASE_REG_CLASS (mode)),
5435c5501
< reload_inc[reloadnum]
---
> rld[reloadnum].inc
5461,5462c5527,5528
< push_reload (*loc, NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5468c5534
< register int regno = REGNO (x);
---
> int regno = REGNO (x);
5473c5539,5540
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> (context ? INDEX_REG_CLASS :
> MODE_BASE_REG_CLASS (mode)),
5482,5483c5549,5551
< push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS :
> MODE_BASE_REG_CLASS (mode)),
5510,5511c5578,5579
< push_reload (x, NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> push_reload (x, NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5522,5523c5590,5591
< push_reload (x, NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> push_reload (x, NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5538c5606
< int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
---
> int regno = subreg_regno (x);
5543,5544c5611,5613
< push_reload (x, NULL_RTX, loc, NULL_PTR,
< (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
---
> push_reload (x, NULL_RTX, loc, (rtx*) 0,
> (context ? INDEX_REG_CLASS :
> MODE_BASE_REG_CLASS (mode)),
5554c5623
< : BASE_REG_CLASS);
---
> : MODE_BASE_REG_CLASS (mode));
5560c5629
< push_reload (x, NULL_RTX, loc, NULL_PTR, class,
---
> push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5567c5636
<
---
>
5573,5574c5642,5643
< register char *fmt = GET_RTX_FORMAT (code);
< register int i;
---
> const char *fmt = GET_RTX_FORMAT (code);
> int i;
5618,5629c5687
< /* If this is a CONST_INT, it could have been created by a
< plus_constant call in eliminate_regs, which means it may be
< on the reload_obstack. reload_obstack will be freed later, so
< we can't allow such RTL to be put in the constant pool. There
< is code in force_const_mem to check for this case, but it doesn't
< work because we have already popped off the reload_obstack, so
< rtl_obstack == saveable_obstack is true at this point. */
< if (GET_CODE (x) == CONST_INT)
< tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
< else
< tem = x = force_const_mem (mode, x);
<
---
> tem = x = force_const_mem (mode, x);
5641,5646c5699
< /* See comment above. */
< if (GET_CODE (XEXP (x, 1)) == CONST_INT)
< tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
< else
< tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
<
---
> tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5652c5705
< push_reload (x, NULL_RTX, loc, NULL_PTR, class,
---
> push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5708c5761,5763
< int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
---
> int offset = SUBREG_BYTE (x);
> unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
> unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5710c5765,5771
< if (BYTES_BIG_ENDIAN)
---
> XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
> PUT_MODE (tem, GET_MODE (x));
>
> /* If this was a paradoxical subreg that we replaced, the
> resulting memory must be sufficiently aligned to allow
> us to widen the mode of the memory. */
> if (outer_size > inner_size && STRICT_ALIGNMENT)
5712c5773
< int size;
---
> rtx base;
5714,5717c5775,5786
< size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
< offset += MIN (size, UNITS_PER_WORD);
< size = GET_MODE_SIZE (GET_MODE (x));
< offset -= MIN (size, UNITS_PER_WORD);
---
> base = XEXP (tem, 0);
> if (GET_CODE (base) == PLUS)
> {
> if (GET_CODE (XEXP (base, 1)) == CONST_INT
> && INTVAL (XEXP (base, 1)) % outer_size != 0)
> return x;
> base = XEXP (base, 0);
> }
> if (GET_CODE (base) != REG
> || (REGNO_POINTER_ALIGN (REGNO (base))
> < outer_size * BITS_PER_UNIT))
> return x;
5719,5720c5788
< XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
< PUT_MODE (tem, GET_MODE (x));
---
>
5723a5792
>
5727,5728c5796,5802
< if (replace_reloads && recog_operand[opnum] != x)
< emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
---
> if (replace_reloads && recog_data.operand[opnum] != x)
> /* We mark the USE with QImode so that we recognize it
> as one that can be safely deleted at the end of
> reload. */
> PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
> SUBREG_REG (x)),
> insn), QImode);
5738c5812
< says contains the locations of all pointers that must be changed
---
> contains the locations of all pointers that must be changed
5744c5818,5819
< subst_reloads ()
---
> subst_reloads (insn)
> rtx insn;
5746c5821
< register int i;
---
> int i;
5750,5751c5825,5826
< register struct replacement *r = &replacements[i];
< register rtx reloadreg = reload_reg_rtx[r->what];
---
> struct replacement *r = &replacements[i];
> rtx reloadreg = rld[r->what].reg_rtx;
5753a5829,5863
> #ifdef ENABLE_CHECKING
> /* Internal consistency test. Check that we don't modify
> anything in the equivalence arrays. Whenever something from
> those arrays needs to be reloaded, it must be unshared before
> being substituted into; the equivalence must not be modified.
> Otherwise, if the equivalence is used after that, it will
> have been modified, and the thing substituted (probably a
> register) is likely overwritten and not a usable equivalence. */
> int check_regno;
>
> for (check_regno = 0; check_regno < max_regno; check_regno++)
> {
> #define CHECK_MODF(ARRAY) \
> if (ARRAY[check_regno] \
> && loc_mentioned_in_p (r->where, \
> ARRAY[check_regno])) \
> abort ()
>
> CHECK_MODF (reg_equiv_constant);
> CHECK_MODF (reg_equiv_memory_loc);
> CHECK_MODF (reg_equiv_address);
> CHECK_MODF (reg_equiv_mem);
> #undef CHECK_MODF
> }
> #endif /* ENABLE_CHECKING */
>
> /* If we're replacing a LABEL_REF with a register, add a
> REG_LABEL note to indicate to flow which label this
> register refers to. */
> if (GET_CODE (*r->where) == LABEL_REF
> && GET_CODE (insn) == JUMP_INSN)
> REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
> XEXP (*r->where, 0),
> REG_NOTES (insn));
>
5771a5882,5891
> int final_offset =
> SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
>
> /* When working with SUBREGs the rule is that the byte
> offset must be a multiple of the SUBREG's mode. */
> final_offset = (final_offset /
> GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
> final_offset = (final_offset *
> GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
>
5773c5893
< SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
---
> SUBREG_BYTE (*r->subreg_loc) = final_offset;
5780c5900
< else if (! reload_optional[r->what])
---
> else if (! rld[r->what].optional)
5796c5916
< char *fmt = GET_RTX_FORMAT (code);
---
> const char *fmt = GET_RTX_FORMAT (code);
5857c5977
< rtx reloadreg = reload_reg_rtx[r->what];
---
> rtx reloadreg = rld[r->what].reg_rtx;
5874c5994,5998
< REGNO (reloadreg) + SUBREG_WORD (*loc));
---
> (REGNO (reloadreg) +
> subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
> GET_MODE (SUBREG_REG (*loc)),
> SUBREG_BYTE (*loc),
> GET_MODE (*loc))));
5878,5879c6002,6011
< return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
< SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
---
> {
> int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
>
> /* When working with SUBREGs the rule is that the byte
> offset must be a multiple of the SUBREG's mode. */
> final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
> final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
> return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
> final_offset);
> }
5910c6042
< int regno, endregno;
---
> unsigned int regno, endregno;
5914,5916c6046,6049
< register int i;
< register RTX_CODE code;
< register char *fmt;
---
> int i;
> unsigned int r;
> RTX_CODE code;
> const char *fmt;
5927c6060
< i = REGNO (x);
---
> r = REGNO (x);
5931c6064
< if (i >= FIRST_PSEUDO_REGISTER)
---
> if (r >= FIRST_PSEUDO_REGISTER)
5933c6066
< if (reg_equiv_memory_loc[i])
---
> if (reg_equiv_memory_loc[r])
5935,5936c6068,6069
< reg_equiv_memory_loc[i],
< NULL_PTR);
---
> reg_equiv_memory_loc[r],
> (rtx*) 0);
5938c6071
< if (reg_equiv_constant[i])
---
> if (reg_equiv_constant[r])
5944,5946c6077,6079
< return (endregno > i
< && regno < i + (i < FIRST_PSEUDO_REGISTER
< ? HARD_REGNO_NREGS (i, GET_MODE (x))
---
> return (endregno > r
> && regno < r + (r < FIRST_PSEUDO_REGISTER
> ? HARD_REGNO_NREGS (r, GET_MODE (x))
5955,5956c6088,6089
< int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
< int inner_endregno
---
> unsigned int inner_regno = subreg_regno (x);
> unsigned int inner_endregno
5989c6122
<
---
>
6013,6014c6146,6147
< register int j;
< for (j = XVECLEN (x, i) - 1; j >=0; j--)
---
> int j;
> for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6028c6161
< conflict because we expect this to be a rare case.
---
> conflict because we expect this to be a rare case.
6030c6163
< This function is similar to reg_overlap_mention_p in rtlanal.c except
---
> This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6040c6173,6174
< if (GET_CODE (x) == STRICT_LOW_PART)
---
> if (GET_CODE (x) == STRICT_LOW_PART
> || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6050c6184,6187
< regno += SUBREG_WORD (x);
---
> regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
> GET_MODE (SUBREG_REG (x)),
> SUBREG_BYTE (x),
> GET_MODE (x));
6072a6210,6212
> else if (GET_CODE (x) == PLUS)
> return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
> || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6079c6219
< return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
---
> return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6089c6229
< char *fmt;
---
> const char *fmt;
6098c6238
<
---
>
6105c6245
<
---
>
6138c6278
< register rtx goal;
---
> rtx goal;
6141c6281
< register int other;
---
> int other;
6146c6286
< register rtx p = insn;
---
> rtx p = insn;
6148,6149c6288,6289
< register rtx pat;
< register int regno = -1;
---
> rtx pat;
> int regno = -1;
6175a6316,6317
> case POST_MODIFY:
> case PRE_MODIFY:
6195,6203d6336
< /* On some machines, certain regs must always be rejected
< because they don't behave the way ordinary registers do. */
<
< #ifdef OVERLAPPING_REGNO_P
< if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
< && OVERLAPPING_REGNO_P (regno))
< return 0;
< #endif
<
6212a6346
>
6217,6223c6351,6358
< /* ... then ignore insns introduced by reload; they aren't useful
< and can cause results in reload_as_needed to be different
< from what they were when calculating the need for spills.
< If we notice an input-reload insn here, we will reject it below,
< but it might hide a usable equivalent. That makes bad code.
< It may even abort: perhaps no reg was spilled for this insn
< because it was assumed we would find that equivalent. */
---
> /* ... then ignore insns introduced by reload; they aren't
> useful and can cause results in reload_as_needed to be
> different from what they were when calculating the need for
> spills. If we notice an input-reload insn here, we will
> reject it below, but it might hide a usable equivalent.
> That makes bad code. It may even abort: perhaps no reg was
> spilled for this insn because it was assumed we would find
> that equivalent. */
6227a6363
>
6252,6262c6388,6399
< || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
< NULL_RTX))
< && rtx_equal_p (XEXP (tem, 0), goal)
< && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
< || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
< NULL_RTX))
< && GET_CODE (SET_DEST (pat)) == REG
< && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
< && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
< && GET_CODE (goal) == CONST_INT
< && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
---
> || (goal_const && REG_NOTES (p) != 0
> && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
> && ((rtx_equal_p (XEXP (tem, 0), goal)
> && (valueno
> = true_regnum (valtry = SET_DEST (pat))) >= 0)
> || (GET_CODE (SET_DEST (pat)) == REG
> && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
> && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
> == MODE_FLOAT)
> && GET_CODE (goal) == CONST_INT
> && 0 != (goaltry
> = operand_subword (XEXP (tem, 0), 0, 0,
6264,6267c6401,6405
< && rtx_equal_p (goal, goaltry)
< && (valtry = operand_subword (SET_DEST (pat), 0, 0,
< VOIDmode))
< && (valueno = true_regnum (valtry)) >= 0)
---
> && rtx_equal_p (goal, goaltry)
> && (valtry
> = operand_subword (SET_DEST (pat), 0, 0,
> VOIDmode))
> && (valueno = true_regnum (valtry)) >= 0)))
6272c6410,6411
< && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
---
> && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
> == MODE_FLOAT)
6314c6453
< if (find_reg_note (where, REG_UNUSED, value))
---
> if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6335c6474
< goal, NULL_PTR))
---
> goal, (rtx*) 0))
6341,6342c6480,6481
< && regno + HARD_REGNO_NREGS (regno, mode) > valueno
< && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
---
> && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
> && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6362,6369d6500
< /* On some machines, certain regs must always be rejected
< because they don't behave the way ordinary registers do. */
<
< #ifdef OVERLAPPING_REGNO_P
< if (OVERLAPPING_REGNO_P (valueno))
< return 0;
< #endif
<
6377c6508
< if (reload_reg_rtx[i] != 0 && reload_in[i])
---
> if (rld[i].reg_rtx != 0 && rld[i].in)
6379c6510
< int regno1 = REGNO (reload_reg_rtx[i]);
---
> int regno1 = REGNO (rld[i].reg_rtx);
6381c6512
< GET_MODE (reload_reg_rtx[i]));
---
> GET_MODE (rld[i].reg_rtx));
6420a6552,6555
> #ifdef NON_SAVING_SETJMP
> if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
> return 0;
> #endif
6423,6437c6558
< #ifdef NON_SAVING_SETJMP
< if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
< && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
< return 0;
< #endif
<
< #ifdef INSN_CLOBBERS_REGNO_P
< if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
< && INSN_CLOBBERS_REGNO_P (p, valueno))
< || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
< && INSN_CLOBBERS_REGNO_P (p, regno)))
< return 0;
< #endif
<
< if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
---
> if (INSN_P (p))
6441,6442c6562,6563
< /* Watch out for unspec_volatile, and volatile asms. */
< if (volatile_insn_p (pat))
---
> /* Watch out for unspec_volatile, and volatile asms. */
> if (volatile_insn_p (pat))
6449a6571,6572
> if (GET_CODE (pat) == COND_EXEC)
> pat = COND_EXEC_CODE (pat);
6452c6575
< register rtx dest = SET_DEST (pat);
---
> rtx dest = SET_DEST (pat);
6460c6583
< register int xregno = REGNO (dest);
---
> int xregno = REGNO (dest);
6488c6611
< register int i;
---
> int i;
6491c6614,6616
< register rtx v1 = XVECEXP (pat, 0, i);
---
> rtx v1 = XVECEXP (pat, 0, i);
> if (GET_CODE (v1) == COND_EXEC)
> v1 = COND_EXEC_CODE (v1);
6494c6619
< register rtx dest = SET_DEST (v1);
---
> rtx dest = SET_DEST (v1);
6502c6627
< register int xregno = REGNO (dest);
---
> int xregno = REGNO (dest);
6544,6549c6669,6670
< register rtx dest = SET_DEST (pat);
< while (GET_CODE (dest) == SUBREG
< || GET_CODE (dest) == ZERO_EXTRACT
< || GET_CODE (dest) == SIGN_EXTRACT
< || GET_CODE (dest) == STRICT_LOW_PART)
< dest = XEXP (dest, 0);
---
> rtx dest = SET_DEST (pat);
>
6552,6557c6673,6676
< register int xregno = REGNO (dest);
< int xnregs;
< if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
< xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
< else
< xnregs = 1;
---
> int xregno = REGNO (dest);
> int xnregs
> = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
>
6561,6562c6680,6681
< if (xregno < valueno + valuenregs
< && xregno + xnregs > valueno)
---
> else if (xregno < valueno + valuenregs
> && xregno + xnregs > valueno)
6564,6565c6683,6684
< if (goal_mem_addr_varies
< && reg_overlap_mentioned_for_reload_p (dest,
---
> else if (goal_mem_addr_varies
> && reg_overlap_mentioned_for_reload_p (dest,
6568a6688
>
6585c6705
< register rtx link;
---
> rtx link;
6591c6711
< register int incno = REGNO (XEXP (link, 0));
---
> int incno = REGNO (XEXP (link, 0));
6615,6617c6735,6737
< register enum rtx_code code = GET_CODE (x);
< register char *fmt;
< register int i;
---
> enum rtx_code code = GET_CODE (x);
> const char *fmt;
> int i;
6621c6741
< register rtx addr = XEXP (x, 0);
---
> rtx addr = XEXP (x, 0);
6627a6748,6757
> else if ((GET_CODE (addr) == PRE_MODIFY
> || GET_CODE (addr) == POST_MODIFY)
> && GET_CODE (XEXP (addr, 1)) == PLUS
> && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
> && XEXP (addr, 0) == inced
> && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
> {
> i = INTVAL (XEXP (XEXP (addr, 1), 1));
> return i < 0 ? -i : i;
> }
6635c6765
< register int tem = find_inc_amount (XEXP (x, i), inced);
---
> int tem = find_inc_amount (XEXP (x, i), inced);
6641c6771
< register int j;
---
> int j;
6644c6774
< register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
---
> int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6654c6784,6785
< /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
---
> /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
> If SETS is nonzero, also consider SETs. */
6658c6789
< int regno;
---
> unsigned int regno;
6663,6664c6794,6795
< int nregs = HARD_REGNO_NREGS (regno, mode);
< int endregno = regno + nregs;
---
> unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
> unsigned int endregno = regno + nregs;
6670c6801
< int test = REGNO (XEXP (PATTERN (insn), 0));
---
> unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6686c6817
< int test = REGNO (XEXP (elt, 0));
---
> unsigned int test = REGNO (XEXP (elt, 0));
6697c6828
< static char *reload_when_needed_name[] =
---
> static const char *const reload_when_needed_name[] =
6699,6700c6830,6831
< "RELOAD_FOR_INPUT",
< "RELOAD_FOR_OUTPUT",
---
> "RELOAD_FOR_INPUT",
> "RELOAD_FOR_OUTPUT",
6706c6837
< "RELOAD_FOR_OPERAND_ADDRESS",
---
> "RELOAD_FOR_OPERAND_ADDRESS",
6708c6839
< "RELOAD_OTHER",
---
> "RELOAD_OTHER",
6712c6843
< static char *reg_class_names[] = REG_CLASS_NAMES;
---
> static const char * const reg_class_names[] = REG_CLASS_NAMES;
6721c6852
< char *prefix;
---
> const char *prefix;
6729c6860
< if (reload_in[r] != 0)
---
> if (rld[r].in != 0)
6732,6733c6863,6864
< GET_MODE_NAME (reload_inmode[r]));
< print_inline_rtx (f, reload_in[r], 24);
---
> GET_MODE_NAME (rld[r].inmode));
> print_inline_rtx (f, rld[r].in, 24);
6737c6868
< if (reload_out[r] != 0)
---
> if (rld[r].out != 0)
6740,6741c6871,6872
< GET_MODE_NAME (reload_outmode[r]));
< print_inline_rtx (f, reload_out[r], 24);
---
> GET_MODE_NAME (rld[r].outmode));
> print_inline_rtx (f, rld[r].out, 24);
6745c6876
< fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
---
> fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6748,6749c6879,6880
< reload_when_needed_name[(int) reload_when_needed[r]],
< reload_opnum[r]);
---
> reload_when_needed_name[(int) rld[r].when_needed],
> rld[r].opnum);
6751c6882
< if (reload_optional[r])
---
> if (rld[r].optional)
6754,6755c6885,6886
< if (reload_nongroup[r])
< fprintf (stderr, ", nongroup");
---
> if (rld[r].nongroup)
> fprintf (f, ", nongroup");
6757,6758c6888,6889
< if (reload_inc[r] != 0)
< fprintf (f, ", inc by %d", reload_inc[r]);
---
> if (rld[r].inc != 0)
> fprintf (f, ", inc by %d", rld[r].inc);
6760c6891
< if (reload_nocombine[r])
---
> if (rld[r].nocombine)
6763c6894
< if (reload_secondary_p[r])
---
> if (rld[r].secondary_p)
6766c6897
< if (reload_in_reg[r] != 0)
---
> if (rld[r].in_reg != 0)
6769c6900
< print_inline_rtx (f, reload_in_reg[r], 24);
---
> print_inline_rtx (f, rld[r].in_reg, 24);
6772c6903
< if (reload_out_reg[r] != 0)
---
> if (rld[r].out_reg != 0)
6775c6906
< print_inline_rtx (f, reload_out_reg[r], 24);
---
> print_inline_rtx (f, rld[r].out_reg, 24);
6778c6909
< if (reload_reg_rtx[r] != 0)
---
> if (rld[r].reg_rtx != 0)
6781c6912
< print_inline_rtx (f, reload_reg_rtx[r], 24);
---
> print_inline_rtx (f, rld[r].reg_rtx, 24);
6785c6916
< if (reload_secondary_in_reload[r] != -1)
---
> if (rld[r].secondary_in_reload != -1)
6788c6919
< prefix, reload_secondary_in_reload[r]);
---
> prefix, rld[r].secondary_in_reload);
6792c6923
< if (reload_secondary_out_reload[r] != -1)
---
> if (rld[r].secondary_out_reload != -1)
6794c6925
< prefix, reload_secondary_out_reload[r]);
---
> prefix, rld[r].secondary_out_reload);
6797c6928
< if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
---
> if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6799,6800c6930,6931
< fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
< insn_name[reload_secondary_in_icode[r]]);
---
> fprintf (f, "%ssecondary_in_icode = %s", prefix,
> insn_data[rld[r].secondary_in_icode].name);
6804,6806c6935,6937
< if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
< fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
< insn_name[reload_secondary_out_icode[r]]);
---
> if (rld[r].secondary_out_icode != CODE_FOR_nothing)
> fprintf (f, "%ssecondary_out_icode = %s", prefix,
> insn_data[rld[r].secondary_out_icode].name);