1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22/* $FreeBSD: head/contrib/gcc/reload.c 72564 2001-02-17 08:35:00Z obrien $ */
23
24
25/* This file contains subroutines used only from the file reload1.c.
26 It knows how to scan one insn for operands and values
27 that need to be copied into registers to make valid code.
28 It also finds other operands and values which are valid
29 but for which equivalent values in registers exist and
30 ought to be used instead.
31
32 Before processing the first insn of the function, call `init_reload'.

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68
69 2. Pseudo-registers that are equivalent to constants are replaced
70 with those constants if they are not in hard registers.
71
721 happens every time find_reloads is called.
732 happens only when REPLACE is 1, which is only when
74actually doing the reloads, not when just counting them.
75
76
77Using a reload register for several reloads in one insn:
78
79When an insn has reloads, it is considered as having three parts:
80the input reloads, the insn itself after reloading, and the output reloads.
81Reloads of values used in memory addresses are often needed for only one part.
82
83When this is so, reload_when_needed records which part needs the reload.
84Two reloads for different parts of the insn can share the same reload
85register.
86
87When a reload is used for addresses in multiple parts, or when it is
88an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
89a register with any other reload. */
90
91#define REG_OK_STRICT
92
93#include "config.h"
94#include "system.h"
95#include "rtl.h"
96#include "insn-config.h"
97#include "insn-codes.h"
98#include "recog.h"
99#include "reload.h"
100#include "regs.h"
101#include "hard-reg-set.h"
102#include "flags.h"
103#include "real.h"
104#include "output.h"
105#include "expr.h"
106#include "toplev.h"
107
108#ifndef REGISTER_MOVE_COST
109#define REGISTER_MOVE_COST(x, y) 2
110#endif
111
112#ifndef REGNO_MODE_OK_FOR_BASE_P
113#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114#endif
115
116#ifndef REG_MODE_OK_FOR_BASE_P
117#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118#endif
119
120/* The variables set up by `find_reloads' are:
121
122 n_reloads number of distinct reloads needed; max reload # + 1
123 tables indexed by reload number
124 reload_in rtx for value to reload from
125 reload_out rtx for where to store reload-reg afterward if nec
126 (often the same as reload_in)
127 reload_reg_class enum reg_class, saying what regs to reload into
128 reload_inmode enum machine_mode; mode this operand should have
129 when reloaded, on input.
130 reload_outmode enum machine_mode; mode this operand should have
131 when reloaded, on output.
132 reload_optional char, nonzero for an optional reload.
133 Optional reloads are ignored unless the
134 value is already sitting in a register.
135 reload_nongroup char, nonzero when a reload must use a register
136 not already allocated to a group.
137 reload_inc int, positive amount to increment or decrement by if
138 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
139 Ignored otherwise (don't assume it is zero).
140 reload_in_reg rtx. A reg for which reload_in is the equivalent.
141 If reload_in is a symbol_ref which came from
142 reg_equiv_constant, then this is the pseudo
143 which has that symbol_ref as equivalent.
144 reload_reg_rtx rtx. This is the register to reload into.
145 If it is zero when `find_reloads' returns,
146 you must find a suitable register in the class
147 specified by reload_reg_class, and store here
148 an rtx for that register with mode from
149 reload_inmode or reload_outmode.
150 reload_nocombine char, nonzero if this reload shouldn't be
151 combined with another reload.
152 reload_opnum int, operand number being reloaded. This is
153 used to group related reloads and need not always
154 be equal to the actual operand number in the insn,
155 though it current will be; for in-out operands, it
156 is one of the two operand numbers.
157 reload_when_needed enum, classifies reload as needed either for
158 addressing an input reload, addressing an output,
159 for addressing a non-reloaded mem ref,
160 or for unspecified purposes (i.e., more than one
161 of the above).
162 reload_secondary_p int, 1 if this is a secondary register for one
163 or more reloads.
164 reload_secondary_in_reload
165 reload_secondary_out_reload
166 int, gives the reload number of a secondary
167 reload, when needed; otherwise -1
168 reload_secondary_in_icode
169 reload_secondary_out_icode
170 enum insn_code, if a secondary reload is required,
171 gives the INSN_CODE that uses the secondary
172 reload as a scratch register, or CODE_FOR_nothing
173 if the secondary reload register is to be an
174 intermediate register. */
175int n_reloads;
176
177rtx reload_in[MAX_RELOADS];
178rtx reload_out[MAX_RELOADS];
179enum reg_class reload_reg_class[MAX_RELOADS];
180enum machine_mode reload_inmode[MAX_RELOADS];
181enum machine_mode reload_outmode[MAX_RELOADS];
182rtx reload_reg_rtx[MAX_RELOADS];
183char reload_optional[MAX_RELOADS];
184char reload_nongroup[MAX_RELOADS];
185int reload_inc[MAX_RELOADS];
186rtx reload_in_reg[MAX_RELOADS];
187rtx reload_out_reg[MAX_RELOADS];
188char reload_nocombine[MAX_RELOADS];
189int reload_opnum[MAX_RELOADS];
190enum reload_type reload_when_needed[MAX_RELOADS];
191int reload_secondary_p[MAX_RELOADS];
192int reload_secondary_in_reload[MAX_RELOADS];
193int reload_secondary_out_reload[MAX_RELOADS];
194enum insn_code reload_secondary_in_icode[MAX_RELOADS];
195enum insn_code reload_secondary_out_icode[MAX_RELOADS];
196
197/* All the "earlyclobber" operands of the current insn
198 are recorded here. */
199int n_earlyclobbers;
200rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
201
202int reload_n_operands;
203
204/* Replacing reloads.

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234 rtx base; /* Base address for MEM. */
235 HOST_WIDE_INT start; /* Starting offset or register number. */
236 HOST_WIDE_INT end; /* Ending offset or register number. */
237};
238
239#ifdef SECONDARY_MEMORY_NEEDED
240
241/* Save MEMs needed to copy from one class of registers to another. One MEM
242 is used per mode, but normally only one or two modes are ever used.
243
244 We keep two versions, before and after register elimination. The one
245 after register elimination is record separately for each operand. This
246 is done in case the address is not valid to be sure that we separately
247 reload each. */
248
249static rtx secondary_memlocs[NUM_MACHINE_MODES];
250static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
251#endif
252

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305#define ADDR_TYPE(type) \
306 ((type) == RELOAD_FOR_INPUT_ADDRESS \
307 ? RELOAD_FOR_INPADDR_ADDRESS \
308 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
309 ? RELOAD_FOR_OUTADDR_ADDRESS \
310 : (type)))
311
312#ifdef HAVE_SECONDARY_RELOADS
313static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
314 enum machine_mode, enum reload_type,
315 enum insn_code *));
316#endif
317static enum reg_class find_valid_class PROTO((enum machine_mode, int));
318static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
319 enum machine_mode, enum machine_mode,
320 int, int, int, enum reload_type));
321static void push_replacement PROTO((rtx *, int, enum machine_mode));
322static void combine_reloads PROTO((void));
323static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
324 enum reload_type, int, int));
325static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
326 enum machine_mode, enum machine_mode,
327 enum reg_class, int, int));
328static int hard_reg_set_here_p PROTO((int, int, rtx));
329static struct decomposition decompose PROTO((rtx));
330static int immune_p PROTO((rtx, rtx, struct decomposition));
331static int alternative_allows_memconst PROTO((const char *, int));
332static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
333static rtx make_memloc PROTO((rtx, int));
334static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
335 int, enum reload_type, int, rtx));
336static rtx subst_reg_equivs PROTO((rtx, rtx));
337static rtx subst_indexed_address PROTO((rtx));
338static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
339 int, enum reload_type,int, rtx));
340static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
341 enum machine_mode, int,
342 enum reload_type, int));
343static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
344 int, rtx));
345static int find_inc_amount PROTO((rtx, rtx));
346static int loc_mentioned_in_p PROTO((rtx *, rtx));
347
348#ifdef HAVE_SECONDARY_RELOADS
349
350/* Determine if any secondary reloads are needed for loading (if IN_P is
351 non-zero) or storing (if IN_P is zero) X to or from a reload register of
352 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
353 are needed, push them.
354

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423
424 /* Get a possible insn to use. If the predicate doesn't accept X, don't
425 use the insn. */
426
427 icode = (in_p ? reload_in_optab[(int) reload_mode]
428 : reload_out_optab[(int) reload_mode]);
429
430 if (icode != CODE_FOR_nothing
431 && insn_operand_predicate[(int) icode][in_p]
432 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
433 icode = CODE_FOR_nothing;
434
435 /* If we will be using an insn, see if it can directly handle the reload
436 register we will be using. If it can, the secondary reload is for a
437 scratch register. If it can't, we will use the secondary reload for
438 an intermediate register and require a tertiary reload for the scratch
439 register. */
440
441 if (icode != CODE_FOR_nothing)
442 {
443 /* If IN_P is non-zero, the reload register will be the output in
444 operand 0. If IN_P is zero, the reload register will be the input
445 in operand 1. Outputs should have an initial "=", which we must
446 skip. */
447
448 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
449 enum reg_class insn_class
450 = (insn_letter == 'r' ? GENERAL_REGS
451 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
452
453 if (insn_class == NO_REGS
454 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
455 /* The scratch register's constraint must start with "=&". */
456 || insn_operand_constraint[(int) icode][2][0] != '='
457 || insn_operand_constraint[(int) icode][2][1] != '&')
458 abort ();
459
460 if (reg_class_subset_p (reload_class, insn_class))
461 mode = insn_operand_mode[(int) icode][2];
462 else
463 {
464 char t_letter = insn_operand_constraint[(int) icode][2][2];
465 class = insn_class;
466 t_mode = insn_operand_mode[(int) icode][2];
467 t_class = (t_letter == 'r' ? GENERAL_REGS
468 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
469 t_icode = icode;
470 icode = CODE_FOR_nothing;
471 }
472 }
473
474 /* This case isn't valid, so fail. Reload is allowed to use the same
475 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
476 in the case of a secondary register, we actually need two different
477 registers for correct code. We fail here to prevent the possibility of
478 silently generating incorrect code later.
479
480 The convention is that secondary input reloads are valid only if the
481 secondary_class is different from class. If you have such a case, you
482 can not use secondary reloads, you must work around the problem some
483 other way.
484
485 Allow this when MODE is not reload_mode and assume that the generated
486 code handles this case (it does on the Alpha, which is the only place
487 this currently happens). */
488
489 if (in_p && class == reload_class && mode == reload_mode)
490 abort ();
491
492 /* If we need a tertiary reload, see if we have one we can reuse or else
493 make a new one. */
494
495 if (t_class != NO_REGS)
496 {
497 for (t_reload = 0; t_reload < n_reloads; t_reload++)
498 if (reload_secondary_p[t_reload]
499 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
500 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
501 && ((in_p && reload_inmode[t_reload] == t_mode)
502 || (! in_p && reload_outmode[t_reload] == t_mode))
503 && ((in_p && (reload_secondary_in_icode[t_reload]
504 == CODE_FOR_nothing))
505 || (! in_p &&(reload_secondary_out_icode[t_reload]
506 == CODE_FOR_nothing)))
507 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
508 && MERGABLE_RELOADS (secondary_type,
509 reload_when_needed[t_reload],
510 opnum, reload_opnum[t_reload]))
511 {
512 if (in_p)
513 reload_inmode[t_reload] = t_mode;
514 if (! in_p)
515 reload_outmode[t_reload] = t_mode;
516
517 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
518 reload_reg_class[t_reload] = t_class;
519
520 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
521 reload_optional[t_reload] &= optional;
522 reload_secondary_p[t_reload] = 1;
523 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
524 opnum, reload_opnum[t_reload]))
525 reload_when_needed[t_reload] = RELOAD_OTHER;
526 }
527
528 if (t_reload == n_reloads)
529 {
530 /* We need to make a new tertiary reload for this register class. */
531 reload_in[t_reload] = reload_out[t_reload] = 0;
532 reload_reg_class[t_reload] = t_class;
533 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
534 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
535 reload_reg_rtx[t_reload] = 0;
536 reload_optional[t_reload] = optional;
537 reload_nongroup[t_reload] = 0;
538 reload_inc[t_reload] = 0;
539 /* Maybe we could combine these, but it seems too tricky. */
540 reload_nocombine[t_reload] = 1;
541 reload_in_reg[t_reload] = 0;
542 reload_out_reg[t_reload] = 0;
543 reload_opnum[t_reload] = opnum;
544 reload_when_needed[t_reload] = secondary_type;
545 reload_secondary_in_reload[t_reload] = -1;
546 reload_secondary_out_reload[t_reload] = -1;
547 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
548 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
549 reload_secondary_p[t_reload] = 1;
550
551 n_reloads++;
552 }
553 }
554
555 /* See if we can reuse an existing secondary reload. */
556 for (s_reload = 0; s_reload < n_reloads; s_reload++)
557 if (reload_secondary_p[s_reload]
558 && (reg_class_subset_p (class, reload_reg_class[s_reload])
559 || reg_class_subset_p (reload_reg_class[s_reload], class))
560 && ((in_p && reload_inmode[s_reload] == mode)
561 || (! in_p && reload_outmode[s_reload] == mode))
562 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
563 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
564 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
565 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
566 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
567 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
568 opnum, reload_opnum[s_reload]))
569 {
570 if (in_p)
571 reload_inmode[s_reload] = mode;
572 if (! in_p)
573 reload_outmode[s_reload] = mode;
574
575 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
576 reload_reg_class[s_reload] = class;
577
578 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
579 reload_optional[s_reload] &= optional;
580 reload_secondary_p[s_reload] = 1;
581 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
582 opnum, reload_opnum[s_reload]))
583 reload_when_needed[s_reload] = RELOAD_OTHER;
584 }
585
586 if (s_reload == n_reloads)
587 {
588#ifdef SECONDARY_MEMORY_NEEDED
589 /* If we need a memory location to copy between the two reload regs,
590 set it up now. Note that we do the input case before making
591 the reload and the output case after. This is due to the
592 way reloads are output. */
593
594 if (in_p && icode == CODE_FOR_nothing
595 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
596 {
597 get_secondary_mem (x, reload_mode, opnum, type);
598
599 /* We may have just added new reloads. Make sure we add
600 the new reload at the end. */
601 s_reload = n_reloads;
602 }
603#endif
604
605 /* We need to make a new secondary reload for this register class. */
606 reload_in[s_reload] = reload_out[s_reload] = 0;
607 reload_reg_class[s_reload] = class;
608
609 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
610 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
611 reload_reg_rtx[s_reload] = 0;
612 reload_optional[s_reload] = optional;
613 reload_nongroup[s_reload] = 0;
614 reload_inc[s_reload] = 0;
615 /* Maybe we could combine these, but it seems too tricky. */
616 reload_nocombine[s_reload] = 1;
617 reload_in_reg[s_reload] = 0;
618 reload_out_reg[s_reload] = 0;
619 reload_opnum[s_reload] = opnum;
620 reload_when_needed[s_reload] = secondary_type;
621 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
622 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
623 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
624 reload_secondary_out_icode[s_reload]
625 = ! in_p ? t_icode : CODE_FOR_nothing;
626 reload_secondary_p[s_reload] = 1;
627
628 n_reloads++;
629
630#ifdef SECONDARY_MEMORY_NEEDED
631 if (! in_p && icode == CODE_FOR_nothing
632 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
633 get_secondary_mem (x, mode, opnum, type);
634#endif
635 }
636
637 *picode = icode;
638 return s_reload;
639}
640#endif /* HAVE_SECONDARY_RELOADS */
641
642#ifdef SECONDARY_MEMORY_NEEDED
643
644/* Return a memory location that will be used to copy X in mode MODE.
645 If we haven't already made a location for this mode in this insn,
646 call find_reloads_address on the location being returned. */
647
648rtx
649get_secondary_mem (x, mode, opnum, type)
650 rtx x;
651 enum machine_mode mode;
652 int opnum;
653 enum reload_type type;
654{
655 rtx loc;
656 int mem_valid;
657
658 /* By default, if MODE is narrower than a word, widen it to a word.
659 This is required because most machines that require these memory
660 locations do not support short load and stores from all registers
661 (e.g., FP registers). */
662
663#ifdef SECONDARY_MEMORY_NEEDED_MODE
664 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
665#else
666 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
667 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
668#endif
669
670 /* If we already have made a MEM for this operand in MODE, return it. */
671 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
672 return secondary_memlocs_elim[(int) mode][opnum];
673
674 /* If this is the first time we've tried to get a MEM for this mode,
675 allocate a new one. `something_changed' in reload will get set
676 by noticing that the frame size has changed. */
677
678 if (secondary_memlocs[(int) mode] == 0)
679 {
680#ifdef SECONDARY_MEMORY_NEEDED_RTX
681 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
682#else

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702 don't save it. */
703
704 if (! mem_valid)
705 {
706 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
707 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
708 : RELOAD_OTHER);
709
710 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
711 opnum, type, 0, 0);
712 }
713
714 secondary_memlocs_elim[(int) mode][opnum] = loc;
715 return loc;
716}
717
718/* Clear any secondary memory locations we've made. */
719
720void
721clear_secondary_mem ()
722{
723 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
724}
725#endif /* SECONDARY_MEMORY_NEEDED */
726
727/* Find the largest class for which every register number plus N is valid in
728 M1 (if in range). Abort if no such class exists. */
729
730static enum reg_class
731find_valid_class (m1, n)
732 enum machine_mode m1;
733 int n;
734{
735 int class;
736 int regno;
737 enum reg_class best_class;
738 int best_size = 0;
739
740 for (class = 1; class < N_REG_CLASSES; class++)
741 {
742 int bad = 0;
743 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
744 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
745 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
746 && ! HARD_REGNO_MODE_OK (regno + n, m1))

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758
759/* Return the number of a previously made reload that can be combined with
760 a new one, or n_reloads if none of the existing reloads can be used.
761 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
762 push_reload, they determine the kind of the new reload that we try to
763 combine. P_IN points to the corresponding value of IN, which can be
764 modified by this function.
765 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
766static int
767find_reusable_reload (p_in, out, class, type, opnum, dont_share)
768 rtx *p_in, out;
769 enum reg_class class;
770 enum reload_type type;
771 int opnum, dont_share;
772{
773 rtx in = *p_in;
774 int i;
775 /* We can't merge two reloads if the output of either one is
776 earlyclobbered. */
777
778 if (earlyclobber_operand_p (out))
779 return n_reloads;
780
781 /* We can use an existing reload if the class is right
782 and at least one of IN and OUT is a match
783 and the other is at worst neutral.
784 (A zero compared against anything is neutral.)
785
786 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
787 for the same thing since that can cause us to need more reload registers
788 than we otherwise would. */
789
790 for (i = 0; i < n_reloads; i++)
791 if ((reg_class_subset_p (class, reload_reg_class[i])
792 || reg_class_subset_p (reload_reg_class[i], class))
793 /* If the existing reload has a register, it must fit our class. */
794 && (reload_reg_rtx[i] == 0
795 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
796 true_regnum (reload_reg_rtx[i])))
797 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
798 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
799 ||
800 (out != 0 && MATCHES (reload_out[i], out)
801 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
802 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
803 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
804 && MERGABLE_RELOADS (type, reload_when_needed[i],
805 opnum, reload_opnum[i]))
806 return i;
807
808 /* Reloading a plain reg for input can match a reload to postincrement
809 that reg, since the postincrement's value is the right value.
810 Likewise, it can match a preincrement reload, since we regard
811 the preincrementation as happening before any ref in this insn
812 to that register. */
813 for (i = 0; i < n_reloads; i++)
814 if ((reg_class_subset_p (class, reload_reg_class[i])
815 || reg_class_subset_p (reload_reg_class[i], class))
816 /* If the existing reload has a register, it must fit our
817 class. */
818 && (reload_reg_rtx[i] == 0
819 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
820 true_regnum (reload_reg_rtx[i])))
821 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
822 && ((GET_CODE (in) == REG
823 && (GET_CODE (reload_in[i]) == POST_INC
824 || GET_CODE (reload_in[i]) == POST_DEC
825 || GET_CODE (reload_in[i]) == PRE_INC
826 || GET_CODE (reload_in[i]) == PRE_DEC)
827 && MATCHES (XEXP (reload_in[i], 0), in))
828 ||
829 (GET_CODE (reload_in[i]) == REG
830 && (GET_CODE (in) == POST_INC
831 || GET_CODE (in) == POST_DEC
832 || GET_CODE (in) == PRE_INC
833 || GET_CODE (in) == PRE_DEC)
834 && MATCHES (XEXP (in, 0), reload_in[i])))
835 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
836 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
837 && MERGABLE_RELOADS (type, reload_when_needed[i],
838 opnum, reload_opnum[i]))
839 {
840 /* Make sure reload_in ultimately has the increment,
841 not the plain register. */
842 if (GET_CODE (in) == REG)
843 *p_in = reload_in[i];
844 return i;
845 }
846 return n_reloads;
847}
848
849/* Record one reload that needs to be performed.
850 IN is an rtx saying where the data are to be found before this instruction.
851 OUT says where they must be stored after the instruction.
852 (IN is zero for data not read, and OUT is zero for data not written.)
853 INLOC and OUTLOC point to the places in the instructions where
854 IN and OUT were found.
855 If IN and OUT are both non-zero, it means the same register must be used
856 to reload both IN and OUT.

--- 17 unchanged lines hidden (view full) ---

874 If both IN and OUT are nonzero, in some rare cases we might
875 want to make two separate reloads. (Actually we never do this now.)
876 Therefore, the reload-number for OUT is stored in
877 output_reloadnum when we return; the return value applies to IN.
878 Usually (presently always), when IN and OUT are nonzero,
879 the two reload-numbers are equal, but the caller should be careful to
880 distinguish them. */
881
882static int
883push_reload (in, out, inloc, outloc, class,
884 inmode, outmode, strict_low, optional, opnum, type)
885 rtx in, out;
886 rtx *inloc, *outloc;
887 enum reg_class class;
888 enum machine_mode inmode, outmode;
889 int strict_low;
890 int optional;
891 int opnum;
892 enum reload_type type;
893{
894 register int i;
895 int dont_share = 0;
896 int dont_remove_subreg = 0;
897 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
898 int secondary_in_reload = -1, secondary_out_reload = -1;
899 enum insn_code secondary_in_icode = CODE_FOR_nothing;
900 enum insn_code secondary_out_icode = CODE_FOR_nothing;
901
902 /* INMODE and/or OUTMODE could be VOIDmode if no mode
903 has been specified for the operand. In that case,
904 use the operand's mode as the mode to reload. */
905 if (inmode == VOIDmode && in != 0)
906 inmode = GET_MODE (in);
907 if (outmode == VOIDmode && out != 0)
908 outmode = GET_MODE (out);
909
910 /* If IN is a pseudo register everywhere-equivalent to a constant, and
911 it is not in a hard register, reload straight from the constant,
912 since we want to get rid of such pseudo registers.
913 Often this is done earlier, but not always in find_reloads_address. */
914 if (in != 0 && GET_CODE (in) == REG)
915 {
916 register int regno = REGNO (in);
917
918 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
919 && reg_equiv_constant[regno] != 0)
920 in = reg_equiv_constant[regno];
921 }
922
923 /* Likewise for OUT. Of course, OUT will never be equivalent to
924 an actual constant, but it might be equivalent to a memory location
925 (in the case of a parameter). */
926 if (out != 0 && GET_CODE (out) == REG)
927 {
928 register int regno = REGNO (out);
929
930 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
931 && reg_equiv_constant[regno] != 0)
932 out = reg_equiv_constant[regno];
933 }
934
935 /* If we have a read-write operand with an address side-effect,
936 change either IN or OUT so the side-effect happens only once. */
937 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
938 {
939 if (GET_CODE (XEXP (in, 0)) == POST_INC
940 || GET_CODE (XEXP (in, 0)) == POST_DEC)
941 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
942 if (GET_CODE (XEXP (in, 0)) == PRE_INC
943 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
944 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
945 }
946
947 /* If we are reloading a (SUBREG constant ...), really reload just the
948 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
949 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
950 a pseudo and hence will become a MEM) with M1 wider than M2 and the
951 register is a pseudo, also reload the inside expression.
952 For machines that extend byte loads, do this for any SUBREG of a pseudo
953 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
954 M2 is an integral mode that gets extended when loaded.

--- 9 unchanged lines hidden (view full) ---

964 Similarly, we must reload the inside expression if we have a
965 STRICT_LOW_PART (presumably, in == out in the cas).
966
967 Also reload the inner expression if it does not require a secondary
968 reload but the SUBREG does.
969
970 Finally, reload the inner expression if it is a register that is in
971 the class whose registers cannot be referenced in a different size
972 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
973 cannot reload just the inside since we might end up with the wrong
974 register class. But if it is inside a STRICT_LOW_PART, we have
975 no choice, so we hope we do get the right register class there. */
976
977 if (in != 0 && GET_CODE (in) == SUBREG
978 && (SUBREG_WORD (in) == 0 || strict_low)
979#ifdef CLASS_CANNOT_CHANGE_SIZE
980 && class != CLASS_CANNOT_CHANGE_SIZE
981#endif
982 && (CONSTANT_P (SUBREG_REG (in))
983 || GET_CODE (SUBREG_REG (in)) == PLUS
984 || strict_low
985 || (((GET_CODE (SUBREG_REG (in)) == REG
986 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
987 || GET_CODE (SUBREG_REG (in)) == MEM)
988 && ((GET_MODE_SIZE (inmode)

--- 14 unchanged lines hidden (view full) ---

1003 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1004 / UNITS_PER_WORD)))
1005#endif
1006 ))
1007 || (GET_CODE (SUBREG_REG (in)) == REG
1008 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1009 /* The case where out is nonzero
1010 is handled differently in the following statement. */
1011 && (out == 0 || SUBREG_WORD (in) == 0)
1012 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1014 > UNITS_PER_WORD)
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1016 / UNITS_PER_WORD)
1017 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1018 GET_MODE (SUBREG_REG (in)))))
1019 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
1020 + SUBREG_WORD (in)),
1021 inmode)))
1022#ifdef SECONDARY_INPUT_RELOAD_CLASS
1023 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1024 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1025 GET_MODE (SUBREG_REG (in)),
1026 SUBREG_REG (in))
1027 == NO_REGS))
1028#endif
1029#ifdef CLASS_CANNOT_CHANGE_SIZE
1030 || (GET_CODE (SUBREG_REG (in)) == REG
1031 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1032 && (TEST_HARD_REG_BIT
1033 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1034 REGNO (SUBREG_REG (in))))
1035 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1036 != GET_MODE_SIZE (inmode)))
1037#endif
1038 ))
1039 {
1040 in_subreg_loc = inloc;
1041 inloc = &SUBREG_REG (in);
1042 in = *inloc;
1043#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1044 if (GET_CODE (in) == MEM)

--- 8 unchanged lines hidden (view full) ---

1053 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1054 either M1 is not valid for R or M2 is wider than a word but we only
1055 need one word to store an M2-sized quantity in R.
1056
1057 However, we must reload the inner reg *as well as* the subreg in
1058 that case. */
1059
1060 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1061 code above. This can happen if SUBREG_WORD != 0. */
1062
1063 if (in != 0 && GET_CODE (in) == SUBREG
1064 && (CONSTANT_P (SUBREG_REG (in))
1065 || (GET_CODE (SUBREG_REG (in)) == REG
1066 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1067 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1068 + SUBREG_WORD (in),
1069 inmode)
1070 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1071 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1072 > UNITS_PER_WORD)
1073 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1074 / UNITS_PER_WORD)
1075 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1076 GET_MODE (SUBREG_REG (in)))))))))
1077 {
1078 /* This relies on the fact that emit_reload_insns outputs the
1079 instructions for input reloads of type RELOAD_OTHER in the same
1080 order as the reloads. Thus if the outer reload is also of type
1081 RELOAD_OTHER, we are guaranteed that this inner reload will be
1082 output before the outer reload. */
1083 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1084 find_valid_class (inmode, SUBREG_WORD (in)),
1085 VOIDmode, VOIDmode, 0, 0, opnum, type);
1086 dont_remove_subreg = 1;
1087 }
1088
1089 /* Similarly for paradoxical and problematical SUBREGs on the output.
1090 Note that there is no reason we need worry about the previous value
1091 of SUBREG_REG (out); even if wider than out,
1092 storing in a subreg is entitled to clobber it all
1093 (except in the case of STRICT_LOW_PART,
1094 and in that case the constraint should label it input-output.) */
1095 if (out != 0 && GET_CODE (out) == SUBREG
1096 && (SUBREG_WORD (out) == 0 || strict_low)
1097#ifdef CLASS_CANNOT_CHANGE_SIZE
1098 && class != CLASS_CANNOT_CHANGE_SIZE
1099#endif
1100 && (CONSTANT_P (SUBREG_REG (out))
1101 || strict_low
1102 || (((GET_CODE (SUBREG_REG (out)) == REG
1103 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1104 || GET_CODE (SUBREG_REG (out)) == MEM)
1105 && ((GET_MODE_SIZE (outmode)
1106 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1107#ifdef WORD_REGISTER_OPERATIONS
1108 || ((GET_MODE_SIZE (outmode)
1109 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1110 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1111 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1112 / UNITS_PER_WORD)))
1113#endif
1114 ))
1115 || (GET_CODE (SUBREG_REG (out)) == REG
1116 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1117 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1118 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1119 > UNITS_PER_WORD)
1120 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1121 / UNITS_PER_WORD)
1122 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1123 GET_MODE (SUBREG_REG (out)))))
1124 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1125 + SUBREG_WORD (out)),
1126 outmode)))
1127#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1128 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1129 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1130 GET_MODE (SUBREG_REG (out)),
1131 SUBREG_REG (out))
1132 == NO_REGS))
1133#endif
1134#ifdef CLASS_CANNOT_CHANGE_SIZE
1135 || (GET_CODE (SUBREG_REG (out)) == REG
1136 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1137 && (TEST_HARD_REG_BIT
1138 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1139 REGNO (SUBREG_REG (out))))
1140 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1141 != GET_MODE_SIZE (outmode)))
1142#endif
1143 ))
1144 {
1145 out_subreg_loc = outloc;
1146 outloc = &SUBREG_REG (out);
1147 out = *outloc;
1148#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1149 if (GET_CODE (out) == MEM
1150 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1151 abort ();
1152#endif
1153 outmode = GET_MODE (out);
1154 }
1155
1156 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1157 either M1 is not valid for R or M2 is wider than a word but we only
1158 need one word to store an M2-sized quantity in R.
1159
1160 However, we must reload the inner reg *as well as* the subreg in
1161 that case. In this case, the inner reg is an in-out reload. */
1162
1163 if (out != 0 && GET_CODE (out) == SUBREG
1164 && GET_CODE (SUBREG_REG (out)) == REG
1165 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1166 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1167 outmode)
1168 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1169 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1170 > UNITS_PER_WORD)
1171 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1172 / UNITS_PER_WORD)
1173 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1174 GET_MODE (SUBREG_REG (out)))))))
1175 {
1176 /* This relies on the fact that emit_reload_insns outputs the
1177 instructions for output reloads of type RELOAD_OTHER in reverse
1178 order of the reloads. Thus if the outer reload is also of type
1179 RELOAD_OTHER, we are guaranteed that this inner reload will be
1180 output after the outer reload. */
1181 dont_remove_subreg = 1;
1182 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1183 &SUBREG_REG (out),
1184 find_valid_class (outmode, SUBREG_WORD (out)),
1185 VOIDmode, VOIDmode, 0, 0,
1186 opnum, RELOAD_OTHER);
1187 }
1188
1189 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1190 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1191 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1192 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1193 dont_share = 1;
1194
1195 /* If IN is a SUBREG of a hard register, make a new REG. This
1196 simplifies some of the cases below. */
1197
1198 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1199 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1200 && ! dont_remove_subreg)
1201 in = gen_rtx_REG (GET_MODE (in),
1202 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1203
1204 /* Similarly for OUT. */
1205 if (out != 0 && GET_CODE (out) == SUBREG
1206 && GET_CODE (SUBREG_REG (out)) == REG
1207 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1208 && ! dont_remove_subreg)
1209 out = gen_rtx_REG (GET_MODE (out),
1210 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1211
1212 /* Narrow down the class of register wanted if that is
1213 desirable on this machine for efficiency. */
1214 if (in != 0)
1215 class = PREFERRED_RELOAD_CLASS (in, class);
1216
1217 /* Output reloads may need analogous treatment, different in detail. */
1218#ifdef PREFERRED_OUTPUT_RELOAD_CLASS

--- 87 unchanged lines hidden (view full) ---

1306 /* We found no existing reload suitable for re-use.
1307 So add an additional reload. */
1308
1309#ifdef SECONDARY_MEMORY_NEEDED
1310 /* If a memory location is needed for the copy, make one. */
1311 if (in != 0 && GET_CODE (in) == REG
1312 && REGNO (in) < FIRST_PSEUDO_REGISTER
1313 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1314 class, inmode))
1315 get_secondary_mem (in, inmode, opnum, type);
1316#endif
1317
1318 i = n_reloads;
1319 reload_in[i] = in;
1320 reload_out[i] = out;
1321 reload_reg_class[i] = class;
1322 reload_inmode[i] = inmode;
1323 reload_outmode[i] = outmode;
1324 reload_reg_rtx[i] = 0;
1325 reload_optional[i] = optional;
1326 reload_nongroup[i] = 0;
1327 reload_inc[i] = 0;
1328 reload_nocombine[i] = 0;
1329 reload_in_reg[i] = inloc ? *inloc : 0;
1330 reload_out_reg[i] = outloc ? *outloc : 0;
1331 reload_opnum[i] = opnum;
1332 reload_when_needed[i] = type;
1333 reload_secondary_in_reload[i] = secondary_in_reload;
1334 reload_secondary_out_reload[i] = secondary_out_reload;
1335 reload_secondary_in_icode[i] = secondary_in_icode;
1336 reload_secondary_out_icode[i] = secondary_out_icode;
1337 reload_secondary_p[i] = 0;
1338
1339 n_reloads++;
1340
1341#ifdef SECONDARY_MEMORY_NEEDED
1342 if (out != 0 && GET_CODE (out) == REG
1343 && REGNO (out) < FIRST_PSEUDO_REGISTER
1344 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1345 outmode))

--- 5 unchanged lines hidden (view full) ---

1351 /* We are reusing an existing reload,
1352 but we may have additional information for it.
1353 For example, we may now have both IN and OUT
1354 while the old one may have just one of them. */
1355
1356 /* The modes can be different. If they are, we want to reload in
1357 the larger mode, so that the value is valid for both modes. */
1358 if (inmode != VOIDmode
1359 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1360 reload_inmode[i] = inmode;
1361 if (outmode != VOIDmode
1362 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1363 reload_outmode[i] = outmode;
1364 if (in != 0)
1365 {
1366 rtx in_reg = inloc ? *inloc : 0;
1367 /* If we merge reloads for two distinct rtl expressions that
1368 are identical in content, there might be duplicate address
1369 reloads. Remove the extra set now, so that if we later find
1370 that we can inherit this reload, we can get rid of the
1371 address reloads altogether.
1372
1373 Do not do this if both reloads are optional since the result
1374 would be an optional reload which could potentially leave
1375 unresolved address replacements.
1376
1377 It is not sufficient to call transfer_replacements since
1378 choose_reload_regs will remove the replacements for address
1379 reloads of inherited reloads which results in the same
1380 problem. */
1381 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i])
1382 && ! (reload_optional[i] && optional))
1383 {
1384 /* We must keep the address reload with the lower operand
1385 number alive. */
1386 if (opnum > reload_opnum[i])
1387 {
1388 remove_address_replacements (in);
1389 in = reload_in[i];
1390 in_reg = reload_in_reg[i];
1391 }
1392 else
1393 remove_address_replacements (reload_in[i]);
1394 }
1395 reload_in[i] = in;
1396 reload_in_reg[i] = in_reg;
1397 }
1398 if (out != 0)
1399 {
1400 reload_out[i] = out;
1401 reload_out_reg[i] = outloc ? *outloc : 0;
1402 }
1403 if (reg_class_subset_p (class, reload_reg_class[i]))
1404 reload_reg_class[i] = class;
1405 reload_optional[i] &= optional;
1406 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1407 opnum, reload_opnum[i]))
1408 reload_when_needed[i] = RELOAD_OTHER;
1409 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1410 }
1411
1412 /* If the ostensible rtx being reload differs from the rtx found
1413 in the location to substitute, this reload is not safe to combine
1414 because we cannot reliably tell whether it appears in the insn. */
1415
1416 if (in != 0 && in != *inloc)
1417 reload_nocombine[i] = 1;
1418
1419#if 0
1420 /* This was replaced by changes in find_reloads_address_1 and the new
1421 function inc_for_reload, which go with a new meaning of reload_inc. */
1422
1423 /* If this is an IN/OUT reload in an insn that sets the CC,
1424 it must be for an autoincrement. It doesn't work to store
1425 the incremented value after the insn because that would clobber the CC.
1426 So we must do the increment of the value reloaded from,
1427 increment it, store it back, then decrement again. */
1428 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1429 {
1430 out = 0;
1431 reload_out[i] = 0;
1432 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1433 /* If we did not find a nonzero amount-to-increment-by,
1434 that contradicts the belief that IN is being incremented
1435 in an address in this insn. */
1436 if (reload_inc[i] == 0)
1437 abort ();
1438 }
1439#endif
1440
1441 /* If we will replace IN and OUT with the reload-reg,
1442 record where they are located so that substitution need
1443 not do a tree walk. */
1444
1445 if (replace_reloads)
1446 {
1447 if (inloc != 0)
1448 {
1449 register struct replacement *r = &replacements[n_replacements++];
1450 r->what = i;
1451 r->subreg_loc = in_subreg_loc;
1452 r->where = inloc;
1453 r->mode = inmode;
1454 }
1455 if (outloc != 0 && outloc != inloc)
1456 {
1457 register struct replacement *r = &replacements[n_replacements++];
1458 r->what = i;
1459 r->where = outloc;
1460 r->subreg_loc = out_subreg_loc;
1461 r->mode = outmode;
1462 }
1463 }
1464
1465 /* If this reload is just being introduced and it has both
1466 an incoming quantity and an outgoing quantity that are
1467 supposed to be made to match, see if either one of the two
1468 can serve as the place to reload into.
1469
1470 If one of them is acceptable, set reload_reg_rtx[i]
1471 to that one. */
1472
1473 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1474 {
1475 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1476 inmode, outmode,
1477 reload_reg_class[i], i,
1478 earlyclobber_operand_p (out));
1479
1480 /* If the outgoing register already contains the same value
1481 as the incoming one, we can dispense with loading it.
1482 The easiest way to tell the caller that is to give a phony
1483 value for the incoming operand (same as outgoing one). */
1484 if (reload_reg_rtx[i] == out
1485 && (GET_CODE (in) == REG || CONSTANT_P (in))
1486 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1487 static_reload_reg_p, i, inmode))
1488 reload_in[i] = out;
1489 }
1490
1491 /* If this is an input reload and the operand contains a register that
1492 dies in this insn and is used nowhere else, see if it is the right class
1493 to be used for this reload. Use it if so. (This occurs most commonly
1494 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1495 this if it is also an output reload that mentions the register unless
1496 the output is a SUBREG that clobbers an entire register.
1497
1498 Note that the operand might be one of the spill regs, if it is a
1499 pseudo reg and we are in a block where spilling has not taken place.
1500 But if there is no spilling in this block, that is OK.
1501 An explicitly used hard reg cannot be a spill reg. */
1502
1503 if (reload_reg_rtx[i] == 0 && in != 0)
1504 {
1505 rtx note;
1506 int regno;
1507
1508 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1509 if (REG_NOTE_KIND (note) == REG_DEAD
1510 && GET_CODE (XEXP (note, 0)) == REG
1511 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1512 && reg_mentioned_p (XEXP (note, 0), in)
1513 && ! refers_to_regno_for_reload_p (regno,
1514 (regno
1515 + HARD_REGNO_NREGS (regno,
1516 inmode)),
1517 PATTERN (this_insn), inloc)
1518 /* If this is also an output reload, IN cannot be used as
1519 the reload register if it is set in this insn unless IN
1520 is also OUT. */
1521 && (out == 0 || in == out
1522 || ! hard_reg_set_here_p (regno,
1523 (regno
1524 + HARD_REGNO_NREGS (regno,
1525 inmode)),
1526 PATTERN (this_insn)))
1527 /* ??? Why is this code so different from the previous?
1528 Is there any simple coherent way to describe the two together?
1529 What's going on here. */
1530 && (in != out
1531 || (GET_CODE (in) == SUBREG
1532 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1533 / UNITS_PER_WORD)
1534 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1535 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1536 /* Make sure the operand fits in the reg that dies. */
1537 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1538 && HARD_REGNO_MODE_OK (regno, inmode)
1539 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1540 && HARD_REGNO_MODE_OK (regno, outmode))
1541 {
1542 unsigned int offs;
1543 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1544 HARD_REGNO_NREGS (regno, outmode));
1545
1546 for (offs = 0; offs < nregs; offs++)
1547 if (fixed_regs[regno + offs]
1548 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1549 regno + offs))
1550 break;
1551
1552 if (offs == nregs)
1553 {
1554 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1555 break;
1556 }
1557 }
1558 }
1559
1560 if (out)
1561 output_reloadnum = i;
1562

--- 9 unchanged lines hidden (view full) ---

1572static void
1573push_replacement (loc, reloadnum, mode)
1574 rtx *loc;
1575 int reloadnum;
1576 enum machine_mode mode;
1577{
1578 if (replace_reloads)
1579 {
1580 register struct replacement *r = &replacements[n_replacements++];
1581 r->what = reloadnum;
1582 r->where = loc;
1583 r->subreg_loc = 0;
1584 r->mode = mode;
1585 }
1586}
1587
1588/* Transfer all replacements that used to be in reload FROM to be in

--- 17 unchanged lines hidden (view full) ---

1606int
1607remove_address_replacements (in_rtx)
1608 rtx in_rtx;
1609{
1610 int i, j;
1611 char reload_flags[MAX_RELOADS];
1612 int something_changed = 0;
1613
1614 bzero (reload_flags, sizeof reload_flags);
1615 for (i = 0, j = 0; i < n_replacements; i++)
1616 {
1617 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1618 reload_flags[replacements[i].what] |= 1;
1619 else
1620 {
1621 replacements[j++] = replacements[i];
1622 reload_flags[replacements[i].what] |= 2;
1623 }
1624 }
1625 /* Note that the following store must be done before the recursive calls. */
1626 n_replacements = j;
1627
1628 for (i = n_reloads - 1; i >= 0; i--)
1629 {
1630 if (reload_flags[i] == 1)
1631 {
1632 deallocate_reload_reg (i);
1633 remove_address_replacements (reload_in[i]);
1634 reload_in[i] = 0;
1635 something_changed = 1;
1636 }
1637 }
1638 return something_changed;
1639}
1640
1641/* Return non-zero if IN contains a piece of rtl that has the address LOC */
1642static int
1643loc_mentioned_in_p (loc, in)
1644 rtx *loc, in;
1645{
1646 enum rtx_code code = GET_CODE (in);
1647 char *fmt = GET_RTX_FORMAT (code);
1648 int i, j;
1649
1650 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1651 {
1652 if (loc == &XEXP (in, i))
1653 return 1;
1654 if (fmt[i] == 'e')
1655 {
1656 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1657 return 1;
1658 }
1659 else if (fmt[i] == 'E')
1660 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1661 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1662 return 1;
1663 }
1664 return 0;
1665}
1666
1667/* If there is only one output reload, and it is not for an earlyclobber
1668 operand, try to combine it with a (logically unrelated) input reload
1669 to reduce the number of reload registers needed.
1670
1671 This is safe if the input reload does not appear in
1672 the value being output-reloaded, because this implies
1673 it is not needed any more once the original insn completes.

--- 9 unchanged lines hidden (view full) ---

1683 int output_reload = -1;
1684 int secondary_out = -1;
1685 rtx note;
1686
1687 /* Find the output reload; return unless there is exactly one
1688 and that one is mandatory. */
1689
1690 for (i = 0; i < n_reloads; i++)
1691 if (reload_out[i] != 0)
1692 {
1693 if (output_reload >= 0)
1694 return;
1695 output_reload = i;
1696 }
1697
1698 if (output_reload < 0 || reload_optional[output_reload])
1699 return;
1700
1701 /* An input-output reload isn't combinable. */
1702
1703 if (reload_in[output_reload] != 0)
1704 return;
1705
1706 /* If this reload is for an earlyclobber operand, we can't do anything. */
1707 if (earlyclobber_operand_p (reload_out[output_reload]))
1708 return;
1709
1710 /* Check each input reload; can we combine it? */
1711
1712 for (i = 0; i < n_reloads; i++)
1713 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1714 /* Life span of this reload must not extend past main insn. */
1715 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1716 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1717 && reload_when_needed[i] != RELOAD_OTHER
1718 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1719 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1720 reload_outmode[output_reload]))
1721 && reload_inc[i] == 0
1722 && reload_reg_rtx[i] == 0
1723#ifdef SECONDARY_MEMORY_NEEDED
1724 /* Don't combine two reloads with different secondary
1725 memory locations. */
1726 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1727 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1728 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1729 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1730#endif
1731 && (SMALL_REGISTER_CLASSES
1732 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1733 : (reg_class_subset_p (reload_reg_class[i],
1734 reload_reg_class[output_reload])
1735 || reg_class_subset_p (reload_reg_class[output_reload],
1736 reload_reg_class[i])))
1737 && (MATCHES (reload_in[i], reload_out[output_reload])
1738 /* Args reversed because the first arg seems to be
1739 the one that we imagine being modified
1740 while the second is the one that might be affected. */
1741 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1742 reload_in[i])
1743 /* However, if the input is a register that appears inside
1744 the output, then we also can't share.
1745 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1746 If the same reload reg is used for both reg 69 and the
1747 result to be stored in memory, then that result
1748 will clobber the address of the memory ref. */
1749 && ! (GET_CODE (reload_in[i]) == REG
1750 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1751 reload_out[output_reload]))))
1752 && (reg_class_size[(int) reload_reg_class[i]]
1753 || SMALL_REGISTER_CLASSES)
1754 /* We will allow making things slightly worse by combining an
1755 input and an output, but no worse than that. */
1756 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1757 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1758 {
1759 int j;
1760
1761 /* We have found a reload to combine with! */
1762 reload_out[i] = reload_out[output_reload];
1763 reload_out_reg[i] = reload_out_reg[output_reload];
1764 reload_outmode[i] = reload_outmode[output_reload];
1765 /* Mark the old output reload as inoperative. */
1766 reload_out[output_reload] = 0;
1767 /* The combined reload is needed for the entire insn. */
1768 reload_when_needed[i] = RELOAD_OTHER;
1769 /* If the output reload had a secondary reload, copy it. */
1770 if (reload_secondary_out_reload[output_reload] != -1)
1771 {
1772 reload_secondary_out_reload[i]
1773 = reload_secondary_out_reload[output_reload];
1774 reload_secondary_out_icode[i]
1775 = reload_secondary_out_icode[output_reload];
1776 }
1777
1778#ifdef SECONDARY_MEMORY_NEEDED
1779 /* Copy any secondary MEM. */
1780 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1781 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1782 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1783#endif
1784 /* If required, minimize the register class. */
1785 if (reg_class_subset_p (reload_reg_class[output_reload],
1786 reload_reg_class[i]))
1787 reload_reg_class[i] = reload_reg_class[output_reload];
1788
1789 /* Transfer all replacements from the old reload to the combined. */
1790 for (j = 0; j < n_replacements; j++)
1791 if (replacements[j].what == output_reload)
1792 replacements[j].what = i;
1793
1794 return;
1795 }
1796
1797 /* If this insn has only one operand that is modified or written (assumed
1798 to be the first), it must be the one corresponding to this reload. It
1799 is safe to use anything that dies in this insn for that output provided
1800 that it does not occur in the output (we already know it isn't an
1801 earlyclobber. If this is an asm insn, give up. */
1802
1803 if (INSN_CODE (this_insn) == -1)
1804 return;
1805
1806 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1807 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1808 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1809 return;
1810
1811 /* See if some hard register that dies in this insn and is not used in
1812 the output is the right class. Only works if the register we pick
1813 up can fully hold our output reload. */
1814 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1815 if (REG_NOTE_KIND (note) == REG_DEAD
1816 && GET_CODE (XEXP (note, 0)) == REG
1817 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1818 reload_out[output_reload])
1819 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1820 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1821 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1822 REGNO (XEXP (note, 0)))
1823 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1824 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1825 /* Ensure that a secondary or tertiary reload for this output
1826 won't want this register. */
1827 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1828 || (! (TEST_HARD_REG_BIT
1829 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1830 REGNO (XEXP (note, 0))))
1831 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1832 || ! (TEST_HARD_REG_BIT
1833 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1834 REGNO (XEXP (note, 0)))))))
1835 && ! fixed_regs[REGNO (XEXP (note, 0))])
1836 {
1837 reload_reg_rtx[output_reload]
1838 = gen_rtx_REG (reload_outmode[output_reload],
1839 REGNO (XEXP (note, 0)));
1840 return;
1841 }
1842}
1843
1844/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1845 See if one of IN and OUT is a register that may be used;
1846 this is desirable since a spill-register won't be needed.
1847 If so, return the register rtx that proves acceptable.
1848
1849 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1850 CLASS is the register class required for the reload.
1851
1852 If FOR_REAL is >= 0, it is the number of the reload,
1853 and in some cases when it can be discovered that OUT doesn't need
1854 to be computed, clear out reload_out[FOR_REAL].
1855
1856 If FOR_REAL is -1, this should not be done, because this call
1857 is just to see if a register can be found, not to find and install it.
1858
1859 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1860 puts an additional constraint on being able to use IN for OUT since
1861 IN must not appear elsewhere in the insn (it is assumed that IN itself
1862 is safe from the earlyclobber). */

--- 16 unchanged lines hidden (view full) ---

1879
1880 /* If operands exceed a word, we can't use either of them
1881 unless they have the same size. */
1882 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1883 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1884 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1885 return 0;
1886
1887 /* Find the inside of any subregs. */
1888 while (GET_CODE (out) == SUBREG)
1889 {
1890 out_offset = SUBREG_WORD (out);
1891 out = SUBREG_REG (out);
1892 }
1893 while (GET_CODE (in) == SUBREG)
1894 {
1895 in_offset = SUBREG_WORD (in);
1896 in = SUBREG_REG (in);
1897 }
1898
1899 /* Narrow down the reg class, the same way push_reload will;
1900 otherwise we might find a dummy now, but push_reload won't. */
1901 class = PREFERRED_RELOAD_CLASS (in, class);
1902
1903 /* See if OUT will do. */
1904 if (GET_CODE (out) == REG
1905 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1906 {
1907 register int regno = REGNO (out) + out_offset;
1908 int nwords = HARD_REGNO_NREGS (regno, outmode);
1909 rtx saved_rtx;
1910
1911 /* When we consider whether the insn uses OUT,
1912 ignore references within IN. They don't prevent us
1913 from copying IN into OUT, because those refs would
1914 move into the insn that reloads IN.
1915
1916 However, we only ignore IN in its role as this reload.
1917 If the insn uses IN elsewhere and it contains OUT,
1918 that counts. We can't be sure it's the "same" operand
1919 so it might not go through this reload. */
1920 saved_rtx = *inloc;
1921 *inloc = const0_rtx;
1922
1923 if (regno < FIRST_PSEUDO_REGISTER
1924 /* A fixed reg that can overlap other regs better not be used
1925 for reloading in any way. */
1926#ifdef OVERLAPPING_REGNO_P
1927 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1928#endif
1929 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1930 PATTERN (this_insn), outloc))
1931 {
1932 int i;
1933 for (i = 0; i < nwords; i++)
1934 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1935 regno + i))
1936 break;
1937
1938 if (i == nwords)
1939 {
1940 if (GET_CODE (real_out) == REG)

--- 22 unchanged lines hidden (view full) ---

1963 && HARD_REGNO_MODE_OK (REGNO (in),
1964 /* The only case where out and real_out might
1965 have different modes is where real_out
1966 is a subreg, and in that case, out
1967 has a real mode. */
1968 (GET_MODE (out) != VOIDmode
1969 ? GET_MODE (out) : outmode)))
1970 {
1971 register int regno = REGNO (in) + in_offset;
1972 int nwords = HARD_REGNO_NREGS (regno, inmode);
1973
1974 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1975 && ! hard_reg_set_here_p (regno, regno + nwords,
1976 PATTERN (this_insn))
1977 && (! earlyclobber
1978 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1979 PATTERN (this_insn), inloc)))
1980 {
1981 int i;
1982 for (i = 0; i < nwords; i++)
1983 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1984 regno + i))
1985 break;
1986
1987 if (i == nwords)
1988 {
1989 /* If we were going to use OUT as the reload reg
1990 and changed our mind, it means OUT is a dummy that
1991 dies here. So don't bother copying value to it. */
1992 if (for_real >= 0 && value == real_out)
1993 reload_out[for_real] = 0;
1994 if (GET_CODE (real_in) == REG)
1995 value = real_in;
1996 else
1997 value = gen_rtx_REG (inmode, regno);
1998 }
1999 }
2000 }
2001

--- 21 unchanged lines hidden (view full) ---

2023
2024/* Return 1 if expression X alters a hard reg in the range
2025 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2026 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2027 X should be the body of an instruction. */
2028
2029static int
2030hard_reg_set_here_p (beg_regno, end_regno, x)
2031 register int beg_regno, end_regno;
2032 rtx x;
2033{
2034 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2035 {
2036 register rtx op0 = SET_DEST (x);
2037 while (GET_CODE (op0) == SUBREG)
2038 op0 = SUBREG_REG (op0);
2039 if (GET_CODE (op0) == REG)
2040 {
2041 register int r = REGNO (op0);
2042 /* See if this reg overlaps range under consideration. */
2043 if (r < end_regno
2044 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2045 return 1;
2046 }
2047 }
2048 else if (GET_CODE (x) == PARALLEL)
2049 {
2050 register int i = XVECLEN (x, 0) - 1;
2051 for (; i >= 0; i--)
2052 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2053 return 1;
2054 }
2055
2056 return 0;
2057}
2058
2059/* Return 1 if ADDR is a valid memory address for mode MODE,
2060 and check that each pseudo reg has the proper kind of
2061 hard reg. */
2062
2063int
2064strict_memory_address_p (mode, addr)
2065 enum machine_mode mode;
2066 register rtx addr;
2067{
2068 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2069 return 0;
2070
2071 win:
2072 return 1;
2073}
2074

--- 9 unchanged lines hidden (view full) ---

2084
2085/* ??? To be completely correct, we should arrange to pass
2086 for X the output operand and for Y the input operand.
2087 For now, we assume that the output operand has the lower number
2088 because that is natural in (SET output (... input ...)). */
2089
2090int
2091operands_match_p (x, y)
2092 register rtx x, y;
2093{
2094 register int i;
2095 register RTX_CODE code = GET_CODE (x);
2096 register char *fmt;
2097 int success_2;
2098
2099 if (x == y)
2100 return 1;
2101 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2102 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2103 && GET_CODE (SUBREG_REG (y)) == REG)))
2104 {
2105 register int j;
2106
2107 if (code == SUBREG)
2108 {
2109 i = REGNO (SUBREG_REG (x));
2110 if (i >= FIRST_PSEUDO_REGISTER)
2111 goto slow;
2112 i += SUBREG_WORD (x);
2113 }
2114 else
2115 i = REGNO (x);
2116
2117 if (GET_CODE (y) == SUBREG)
2118 {
2119 j = REGNO (SUBREG_REG (y));
2120 if (j >= FIRST_PSEUDO_REGISTER)
2121 goto slow;
2122 j += SUBREG_WORD (y);
2123 }
2124 else
2125 j = REGNO (y);
2126
2127 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2128 multiple hard register group, so that for example (reg:DI 0) and
2129 (reg:SI 1) will be considered the same register. */
2130 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD

--- 5 unchanged lines hidden (view full) ---

2136
2137 return i == j;
2138 }
2139 /* If two operands must match, because they are really a single
2140 operand of an assembler insn, then two postincrements are invalid
2141 because the assembler insn would increment only once.
2142 On the other hand, an postincrement matches ordinary indexing
2143 if the postincrement is the output operand. */
2144 if (code == POST_DEC || code == POST_INC)
2145 return operands_match_p (XEXP (x, 0), y);
2146 /* Two preincrements are invalid
2147 because the assembler insn would increment only once.
2148 On the other hand, an preincrement matches ordinary indexing
2149 if the preincrement is the input operand.
2150 In this case, return 2, since some callers need to do special
2151 things when this happens. */
2152 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2153 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2154
2155 slow:
2156
2157 /* Now we have disposed of all the cases
2158 in which different rtx codes can match. */
2159 if (code != GET_CODE (y))
2160 return 0;
2161 if (code == LABEL_REF)
2162 return XEXP (x, 0) == XEXP (y, 0);
2163 if (code == SYMBOL_REF)
2164 return XSTR (x, 0) == XSTR (y, 0);
2165

--- 54 unchanged lines hidden (view full) ---

2220 default:
2221 abort ();
2222 }
2223 }
2224 return 1 + success_2;
2225}
2226
2227/* Describe the range of registers or memory referenced by X.
2228 If X is a register, set REG_FLAG and put the first register
2229 number into START and the last plus one into END.
2230 If X is a memory reference, put a base address into BASE
2231 and a range of integer offsets into START and END.
2232 If X is pushing on the stack, we can assume it causes no trouble,
2233 so we set the SAFE field. */
2234
2235static struct decomposition
2236decompose (x)
2237 rtx x;
2238{
2239 struct decomposition val;
2240 int all_const = 0;
2241
2242 val.reg_flag = 0;
2243 val.safe = 0;
2244 val.base = 0;
2245 if (GET_CODE (x) == MEM)
2246 {
2247 rtx base, offset = 0;
2248 rtx addr = XEXP (x, 0);
2249
2250 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2251 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2252 {
2253 val.base = XEXP (addr, 0);
2254 val.start = - GET_MODE_SIZE (GET_MODE (x));
2255 val.end = GET_MODE_SIZE (GET_MODE (x));
2256 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2257 return val;
2258 }
2259
2260 if (GET_CODE (addr) == CONST)
2261 {
2262 addr = XEXP (addr, 0);
2263 all_const = 1;
2264 }
2265 if (GET_CODE (addr) == PLUS)
2266 {
2267 if (CONSTANT_P (XEXP (addr, 0)))

--- 7 unchanged lines hidden (view full) ---

2275 offset = XEXP (addr, 1);
2276 }
2277 }
2278
2279 if (offset == 0)
2280 {
2281 base = addr;
2282 offset = const0_rtx;
2283 }
2284 if (GET_CODE (offset) == CONST)
2285 offset = XEXP (offset, 0);
2286 if (GET_CODE (offset) == PLUS)
2287 {
2288 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2289 {
2290 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2291 offset = XEXP (offset, 0);

--- 24 unchanged lines hidden (view full) ---

2316 val.start = INTVAL (offset);
2317 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2318 val.base = base;
2319 return val;
2320 }
2321 else if (GET_CODE (x) == REG)
2322 {
2323 val.reg_flag = 1;
2324 val.start = true_regnum (x);
2325 if (val.start < 0)
2326 {
2327 /* A pseudo with no hard reg. */
2328 val.start = REGNO (x);
2329 val.end = val.start + 1;
2330 }
2331 else
2332 /* A hard reg. */
2333 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2334 }
2335 else if (GET_CODE (x) == SUBREG)
2336 {
2337 if (GET_CODE (SUBREG_REG (x)) != REG)
2338 /* This could be more precise, but it's good enough. */
2339 return decompose (SUBREG_REG (x));
2340 val.reg_flag = 1;
2341 val.start = true_regnum (x);
2342 if (val.start < 0)
2343 return decompose (SUBREG_REG (x));
2344 else
2345 /* A hard reg. */
2346 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2347 }
2348 else if (CONSTANT_P (x)
2349 /* This hasn't been assigned yet, so it can't conflict yet. */

--- 10 unchanged lines hidden (view full) ---

2360static int
2361immune_p (x, y, ydata)
2362 rtx x, y;
2363 struct decomposition ydata;
2364{
2365 struct decomposition xdata;
2366
2367 if (ydata.reg_flag)
2368 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2369 if (ydata.safe)
2370 return 1;
2371
2372 if (GET_CODE (y) != MEM)
2373 abort ();
2374 /* If Y is memory and X is not, Y can't affect X. */
2375 if (GET_CODE (x) != MEM)
2376 return 1;
2377
2378 xdata = decompose (x);
2379
2380 if (! rtx_equal_p (xdata.base, ydata.base))
2381 {
2382 /* If bases are distinct symbolic constants, there is no overlap. */
2383 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2384 return 1;
2385 /* Constants and stack slots never overlap. */
2386 if (CONSTANT_P (xdata.base)

--- 5 unchanged lines hidden (view full) ---

2392 && (xdata.base == frame_pointer_rtx
2393 || xdata.base == hard_frame_pointer_rtx
2394 || xdata.base == stack_pointer_rtx))
2395 return 1;
2396 /* If either base is variable, we don't know anything. */
2397 return 0;
2398 }
2399
2400
2401 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2402}
2403
2404/* Similar, but calls decompose. */
2405
2406int
2407safe_from_earlyclobber (op, clobber)
2408 rtx op, clobber;

--- 28 unchanged lines hidden (view full) ---

2437
2438int
2439find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2440 rtx insn;
2441 int replace, ind_levels;
2442 int live_known;
2443 short *reload_reg_p;
2444{
2445#ifdef REGISTER_CONSTRAINTS
2446
2447 register int insn_code_number;
2448 register int i, j;
2449 int noperands;
2450 /* These start out as the constraints for the insn
2451 and they are chewed up as we consider alternatives. */
2452 char *constraints[MAX_RECOG_OPERANDS];
2453 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2454 a register. */
2455 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2456 char pref_or_nothing[MAX_RECOG_OPERANDS];
2457 /* Nonzero for a MEM operand whose entire address needs a reload. */
2458 int address_reloaded[MAX_RECOG_OPERANDS];
2459 /* Value of enum reload_type to use for operand. */
2460 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2461 /* Value of enum reload_type to use within address of operand. */
2462 enum reload_type address_type[MAX_RECOG_OPERANDS];
2463 /* Save the usage of each operand. */
2464 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2465 int no_input_reloads = 0, no_output_reloads = 0;
2466 int n_alternatives;
2467 int this_alternative[MAX_RECOG_OPERANDS];
2468 char this_alternative_win[MAX_RECOG_OPERANDS];
2469 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2470 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2471 int this_alternative_matches[MAX_RECOG_OPERANDS];
2472 int swapped;
2473 int goal_alternative[MAX_RECOG_OPERANDS];
2474 int this_alternative_number;
2475 int goal_alternative_number;
2476 int operand_reloadnum[MAX_RECOG_OPERANDS];
2477 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2478 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2479 char goal_alternative_win[MAX_RECOG_OPERANDS];
2480 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2481 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2482 int goal_alternative_swapped;
2483 int best;
2484 int commutative;
2485 int changed;
2486 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2487 rtx substed_operand[MAX_RECOG_OPERANDS];
2488 rtx body = PATTERN (insn);
2489 rtx set = single_set (insn);
2490 int goal_earlyclobber, this_earlyclobber;
2491 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2492 int retval = 0;
2493 /* Cache the last regno for the last pseudo we did an output reload
2494 for in case the next insn uses it. */
2495 static int last_output_reload_regno = -1;
2496
2497 this_insn = insn;
2498 n_reloads = 0;
2499 n_replacements = 0;
2500 n_earlyclobbers = 0;
2501 replace_reloads = replace;
2502 hard_regs_live_known = live_known;
2503 static_reload_reg_p = reload_reg_p;

--- 5 unchanged lines hidden (view full) ---

2509 no_output_reloads = 1;
2510
2511#ifdef HAVE_cc0
2512 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2513 no_input_reloads = 1;
2514 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2515 no_output_reloads = 1;
2516#endif
2517
2518#ifdef SECONDARY_MEMORY_NEEDED
2519 /* The eliminated forms of any secondary memory locations are per-insn, so
2520 clear them out here. */
2521
2522 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2523#endif
2524
2525 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2526 is cheap to move between them. If it is not, there may not be an insn
2527 to do the copy, so we may need a reload. */
2528 if (GET_CODE (body) == SET
2529 && GET_CODE (SET_DEST (body)) == REG
2530 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2531 && GET_CODE (SET_SRC (body)) == REG
2532 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2533 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2534 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2535 return 0;
2536
2537 extract_insn (insn);
2538
2539 noperands = reload_n_operands = recog_n_operands;
2540 n_alternatives = recog_n_alternatives;
2541
2542 /* Just return "no reloads" if insn has no operands with constraints. */
2543 if (noperands == 0 || n_alternatives == 0)
2544 return 0;
2545
2546 insn_code_number = INSN_CODE (insn);
2547 this_insn_is_asm = insn_code_number < 0;
2548
2549 bcopy ((char *) recog_operand_mode, (char *) operand_mode,
2550 noperands * sizeof (enum machine_mode));
2551 bcopy ((char *) recog_constraints, (char *) constraints,
2552 noperands * sizeof (char *));
2553
2554 commutative = -1;
2555
2556 /* If we will need to know, later, whether some pair of operands
2557 are the same, we must compare them now and save the result.
2558 Reloading the base and index registers will clobber them
2559 and afterward they will fail to match. */
2560
2561 for (i = 0; i < noperands; i++)
2562 {
2563 register char *p;
2564 register int c;
2565
2566 substed_operand[i] = recog_operand[i];
2567 p = constraints[i];
2568
2569 modified[i] = RELOAD_READ;
2570
2571 /* Scan this operand's constraint to see if it is an output operand,
2572 an in-out operand, is commutative, or should match another. */
2573
2574 while ((c = *p++))
2575 {
2576 if (c == '=')
2577 modified[i] = RELOAD_WRITE;
2578 else if (c == '+')
2579 modified[i] = RELOAD_READ_WRITE;
2580 else if (c == '%')
2581 {
2582 /* The last operand should not be marked commutative. */
2583 if (i == noperands - 1)
2584 abort ();
2585
2586 commutative = i;
2587 }
2588 else if (c >= '0' && c <= '9')
2589 {
2590 c -= '0';
2591 operands_match[c][i]
2592 = operands_match_p (recog_operand[c], recog_operand[i]);
2593
2594 /* An operand may not match itself. */
2595 if (c == i)
2596 abort ();
2597
2598 /* If C can be commuted with C+1, and C might need to match I,
2599 then C+1 might also need to match I. */
2600 if (commutative >= 0)
2601 {
2602 if (c == commutative || c == commutative + 1)
2603 {
2604 int other = c + (c == commutative ? 1 : -1);
2605 operands_match[other][i]
2606 = operands_match_p (recog_operand[other], recog_operand[i]);
2607 }
2608 if (i == commutative || i == commutative + 1)
2609 {
2610 int other = i + (i == commutative ? 1 : -1);
2611 operands_match[c][other]
2612 = operands_match_p (recog_operand[c], recog_operand[other]);
2613 }
2614 /* Note that C is supposed to be less than I.
2615 No need to consider altering both C and I because in
2616 that case we would alter one into the other. */
2617 }
2618 }
2619 }
2620 }
2621
2622 /* Examine each operand that is a memory reference or memory address
2623 and reload parts of the addresses into index registers.
2624 Also here any references to pseudo regs that didn't get hard regs
2625 but are equivalent to constants get replaced in the insn itself
2626 with those constants. Nobody will ever see them again.
2627
2628 Finally, set up the preferred classes of each operand. */
2629
2630 for (i = 0; i < noperands; i++)
2631 {
2632 register RTX_CODE code = GET_CODE (recog_operand[i]);
2633
2634 address_reloaded[i] = 0;
2635 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2636 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2637 : RELOAD_OTHER);
2638 address_type[i]
2639 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2640 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2641 : RELOAD_OTHER);
2642
2643 if (*constraints[i] == 0)
2644 /* Ignore things like match_operator operands. */
2645 ;
2646 else if (constraints[i][0] == 'p')
2647 {
2648 find_reloads_address (VOIDmode, NULL_PTR,
2649 recog_operand[i], recog_operand_loc[i],
2650 i, operand_type[i], ind_levels, insn);
2651
2652 /* If we now have a simple operand where we used to have a
2653 PLUS or MULT, re-recognize and try again. */
2654 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2655 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2656 && (GET_CODE (recog_operand[i]) == MULT
2657 || GET_CODE (recog_operand[i]) == PLUS))
2658 {
2659 INSN_CODE (insn) = -1;
2660 retval = find_reloads (insn, replace, ind_levels, live_known,
2661 reload_reg_p);
2662 return retval;
2663 }
2664
2665 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2666 }
2667 else if (code == MEM)
2668 {
2669 address_reloaded[i]
2670 = find_reloads_address (GET_MODE (recog_operand[i]),
2671 recog_operand_loc[i],
2672 XEXP (recog_operand[i], 0),
2673 &XEXP (recog_operand[i], 0),
2674 i, address_type[i], ind_levels, insn);
2675 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2676 }
2677 else if (code == SUBREG)
2678 {
2679 rtx reg = SUBREG_REG (recog_operand[i]);
2680 rtx op
2681 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2682 ind_levels,
2683 set != 0
2684 && &SET_DEST (set) == recog_operand_loc[i],
2685 insn);
2686
2687 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2688 that didn't get a hard register, emit a USE with a REG_EQUAL
2689 note in front so that we might inherit a previous, possibly
2690 wider reload. */
2691
2692 if (replace
2693 && GET_CODE (op) == MEM
2694 && GET_CODE (reg) == REG
2695 && (GET_MODE_SIZE (GET_MODE (reg))
2696 >= GET_MODE_SIZE (GET_MODE (op))))
2697 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2698 = gen_rtx_EXPR_LIST (REG_EQUAL,
2699 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2700
2701 substed_operand[i] = recog_operand[i] = op;
2702 }
2703 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2704 /* We can get a PLUS as an "operand" as a result of register
2705 elimination. See eliminate_regs and gen_reload. We handle
2706 a unary operator by reloading the operand. */
2707 substed_operand[i] = recog_operand[i]
2708 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2709 ind_levels, 0, insn);
2710 else if (code == REG)
2711 {
2712 /* This is equivalent to calling find_reloads_toplev.
2713 The code is duplicated for speed.
2714 When we find a pseudo always equivalent to a constant,
2715 we replace it by the constant. We must be sure, however,
2716 that we don't try to replace it in the insn in which it
2717 is being set. */
2718 register int regno = REGNO (recog_operand[i]);
2719 if (reg_equiv_constant[regno] != 0
2720 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2721 {
2722 /* Record the existing mode so that the check if constants are
2723 allowed will work when operand_mode isn't specified. */
2724
2725 if (operand_mode[i] == VOIDmode)
2726 operand_mode[i] = GET_MODE (recog_operand[i]);
2727
2728 substed_operand[i] = recog_operand[i]
2729 = reg_equiv_constant[regno];
2730 }
2731 if (reg_equiv_memory_loc[regno] != 0
2732 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2733 /* We need not give a valid is_set_dest argument since the case
2734 of a constant equivalence was checked above. */
2735 substed_operand[i] = recog_operand[i]
2736 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2737 ind_levels, 0, insn);
2738 }
2739 /* If the operand is still a register (we didn't replace it with an
2740 equivalent), get the preferred class to reload it into. */
2741 code = GET_CODE (recog_operand[i]);
2742 preferred_class[i]
2743 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2744 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2745 pref_or_nothing[i]
2746 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2747 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2748 }
2749
2750#ifdef HAVE_cc0
2751 /* If we made any reloads for addresses, see if they violate a
2752 "no input reloads" requirement for this insn. */
2753 if (no_input_reloads)
2754 for (i = 0; i < n_reloads; i++)
2755 if (reload_in[i] != 0)
2756 abort ();
2757#endif
2758
2759 /* If this is simply a copy from operand 1 to operand 0, merge the
2760 preferred classes for the operands. */
2761 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2762 && recog_operand[1] == SET_SRC (set))
2763 {
2764 preferred_class[0] = preferred_class[1]
2765 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2766 pref_or_nothing[0] |= pref_or_nothing[1];
2767 pref_or_nothing[1] |= pref_or_nothing[0];
2768 }
2769
2770 /* Now see what we need for pseudo-regs that didn't get hard regs

--- 22 unchanged lines hidden (view full) ---

2793 and would require loading. */
2794 int losers = 0;
2795 /* BAD is set to 1 if it some operand can't fit this alternative
2796 even after reloading. */
2797 int bad = 0;
2798 /* REJECT is a count of how undesirable this alternative says it is
2799 if any reloading is required. If the alternative matches exactly
2800 then REJECT is ignored, but otherwise it gets this much
2801 counted against it in addition to the reloading needed. Each
2802 ? counts three times here since we want the disparaging caused by
2803 a bad register class to only count 1/3 as much. */
2804 int reject = 0;
2805
2806 this_earlyclobber = 0;
2807
2808 for (i = 0; i < noperands; i++)
2809 {
2810 register char *p = constraints[i];
2811 register int win = 0;
2812 /* 0 => this operand can be reloaded somehow for this alternative */
2813 int badop = 1;
2814 /* 0 => this operand can be reloaded if the alternative allows regs. */
2815 int winreg = 0;
2816 int c;
2817 register rtx operand = recog_operand[i];
2818 int offset = 0;
2819 /* Nonzero means this is a MEM that must be reloaded into a reg
2820 regardless of what the constraint says. */
2821 int force_reload = 0;
2822 int offmemok = 0;
2823 /* Nonzero if a constant forced into memory would be OK for this
2824 operand. */
2825 int constmemok = 0;
2826 int earlyclobber = 0;
2827
2828 /* If the predicate accepts a unary operator, it means that
2829 we need to reload the operand, but do not do this for
2830 match_operator and friends. */
2831 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2832 operand = XEXP (operand, 0);
2833
2834 /* If the operand is a SUBREG, extract
2835 the REG or MEM (or maybe even a constant) within.
2836 (Constants can occur as a result of reg_equiv_constant.) */
2837
2838 while (GET_CODE (operand) == SUBREG)
2839 {
2840 offset += SUBREG_WORD (operand);
2841 operand = SUBREG_REG (operand);
2842 /* Force reload if this is a constant or PLUS or if there may
2843 be a problem accessing OPERAND in the outer mode. */
2844 if (CONSTANT_P (operand)
2845 || GET_CODE (operand) == PLUS
2846 /* We must force a reload of paradoxical SUBREGs
2847 of a MEM because the alignment of the inner value
2848 may not be enough to do the outer reference. On
2849 big-endian machines, it may also reference outside
2850 the object.
2851
2852 On machines that extend byte operations and we have a
2853 SUBREG where both the inner and outer modes are no wider
2854 than a word and the inner mode is narrower, is integral,
2855 and gets extended when loaded from memory, combine.c has
2856 made assumptions about the behavior of the machine in such
2857 register access. If the data is, in fact, in memory we
2858 must always load using the size assumed to be in the
2859 register and let the insn do the different-sized
2860 accesses.
2861
2862 This is doubly true if WORD_REGISTER_OPERATIONS. In
2863 this case eliminate_regs has left non-paradoxical
2864 subregs for push_reloads to see. Make sure it does
2865 by forcing the reload.
2866
2867 ??? When is it right at this stage to have a subreg
2868 of a mem that is _not_ to be handled specialy? IMO
2869 those should have been reduced to just a mem. */
2870 || ((GET_CODE (operand) == MEM

--- 12 unchanged lines hidden (view full) ---

2883 && (GET_MODE_SIZE (operand_mode[i])
2884 > GET_MODE_SIZE (GET_MODE (operand)))
2885 && INTEGRAL_MODE_P (GET_MODE (operand))
2886 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2887#endif
2888 )
2889#endif
2890 )
2891 /* Subreg of a hard reg which can't handle the subreg's mode
2892 or which would handle that mode in the wrong number of
2893 registers for subregging to work. */
2894 || (GET_CODE (operand) == REG
2895 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2896 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2897 && (GET_MODE_SIZE (GET_MODE (operand))
2898 > UNITS_PER_WORD)
2899 && ((GET_MODE_SIZE (GET_MODE (operand))
2900 / UNITS_PER_WORD)
2901 != HARD_REGNO_NREGS (REGNO (operand),
2902 GET_MODE (operand))))
2903 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2904 operand_mode[i]))))
2905 force_reload = 1;
2906 }
2907
2908 this_alternative[i] = (int) NO_REGS;
2909 this_alternative_win[i] = 0;
2910 this_alternative_offmemok[i] = 0;
2911 this_alternative_earlyclobber[i] = 0;
2912 this_alternative_matches[i] = -1;
2913
2914 /* An empty constraint or empty alternative
2915 allows anything which matched the pattern. */
2916 if (*p == 0 || *p == ',')
2917 win = 1, badop = 0;
2918
2919 /* Scan this alternative's specs for this operand;
2920 set WIN if the operand fits any letter in this alternative.
2921 Otherwise, clear BADOP if this operand could
2922 fit some letter after reloads,
2923 or set WINREG if this operand could fit after reloads
2924 provided the constraint allows some registers. */
2925
2926 while (*p && (c = *p++) != ',')
2927 switch (c)
2928 {
2929 case '=':
2930 case '+':
2931 case '*':
2932 break;
2933
2934 case '%':
2935 /* The last operand should not be marked commutative. */
2936 if (i != noperands - 1)
2937 commutative = i;
2938 break;
2939
2940 case '?':
2941 reject += 6;
2942 break;
2943
2944 case '!':
2945 reject = 600;
2946 break;
2947
2948 case '#':
2949 /* Ignore rest of this alternative as far as
2950 reloading is concerned. */
2951 while (*p && *p != ',') p++;
2952 break;
2953
2954 case '0':
2955 case '1':
2956 case '2':
2957 case '3':
2958 case '4':
2959 c -= '0';
2960 this_alternative_matches[i] = c;
2961 /* We are supposed to match a previous operand.
2962 If we do, we win if that one did.
2963 If we do not, count both of the operands as losers.
2964 (This is too conservative, since most of the time
2965 only a single reload insn will be needed to make
2966 the two operands win. As a result, this alternative
2967 may be rejected when it is actually desirable.) */
2968 if ((swapped && (c != commutative || i != commutative + 1))
2969 /* If we are matching as if two operands were swapped,
2970 also pretend that operands_match had been computed
2971 with swapped.
2972 But if I is the second of those and C is the first,
2973 don't exchange them, because operands_match is valid
2974 only on one side of its diagonal. */
2975 ? (operands_match
2976 [(c == commutative || c == commutative + 1)
2977 ? 2*commutative + 1 - c : c]
2978 [(i == commutative || i == commutative + 1)
2979 ? 2*commutative + 1 - i : i])
2980 : operands_match[c][i])
2981 {
2982 /* If we are matching a non-offsettable address where an
2983 offsettable address was expected, then we must reject
2984 this combination, because we can't reload it. */
2985 if (this_alternative_offmemok[c]
2986 && GET_CODE (recog_operand[c]) == MEM
2987 && this_alternative[c] == (int) NO_REGS
2988 && ! this_alternative_win[c])
2989 bad = 1;
2990
2991 win = this_alternative_win[c];
2992 }
2993 else
2994 {
2995 /* Operands don't match. */
2996 rtx value;
2997 /* Retroactively mark the operand we had to match
2998 as a loser, if it wasn't already. */
2999 if (this_alternative_win[c])
3000 losers++;
3001 this_alternative_win[c] = 0;
3002 if (this_alternative[c] == (int) NO_REGS)
3003 bad = 1;
3004 /* But count the pair only once in the total badness of
3005 this alternative, if the pair can be a dummy reload. */
3006 value
3007 = find_dummy_reload (recog_operand[i], recog_operand[c],
3008 recog_operand_loc[i], recog_operand_loc[c],
3009 operand_mode[i], operand_mode[c],
3010 this_alternative[c], -1,
3011 this_alternative_earlyclobber[c]);
3012
3013 if (value != 0)
3014 losers--;
3015 }
3016 /* This can be fixed with reloads if the operand
3017 we are supposed to match can be fixed with reloads. */
3018 badop = 0;
3019 this_alternative[i] = this_alternative[c];
3020
3021 /* If we have to reload this operand and some previous
3022 operand also had to match the same thing as this
3023 operand, we don't know how to do that. So reject this
3024 alternative. */
3025 if (! win || force_reload)
3026 for (j = 0; j < i; j++)
3027 if (this_alternative_matches[j]
3028 == this_alternative_matches[i])
3029 badop = 1;
3030
3031 break;
3032
3033 case 'p':
3034 /* All necessary reloads for an address_operand
3035 were handled in find_reloads_address. */
3036 this_alternative[i] = (int) BASE_REG_CLASS;
3037 win = 1;
3038 break;
3039
3040 case 'm':
3041 if (force_reload)
3042 break;
3043 if (GET_CODE (operand) == MEM
3044 || (GET_CODE (operand) == REG

--- 144 unchanged lines hidden (view full) ---

3189 case 'g':
3190 if (! force_reload
3191 /* A PLUS is never a valid operand, but reload can make
3192 it from a register when eliminating registers. */
3193 && GET_CODE (operand) != PLUS
3194 /* A SCRATCH is not a valid operand. */
3195 && GET_CODE (operand) != SCRATCH
3196#ifdef LEGITIMATE_PIC_OPERAND_P
3197 && (! CONSTANT_P (operand)
3198 || ! flag_pic
3199 || LEGITIMATE_PIC_OPERAND_P (operand))
3200#endif
3201 && (GENERAL_REGS == ALL_REGS
3202 || GET_CODE (operand) != REG
3203 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3204 && reg_renumber[REGNO (operand)] < 0)))
3205 win = 1;
3206 /* Drop through into 'r' case */
3207
3208 case 'r':
3209 this_alternative[i]
3210 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3211 goto reg;
3212
3213#ifdef EXTRA_CONSTRAINT
3214 case 'Q':
3215 case 'R':
3216 case 'S':
3217 case 'T':
3218 case 'U':
3219 if (EXTRA_CONSTRAINT (operand, c))
3220 win = 1;
3221 break;
3222#endif
3223
3224 default:
3225 this_alternative[i]
3226 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3227
3228 reg:
3229 if (GET_MODE (operand) == BLKmode)
3230 break;
3231 winreg = 1;
3232 if (GET_CODE (operand) == REG
3233 && reg_fits_class_p (operand, this_alternative[i],
3234 offset, GET_MODE (recog_operand[i])))
3235 win = 1;
3236 break;
3237 }
3238
3239 constraints[i] = p;
3240
3241 /* If this operand could be handled with a reg,
3242 and some reg is allowed, then this operand can be handled. */
3243 if (winreg && this_alternative[i] != (int) NO_REGS)
3244 badop = 0;
3245
3246 /* Record which operands fit this alternative. */
3247 this_alternative_earlyclobber[i] = earlyclobber;
3248 if (win && ! force_reload)
3249 this_alternative_win[i] = 1;
3250 else
3251 {
3252 int const_to_mem = 0;
3253
3254 this_alternative_offmemok[i] = offmemok;
3255 losers++;
3256 if (badop)
3257 bad = 1;
3258 /* Alternative loses if it has no regs for a reg operand. */
3259 if (GET_CODE (operand) == REG
3260 && this_alternative[i] == (int) NO_REGS
3261 && this_alternative_matches[i] < 0)
3262 bad = 1;
3263
3264#if 0
3265 /* If this is a pseudo-register that is set in the previous
3266 insns, there's a good chance that it will already be in a
3267 spill register and we can use that spill register. So
3268 make this case cheaper.
3269
3270 Disabled for egcs. egcs has better inheritance code and
3271 this change causes problems with the improved reload
3272 inheritance code. */
3273 if (GET_CODE (operand) == REG
3274 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3275 && REGNO (operand) == last_output_reload_regno)
3276 reject--;
3277#endif
3278
3279 /* If this is a constant that is reloaded into the desired
3280 class by copying it to memory first, count that as another
3281 reload. This is consistent with other code and is
3282 required to avoid choosing another alternative when
3283 the constant is moved into memory by this function on
3284 an early reload pass. Note that the test here is
3285 precisely the same as in the code below that calls
3286 force_const_mem. */
3287 if (CONSTANT_P (operand)
3288 /* force_const_mem does not accept HIGH. */
3289 && GET_CODE (operand) != HIGH
3290 && ((PREFERRED_RELOAD_CLASS (operand,
3291 (enum reg_class) this_alternative[i])
3292 == NO_REGS)
3293 || no_input_reloads)
3294 && operand_mode[i] != VOIDmode)
3295 {
3296 const_to_mem = 1;
3297 if (this_alternative[i] != (int) NO_REGS)
3298 losers++;
3299 }

--- 9 unchanged lines hidden (view full) ---

3309 (enum reg_class) this_alternative[i])
3310 == NO_REGS))
3311 bad = 1;
3312
3313 /* Alternative loses if it requires a type of reload not
3314 permitted for this insn. We can always reload SCRATCH
3315 and objects with a REG_UNUSED note. */
3316 else if (GET_CODE (operand) != SCRATCH
3317 && modified[i] != RELOAD_READ && no_output_reloads
3318 && ! find_reg_note (insn, REG_UNUSED, operand))
3319 bad = 1;
3320 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3321 && ! const_to_mem)
3322 bad = 1;
3323
3324
3325 /* We prefer to reload pseudos over reloading other things,
3326 since such reloads may be able to be eliminated later.
3327 If we are reloading a SCRATCH, we won't be generating any
3328 insns, just using a register, so it is also preferred.
3329 So bump REJECT in other cases. Don't do this in the
3330 case where we are forcing a constant into memory and
3331 it will then win since we don't want to have a different
3332 alternative match then. */
3333 if (! (GET_CODE (operand) == REG
3334 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3335 && GET_CODE (operand) != SCRATCH
3336 && ! (const_to_mem && constmemok))
3337 reject += 2;
3338
3339 /* Input reloads can be inherited more often than output
3340 reloads can be removed, so penalize output reloads. */
3341 if (operand_type[i] != RELOAD_FOR_INPUT
3342 && GET_CODE (operand) != SCRATCH)
3343 reject++;
3344 }
3345
3346 /* If this operand is a pseudo register that didn't get a hard
3347 reg and this alternative accepts some register, see if the
3348 class that we want is a subset of the preferred class for this
3349 register. If not, but it intersects that class, use the
3350 preferred class instead. If it does not intersect the preferred
3351 class, show that usage of this alternative should be discouraged;
3352 it will be discouraged more still if the register is `preferred
3353 or nothing'. We do this because it increases the chance of
3354 reusing our spill register in a later insn and avoiding a pair

--- 4 unchanged lines hidden (view full) ---

3359
3360 Don't do this for a multiword operand, since it is only a
3361 small win and has the risk of requiring more spill registers,
3362 which could cause a large loss.
3363
3364 Don't do this if the preferred class has only one register
3365 because we might otherwise exhaust the class. */
3366
3367
3368 if (! win && this_alternative[i] != (int) NO_REGS
3369 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3370 && reg_class_size[(int) preferred_class[i]] > 1)
3371 {
3372 if (! reg_class_subset_p (this_alternative[i],
3373 preferred_class[i]))
3374 {
3375 /* Since we don't have a way of forming the intersection,
3376 we just do something special if the preferred class
3377 is a subset of the class we have; that's the most
3378 common case anyway. */
3379 if (reg_class_subset_p (preferred_class[i],
3380 this_alternative[i]))
3381 this_alternative[i] = (int) preferred_class[i];
3382 else
3383 reject += (2 + 2 * pref_or_nothing[i]);
3384 }
3385 }
3386 }
3387
3388 /* Now see if any output operands that are marked "earlyclobber"
3389 in this alternative conflict with any input operands
3390 or any memory addresses. */
3391
3392 for (i = 0; i < noperands; i++)
3393 if (this_alternative_earlyclobber[i]
3394 && this_alternative_win[i])
3395 {
3396 struct decomposition early_data;
3397
3398 early_data = decompose (recog_operand[i]);
3399
3400 if (modified[i] == RELOAD_READ)
3401 abort ();
3402
3403 if (this_alternative[i] == NO_REGS)
3404 {
3405 this_alternative_earlyclobber[i] = 0;
3406 if (this_insn_is_asm)
3407 error_for_asm (this_insn,
3408 "`&' constraint used with no register class");
3409 else
3410 abort ();
3411 }
3412
3413 for (j = 0; j < noperands; j++)
3414 /* Is this an input operand or a memory ref? */
3415 if ((GET_CODE (recog_operand[j]) == MEM
3416 || modified[j] != RELOAD_WRITE)
3417 && j != i
3418 /* Ignore things like match_operator operands. */
3419 && *recog_constraints[j] != 0
3420 /* Don't count an input operand that is constrained to match
3421 the early clobber operand. */
3422 && ! (this_alternative_matches[j] == i
3423 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3424 /* Is it altered by storing the earlyclobber operand? */
3425 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3426 {
3427 /* If the output is in a single-reg class,
3428 it's costly to reload it, so reload the input instead. */
3429 if (reg_class_size[this_alternative[i]] == 1
3430 && (GET_CODE (recog_operand[j]) == REG
3431 || GET_CODE (recog_operand[j]) == SUBREG))
3432 {
3433 losers++;
3434 this_alternative_win[j] = 0;
3435 }
3436 else
3437 break;
3438 }
3439 /* If an earlyclobber operand conflicts with something,
3440 it must be reloaded, so request this and count the cost. */
3441 if (j != noperands)
3442 {
3443 losers++;
3444 this_alternative_win[i] = 0;
3445 for (j = 0; j < noperands; j++)
3446 if (this_alternative_matches[j] == i
3447 && this_alternative_win[j])
3448 {
3449 this_alternative_win[j] = 0;
3450 losers++;
3451 }
3452 }
3453 }
3454
3455 /* If one alternative accepts all the operands, no reload required,
3456 choose that alternative; don't consider the remaining ones. */
3457 if (losers == 0)
3458 {
3459 /* Unswap these so that they are never swapped at `finish'. */
3460 if (commutative >= 0)
3461 {
3462 recog_operand[commutative] = substed_operand[commutative];
3463 recog_operand[commutative + 1]
3464 = substed_operand[commutative + 1];
3465 }
3466 for (i = 0; i < noperands; i++)
3467 {
3468 goal_alternative_win[i] = 1;
3469 goal_alternative[i] = this_alternative[i];
3470 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3471 goal_alternative_matches[i] = this_alternative_matches[i];
3472 goal_alternative_earlyclobber[i]
3473 = this_alternative_earlyclobber[i];
3474 }
3475 goal_alternative_number = this_alternative_number;
3476 goal_alternative_swapped = swapped;

--- 11 unchanged lines hidden (view full) ---

3488 and it needs less reloading than the others checked so far,
3489 record it as the chosen goal for reloading. */
3490 if (! bad && best > losers)
3491 {
3492 for (i = 0; i < noperands; i++)
3493 {
3494 goal_alternative[i] = this_alternative[i];
3495 goal_alternative_win[i] = this_alternative_win[i];
3496 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3497 goal_alternative_matches[i] = this_alternative_matches[i];
3498 goal_alternative_earlyclobber[i]
3499 = this_alternative_earlyclobber[i];
3500 }
3501 goal_alternative_swapped = swapped;
3502 best = losers;
3503 goal_alternative_number = this_alternative_number;

--- 10 unchanged lines hidden (view full) ---

3514 If we have just tried the alternatives the second time,
3515 return operands to normal and drop through. */
3516
3517 if (commutative >= 0)
3518 {
3519 swapped = !swapped;
3520 if (swapped)
3521 {
3522 register enum reg_class tclass;
3523 register int t;
3524
3525 recog_operand[commutative] = substed_operand[commutative + 1];
3526 recog_operand[commutative + 1] = substed_operand[commutative];
3527
3528 tclass = preferred_class[commutative];
3529 preferred_class[commutative] = preferred_class[commutative + 1];
3530 preferred_class[commutative + 1] = tclass;
3531
3532 t = pref_or_nothing[commutative];
3533 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3534 pref_or_nothing[commutative + 1] = t;
3535
3536 bcopy ((char *) recog_constraints, (char *) constraints,
3537 noperands * sizeof (char *));
3538 goto try_swapped;
3539 }
3540 else
3541 {
3542 recog_operand[commutative] = substed_operand[commutative];
3543 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3544 }
3545 }
3546
3547 /* The operands don't meet the constraints.
3548 goal_alternative describes the alternative
3549 that we could reach by reloading the fewest operands.
3550 Reload so as to fit it. */
3551
3552 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3553 {
3554 /* No alternative works with reloads?? */
3555 if (insn_code_number >= 0)
3556 fatal_insn ("Unable to generate reloads for:", insn);
3557 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3558 /* Avoid further trouble with this insn. */
3559 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3560 n_reloads = 0;
3561 return 0;
3562 }
3563
3564 /* Jump to `finish' from above if all operands are valid already.
3565 In that case, goal_alternative_win is all 1. */
3566 finish:
3567
3568 /* Right now, for any pair of operands I and J that are required to match,
3569 with I < J,
3570 goal_alternative_matches[J] is I.
3571 Set up goal_alternative_matched as the inverse function:
3572 goal_alternative_matched[I] = J. */
3573
3574 for (i = 0; i < noperands; i++)
3575 goal_alternative_matched[i] = -1;
3576
3577 for (i = 0; i < noperands; i++)
3578 if (! goal_alternative_win[i]
3579 && goal_alternative_matches[i] >= 0)
3580 goal_alternative_matched[goal_alternative_matches[i]] = i;
3581
3582 /* If the best alternative is with operands 1 and 2 swapped,
3583 consider them swapped before reporting the reloads. Update the
3584 operand numbers of any reloads already pushed. */
3585
3586 if (goal_alternative_swapped)
3587 {
3588 register rtx tem;
3589
3590 tem = substed_operand[commutative];
3591 substed_operand[commutative] = substed_operand[commutative + 1];
3592 substed_operand[commutative + 1] = tem;
3593 tem = recog_operand[commutative];
3594 recog_operand[commutative] = recog_operand[commutative + 1];
3595 recog_operand[commutative + 1] = tem;
3596 tem = *recog_operand_loc[commutative];
3597 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3598 *recog_operand_loc[commutative+1] = tem;
3599
3600 for (i = 0; i < n_reloads; i++)
3601 {
3602 if (reload_opnum[i] == commutative)
3603 reload_opnum[i] = commutative + 1;
3604 else if (reload_opnum[i] == commutative + 1)
3605 reload_opnum[i] = commutative;
3606 }
3607 }
3608
3609 for (i = 0; i < noperands; i++)
3610 {
3611 operand_reloadnum[i] = -1;
3612
3613 /* If this is an earlyclobber operand, we need to widen the scope.
3614 The reload must remain valid from the start of the insn being
3615 reloaded until after the operand is stored into its destination.
3616 We approximate this with RELOAD_OTHER even though we know that we
3617 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3618
3619 One special case that is worth checking is when we have an
3620 output that is earlyclobber but isn't used past the insn (typically
3621 a SCRATCH). In this case, we only need have the reload live
3622 through the insn itself, but not for any of our input or output
3623 reloads.
3624 But we must not accidentally narrow the scope of an existing
3625 RELOAD_OTHER reload - leave these alone.
3626
3627 In any case, anything needed to address this operand can remain
3628 however they were previously categorized. */
3629
3630 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3631 operand_type[i]
3632 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3633 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3634 }
3635
3636 /* Any constants that aren't allowed and can't be reloaded
3637 into registers are here changed into memory references. */
3638 for (i = 0; i < noperands; i++)
3639 if (! goal_alternative_win[i]
3640 && CONSTANT_P (recog_operand[i])
3641 /* force_const_mem does not accept HIGH. */
3642 && GET_CODE (recog_operand[i]) != HIGH
3643 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3644 (enum reg_class) goal_alternative[i])
3645 == NO_REGS)
3646 || no_input_reloads)
3647 && operand_mode[i] != VOIDmode)
3648 {
3649 substed_operand[i] = recog_operand[i]
3650 = find_reloads_toplev (force_const_mem (operand_mode[i],
3651 recog_operand[i]),
3652 i, address_type[i], ind_levels, 0, insn);
3653 if (alternative_allows_memconst (recog_constraints[i],
3654 goal_alternative_number))
3655 goal_alternative_win[i] = 1;
3656 }
3657
3658 /* Record the values of the earlyclobber operands for the caller. */
3659 if (goal_earlyclobber)
3660 for (i = 0; i < noperands; i++)
3661 if (goal_alternative_earlyclobber[i])
3662 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3663
3664 /* Now record reloads for all the operands that need them. */
3665 last_output_reload_regno = -1;
3666 for (i = 0; i < noperands; i++)
3667 if (! goal_alternative_win[i])
3668 {
3669 /* Operands that match previous ones have already been handled. */
3670 if (goal_alternative_matches[i] >= 0)
3671 ;
3672 /* Handle an operand with a nonoffsettable address
3673 appearing where an offsettable address will do
3674 by reloading the address into a base register.
3675
3676 ??? We can also do this when the operand is a register and
3677 reg_equiv_mem is not offsettable, but this is a bit tricky,
3678 so we don't bother with it. It may not be worth doing. */
3679 else if (goal_alternative_matched[i] == -1
3680 && goal_alternative_offmemok[i]
3681 && GET_CODE (recog_operand[i]) == MEM)
3682 {
3683 operand_reloadnum[i]
3684 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3685 &XEXP (recog_operand[i], 0), NULL_PTR,
3686 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3687 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3688 reload_inc[operand_reloadnum[i]]
3689 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3690
3691 /* If this operand is an output, we will have made any
3692 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3693 now we are treating part of the operand as an input, so
3694 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3695
3696 if (modified[i] == RELOAD_WRITE)
3697 {
3698 for (j = 0; j < n_reloads; j++)
3699 {
3700 if (reload_opnum[j] == i)
3701 {
3702 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3703 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3704 else if (reload_when_needed[j]
3705 == RELOAD_FOR_OUTADDR_ADDRESS)
3706 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3707 }
3708 }
3709 }
3710 }
3711 else if (goal_alternative_matched[i] == -1)
3712 {
3713 operand_reloadnum[i]
3714 = push_reload ((modified[i] != RELOAD_WRITE
3715 ? recog_operand[i] : 0),
3716 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3717 (modified[i] != RELOAD_WRITE
3718 ? recog_operand_loc[i] : 0),
3719 (modified[i] != RELOAD_READ
3720 ? recog_operand_loc[i] : 0),
3721 (enum reg_class) goal_alternative[i],
3722 (modified[i] == RELOAD_WRITE
3723 ? VOIDmode : operand_mode[i]),
3724 (modified[i] == RELOAD_READ
3725 ? VOIDmode : operand_mode[i]),
3726 (insn_code_number < 0 ? 0
3727 : insn_operand_strict_low[insn_code_number][i]),
3728 0, i, operand_type[i]);
3729 if (modified[i] != RELOAD_READ
3730 && GET_CODE (recog_operand[i]) == REG)
3731 last_output_reload_regno = REGNO (recog_operand[i]);
3732 }
3733 /* In a matching pair of operands, one must be input only
3734 and the other must be output only.
3735 Pass the input operand as IN and the other as OUT. */
3736 else if (modified[i] == RELOAD_READ
3737 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3738 {
3739 operand_reloadnum[i]
3740 = push_reload (recog_operand[i],
3741 recog_operand[goal_alternative_matched[i]],
3742 recog_operand_loc[i],
3743 recog_operand_loc[goal_alternative_matched[i]],
3744 (enum reg_class) goal_alternative[i],
3745 operand_mode[i],
3746 operand_mode[goal_alternative_matched[i]],
3747 0, 0, i, RELOAD_OTHER);
3748 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3749 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3750 last_output_reload_regno
3751 = REGNO (recog_operand[goal_alternative_matched[i]]);
3752 }
3753 else if (modified[i] == RELOAD_WRITE
3754 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3755 {
3756 operand_reloadnum[goal_alternative_matched[i]]
3757 = push_reload (recog_operand[goal_alternative_matched[i]],
3758 recog_operand[i],
3759 recog_operand_loc[goal_alternative_matched[i]],
3760 recog_operand_loc[i],
3761 (enum reg_class) goal_alternative[i],
3762 operand_mode[goal_alternative_matched[i]],
3763 operand_mode[i],
3764 0, 0, i, RELOAD_OTHER);
3765 operand_reloadnum[i] = output_reloadnum;
3766 if (GET_CODE (recog_operand[i]) == REG)
3767 last_output_reload_regno = REGNO (recog_operand[i]);
3768 }
3769 else if (insn_code_number >= 0)
3770 abort ();
3771 else
3772 {
3773 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3774 /* Avoid further trouble with this insn. */
3775 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3776 n_reloads = 0;
3777 return 0;
3778 }
3779 }
3780 else if (goal_alternative_matched[i] < 0
3781 && goal_alternative_matches[i] < 0
3782 && optimize)
3783 {
3784 /* For each non-matching operand that's a MEM or a pseudo-register
3785 that didn't get a hard register, make an optional reload.
3786 This may get done even if the insn needs no reloads otherwise. */
3787
3788 rtx operand = recog_operand[i];
3789
3790 while (GET_CODE (operand) == SUBREG)
3791 operand = XEXP (operand, 0);
3792 if ((GET_CODE (operand) == MEM
3793 || (GET_CODE (operand) == REG
3794 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3795 /* If this is only for an output, the optional reload would not
3796 actually cause us to use a register now, just note that
3797 something is stored here. */
3798 && ((enum reg_class) goal_alternative[i] != NO_REGS
3799 || modified[i] == RELOAD_WRITE)
3800 && ! no_input_reloads
3801 /* An optional output reload might allow to delete INSN later.
3802 We mustn't make in-out reloads on insns that are not permitted
3803 output reloads.
3804 If this is an asm, we can't delete it; we must not even call
3805 push_reload for an optional output reload in this case,
3806 because we can't be sure that the constraint allows a register,
3807 and push_reload verifies the constraints for asms. */
3808 && (modified[i] == RELOAD_READ
3809 || (! no_output_reloads && ! this_insn_is_asm)))
3810 operand_reloadnum[i]
3811 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3812 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3813 (modified[i] != RELOAD_WRITE
3814 ? recog_operand_loc[i] : 0),
3815 (modified[i] != RELOAD_READ
3816 ? recog_operand_loc[i] : 0),
3817 (enum reg_class) goal_alternative[i],
3818 (modified[i] == RELOAD_WRITE
3819 ? VOIDmode : operand_mode[i]),
3820 (modified[i] == RELOAD_READ
3821 ? VOIDmode : operand_mode[i]),
3822 (insn_code_number < 0 ? 0
3823 : insn_operand_strict_low[insn_code_number][i]),
3824 1, i, operand_type[i]);
3825 /* If a memory reference remains (either as a MEM or a pseudo that
3826 did not get a hard register), yet we can't make an optional
3827 reload, check if this is actually a pseudo register reference;
3828 we then need to emit a USE and/or a CLOBBER so that reload
3829 inheritance will do the right thing. */
3830 else if (replace
3831 && (GET_CODE (operand) == MEM
3832 || (GET_CODE (operand) == REG
3833 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3834 && reg_renumber [REGNO (operand)] < 0)))
3835 {
3836 operand = *recog_operand_loc[i];
3837
3838 while (GET_CODE (operand) == SUBREG)
3839 operand = XEXP (operand, 0);
3840 if (GET_CODE (operand) == REG)
3841 {
3842 if (modified[i] != RELOAD_WRITE)
3843 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3844 if (modified[i] != RELOAD_READ)
3845 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3846 }
3847 }
3848 }
3849 else if (goal_alternative_matches[i] >= 0
3850 && goal_alternative_win[goal_alternative_matches[i]]
3851 && modified[i] == RELOAD_READ
3852 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3853 && ! no_input_reloads && ! no_output_reloads
3854 && optimize)
3855 {
3856 /* Similarly, make an optional reload for a pair of matching
3857 objects that are in MEM or a pseudo that didn't get a hard reg. */
3858
3859 rtx operand = recog_operand[i];
3860
3861 while (GET_CODE (operand) == SUBREG)
3862 operand = XEXP (operand, 0);
3863 if ((GET_CODE (operand) == MEM
3864 || (GET_CODE (operand) == REG
3865 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3866 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3867 != NO_REGS))
3868 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3869 = push_reload (recog_operand[goal_alternative_matches[i]],
3870 recog_operand[i],
3871 recog_operand_loc[goal_alternative_matches[i]],
3872 recog_operand_loc[i],
3873 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3874 operand_mode[goal_alternative_matches[i]],
3875 operand_mode[i],
3876 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3877 }
3878
3879 /* Perform whatever substitutions on the operands we are supposed
3880 to make due to commutativity or replacement of registers
3881 with equivalent constants or memory slots. */
3882
3883 for (i = 0; i < noperands; i++)
3884 {
3885 /* We only do this on the last pass through reload, because it is
3886 possible for some data (like reg_equiv_address) to be changed during
3887 later passes. Moreover, we loose the opportunity to get a useful
3888 reload_{in,out}_reg when we do these replacements. */
3889
3890 if (replace)
3891 {
3892 rtx substitution = substed_operand[i];
3893
3894 *recog_operand_loc[i] = substitution;
3895
3896 /* If we're replacing an operand with a LABEL_REF, we need
3897 to make sure that there's a REG_LABEL note attached to
3898 this instruction. */
3899 if (GET_CODE (insn) != JUMP_INSN
3900 && GET_CODE (substitution) == LABEL_REF
3901 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3902 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3903 XEXP (substitution, 0),
3904 REG_NOTES (insn));
3905 }
3906 else
3907 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3908 }
3909
3910 /* If this insn pattern contains any MATCH_DUP's, make sure that
3911 they will be substituted if the operands they match are substituted.
3912 Also do now any substitutions we already did on the operands.
3913
3914 Don't do this if we aren't making replacements because we might be
3915 propagating things allocated by frame pointer elimination into places
3916 it doesn't expect. */
3917
3918 if (insn_code_number >= 0 && replace)
3919 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3920 {
3921 int opno = recog_dup_num[i];
3922 *recog_dup_loc[i] = *recog_operand_loc[opno];
3923 if (operand_reloadnum[opno] >= 0)
3924 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3925 insn_operand_mode[insn_code_number][opno]);
3926 }
3927
3928#if 0
3929 /* This loses because reloading of prior insns can invalidate the equivalence
3930 (or at least find_equiv_reg isn't smart enough to find it any more),
3931 causing this insn to need more reload regs than it needed before.
3932 It may be too late to make the reload regs available.
3933 Now this optimization is done safely in choose_reload_regs. */
3934
3935 /* For each reload of a reg into some other class of reg,
3936 search for an existing equivalent reg (same value now) in the right class.
3937 We can use it as long as we don't need to change its contents. */
3938 for (i = 0; i < n_reloads; i++)
3939 if (reload_reg_rtx[i] == 0
3940 && reload_in[i] != 0
3941 && GET_CODE (reload_in[i]) == REG
3942 && reload_out[i] == 0)
3943 {
3944 reload_reg_rtx[i]
3945 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3946 static_reload_reg_p, 0, reload_inmode[i]);
3947 /* Prevent generation of insn to load the value
3948 because the one we found already has the value. */
3949 if (reload_reg_rtx[i])
3950 reload_in[i] = reload_reg_rtx[i];
3951 }
3952#endif
3953
3954 /* Perhaps an output reload can be combined with another
3955 to reduce needs by one. */
3956 if (!goal_earlyclobber)
3957 combine_reloads ();
3958
3959 /* If we have a pair of reloads for parts of an address, they are reloading
3960 the same object, the operands themselves were not reloaded, and they
3961 are for two operands that are supposed to match, merge the reloads and
3962 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3963
3964 for (i = 0; i < n_reloads; i++)
3965 {
3966 int k;
3967
3968 for (j = i + 1; j < n_reloads; j++)
3969 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3970 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3971 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3972 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3973 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3974 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3975 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3976 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3977 && rtx_equal_p (reload_in[i], reload_in[j])
3978 && (operand_reloadnum[reload_opnum[i]] < 0
3979 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3980 && (operand_reloadnum[reload_opnum[j]] < 0
3981 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3982 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3983 || (goal_alternative_matches[reload_opnum[j]]
3984 == reload_opnum[i])))
3985 {
3986 for (k = 0; k < n_replacements; k++)
3987 if (replacements[k].what == j)
3988 replacements[k].what = i;
3989
3990 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3991 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3992 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3993 else
3994 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3995 reload_in[j] = 0;
3996 }
3997 }
3998
3999 /* Scan all the reloads and update their type.
4000 If a reload is for the address of an operand and we didn't reload
4001 that operand, change the type. Similarly, change the operand number
4002 of a reload when two operands match. If a reload is optional, treat it
4003 as though the operand isn't reloaded.
4004
4005 ??? This latter case is somewhat odd because if we do the optional
4006 reload, it means the object is hanging around. Thus we need only
4007 do the address reload if the optional reload was NOT done.
4008
4009 Change secondary reloads to be the address type of their operand, not
4010 the normal type.
4011
4012 If an operand's reload is now RELOAD_OTHER, change any
4013 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4014 RELOAD_FOR_OTHER_ADDRESS. */
4015
4016 for (i = 0; i < n_reloads; i++)
4017 {
4018 if (reload_secondary_p[i]
4019 && reload_when_needed[i] == operand_type[reload_opnum[i]])
4020 reload_when_needed[i] = address_type[reload_opnum[i]];
4021
4022 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4023 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4024 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4025 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4026 && (operand_reloadnum[reload_opnum[i]] < 0
4027 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
4028 {
4029 /* If we have a secondary reload to go along with this reload,
4030 change its type to RELOAD_FOR_OPADDR_ADDR. */
4031
4032 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4033 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4034 && reload_secondary_in_reload[i] != -1)
4035 {
4036 int secondary_in_reload = reload_secondary_in_reload[i];
4037
4038 reload_when_needed[secondary_in_reload]
4039 = RELOAD_FOR_OPADDR_ADDR;
4040
4041 /* If there's a tertiary reload we have to change it also. */
4042 if (secondary_in_reload > 0
4043 && reload_secondary_in_reload[secondary_in_reload] != -1)
4044 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
4045 = RELOAD_FOR_OPADDR_ADDR;
4046 }
4047
4048 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4049 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4050 && reload_secondary_out_reload[i] != -1)
4051 {
4052 int secondary_out_reload = reload_secondary_out_reload[i];
4053
4054 reload_when_needed[secondary_out_reload]
4055 = RELOAD_FOR_OPADDR_ADDR;
4056
4057 /* If there's a tertiary reload we have to change it also. */
4058 if (secondary_out_reload
4059 && reload_secondary_out_reload[secondary_out_reload] != -1)
4060 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4061 = RELOAD_FOR_OPADDR_ADDR;
4062 }
4063
4064 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4065 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4066 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4067 else
4068 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4069 }
4070
4071 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4072 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4073 && operand_reloadnum[reload_opnum[i]] >= 0
4074 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4075 == RELOAD_OTHER))
4076 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4077
4078 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4079 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4080 }
4081
4082 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4083 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4084 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4085
4086 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4087 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a

--- 13 unchanged lines hidden (view full) ---

4101 We can reduce the register pressure by exploiting that a
4102 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4103 does not conflict with any of them, if it is only used for the first of
4104 the RELOAD_FOR_X_ADDRESS reloads. */
4105 {
4106 int first_op_addr_num = -2;
4107 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4108 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4109 int need_change= 0;
4110 /* We use last_op_addr_reload and the contents of the above arrays
4111 first as flags - -2 means no instance encountered, -1 means exactly
4112 one instance encountered.
4113 If more than one instance has been encountered, we store the reload
4114 number of the first reload of the kind in question; reload numbers
4115 are known to be non-negative. */
4116 for (i = 0; i < noperands; i++)
4117 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4118 for (i = n_reloads - 1; i >= 0; i--)
4119 {
4120 switch (reload_when_needed[i])
4121 {
4122 case RELOAD_FOR_OPERAND_ADDRESS:
4123 if (++first_op_addr_num >= 0)
4124 {
4125 first_op_addr_num = i;
4126 need_change = 1;
4127 }
4128 break;
4129 case RELOAD_FOR_INPUT_ADDRESS:
4130 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4131 {
4132 first_inpaddr_num[reload_opnum[i]] = i;
4133 need_change = 1;
4134 }
4135 break;
4136 case RELOAD_FOR_OUTPUT_ADDRESS:
4137 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4138 {
4139 first_outpaddr_num[reload_opnum[i]] = i;
4140 need_change = 1;
4141 }
4142 break;
4143 default:
4144 break;
4145 }
4146 }
4147
4148 if (need_change)
4149 {
4150 for (i = 0; i < n_reloads; i++)
4151 {
4152 int first_num, type;
4153
4154 switch (reload_when_needed[i])
4155 {
4156 case RELOAD_FOR_OPADDR_ADDR:
4157 first_num = first_op_addr_num;
4158 type = RELOAD_FOR_OPERAND_ADDRESS;
4159 break;
4160 case RELOAD_FOR_INPADDR_ADDRESS:
4161 first_num = first_inpaddr_num[reload_opnum[i]];
4162 type = RELOAD_FOR_INPUT_ADDRESS;
4163 break;
4164 case RELOAD_FOR_OUTADDR_ADDRESS:
4165 first_num = first_outpaddr_num[reload_opnum[i]];
4166 type = RELOAD_FOR_OUTPUT_ADDRESS;
4167 break;
4168 default:
4169 continue;
4170 }
4171 if (first_num < 0)
4172 continue;
4173 else if (i > first_num)
4174 reload_when_needed[i] = type;
4175 else
4176 {
4177 /* Check if the only TYPE reload that uses reload I is
4178 reload FIRST_NUM. */
4179 for (j = n_reloads - 1; j > first_num; j--)
4180 {
4181 if (reload_when_needed[j] == type
4182 && (reload_secondary_p[i]
4183 ? reload_secondary_in_reload[j] == i
4184 : reg_mentioned_p (reload_in[i], reload_in[j])))
4185 {
4186 reload_when_needed[i] = type;
4187 break;
4188 }
4189 }
4190 }
4191 }
4192 }
4193 }
4194
4195 /* See if we have any reloads that are now allowed to be merged
4196 because we've changed when the reload is needed to
4197 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4198 check for the most common cases. */
4199
4200 for (i = 0; i < n_reloads; i++)
4201 if (reload_in[i] != 0 && reload_out[i] == 0
4202 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4203 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4204 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4205 for (j = 0; j < n_reloads; j++)
4206 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4207 && reload_when_needed[j] == reload_when_needed[i]
4208 && MATCHES (reload_in[i], reload_in[j])
4209 && reload_reg_class[i] == reload_reg_class[j]
4210 && !reload_nocombine[i] && !reload_nocombine[j]
4211 && reload_reg_rtx[i] == reload_reg_rtx[j])
4212 {
4213 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4214 transfer_replacements (i, j);
4215 reload_in[j] = 0;
4216 }
4217
4218 /* Set which reloads must use registers not used in any group. Start
4219 with those that conflict with a group and then include ones that
4220 conflict with ones that are already known to conflict with a group. */
4221
4222 changed = 0;
4223 for (i = 0; i < n_reloads; i++)
4224 {
4225 enum machine_mode mode = reload_inmode[i];
4226 enum reg_class class = reload_reg_class[i];
4227 int size;
4228
4229 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4230 mode = reload_outmode[i];
4231 size = CLASS_MAX_NREGS (class, mode);
4232
4233 if (size == 1)
4234 for (j = 0; j < n_reloads; j++)
4235 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4236 (GET_MODE_SIZE (reload_outmode[j])
4237 > GET_MODE_SIZE (reload_inmode[j]))
4238 ? reload_outmode[j] : reload_inmode[j])
4239 > 1)
4240 && !reload_optional[j]
4241 && (reload_in[j] != 0 || reload_out[j] != 0
4242 || reload_secondary_p[j])
4243 && reloads_conflict (i, j)
4244 && reg_classes_intersect_p (class, reload_reg_class[j]))
4245 {
4246 reload_nongroup[i] = 1;
4247 changed = 1;
4248 break;
4249 }
4250 }
4251
4252 while (changed)
4253 {
4254 changed = 0;
4255
4256 for (i = 0; i < n_reloads; i++)
4257 {
4258 enum machine_mode mode = reload_inmode[i];
4259 enum reg_class class = reload_reg_class[i];
4260 int size;
4261
4262 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4263 mode = reload_outmode[i];
4264 size = CLASS_MAX_NREGS (class, mode);
4265
4266 if (! reload_nongroup[i] && size == 1)
4267 for (j = 0; j < n_reloads; j++)
4268 if (reload_nongroup[j]
4269 && reloads_conflict (i, j)
4270 && reg_classes_intersect_p (class, reload_reg_class[j]))
4271 {
4272 reload_nongroup[i] = 1;
4273 changed = 1;
4274 break;
4275 }
4276 }
4277 }
4278
4279#else /* no REGISTER_CONSTRAINTS */
4280 int noperands;
4281 int insn_code_number;
4282 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4283 register int i;
4284 rtx body = PATTERN (insn);
4285 int retval = 0;
4286
4287 n_reloads = 0;
4288 n_replacements = 0;
4289 n_earlyclobbers = 0;
4290 replace_reloads = replace;
4291 this_insn = insn;
4292
4293 extract_insn (insn);
4294
4295 noperands = reload_n_operands = recog_n_operands;
4296
4297 /* Return if the insn needs no reload processing. */
4298 if (noperands == 0)
4299 return;
4300
4301 for (i = 0; i < noperands; i++)
4302 {
4303 register RTX_CODE code = GET_CODE (recog_operand[i]);
4304 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4305
4306 if (insn_code_number >= 0)
4307 if (insn_operand_address_p[insn_code_number][i])
4308 find_reloads_address (VOIDmode, NULL_PTR,
4309 recog_operand[i], recog_operand_loc[i],
4310 i, RELOAD_FOR_INPUT, ind_levels, insn);
4311
4312 /* In these cases, we can't tell if the operand is an input
4313 or an output, so be conservative. In practice it won't be
4314 problem. */
4315
4316 if (code == MEM)
4317 find_reloads_address (GET_MODE (recog_operand[i]),
4318 recog_operand_loc[i],
4319 XEXP (recog_operand[i], 0),
4320 &XEXP (recog_operand[i], 0),
4321 i, RELOAD_OTHER, ind_levels, insn);
4322 if (code == SUBREG)
4323 recog_operand[i] = *recog_operand_loc[i]
4324 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4325 ind_levels, is_set_dest);
4326 if (code == REG)
4327 {
4328 register int regno = REGNO (recog_operand[i]);
4329 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4330 recog_operand[i] = *recog_operand_loc[i]
4331 = reg_equiv_constant[regno];
4332#if 0 /* This might screw code in reload1.c to delete prior output-reload
4333 that feeds this insn. */
4334 if (reg_equiv_mem[regno] != 0)
4335 recog_operand[i] = *recog_operand_loc[i]
4336 = reg_equiv_mem[regno];
4337#endif
4338 }
4339 }
4340
4341 /* Perhaps an output reload can be combined with another
4342 to reduce needs by one. */
4343 if (!goal_earlyclobber)
4344 combine_reloads ();
4345#endif /* no REGISTER_CONSTRAINTS */
4346 return retval;
4347}
4348
4349/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4350 accepts a memory operand with constant address. */
4351
4352static int
4353alternative_allows_memconst (constraint, altnum)
4354 const char *constraint;
4355 int altnum;
4356{
4357 register int c;
4358 /* Skip alternatives before the one requested. */
4359 while (altnum > 0)
4360 {
4361 while (*constraint++ != ',');
4362 altnum--;
4363 }
4364 /* Scan the requested alternative for 'm' or 'o'.
4365 If one of them is present, this alternative accepts memory constants. */

--- 15 unchanged lines hidden (view full) ---

4381
4382 OPNUM and TYPE identify the purpose of the reload.
4383
4384 IS_SET_DEST is true if X is the destination of a SET, which is not
4385 appropriate to be replaced by a constant.
4386
4387 INSN, if nonzero, is the insn in which we do the reload. It is used
4388 to determine if we may generate output reloads, and where to put USEs
4389 for pseudos that we have to replace with stack slots. */
4390
4391static rtx
4392find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4393 rtx x;
4394 int opnum;
4395 enum reload_type type;
4396 int ind_levels;
4397 int is_set_dest;
4398 rtx insn;
4399{
4400 register RTX_CODE code = GET_CODE (x);
4401
4402 register char *fmt = GET_RTX_FORMAT (code);
4403 register int i;
4404 int copied;
4405
4406 if (code == REG)
4407 {
4408 /* This code is duplicated for speed in find_reloads. */
4409 register int regno = REGNO (x);
4410 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4411 x = reg_equiv_constant[regno];
4412#if 0
4413/* This creates (subreg (mem...)) which would cause an unnecessary
4414 reload of the mem. */
4415 else if (reg_equiv_mem[regno] != 0)
4416 x = reg_equiv_mem[regno];
4417#endif
4418 else if (reg_equiv_memory_loc[regno]
4419 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4420 {
4421 rtx mem = make_memloc (x, regno);
4422 if (reg_equiv_address[regno]
4423 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4424 {
4425 /* If this is not a toplevel operand, find_reloads doesn't see
4426 this substitution. We have to emit a USE of the pseudo so
4427 that delete_output_reload can see it. */
4428 if (replace_reloads && recog_operand[opnum] != x)
4429 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4430 x = mem;
4431 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4432 opnum, type, ind_levels, insn);
4433 }
4434 }
4435 return x;
4436 }
4437 if (code == MEM)
4438 {
4439 rtx tem = x;
4440 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4441 opnum, type, ind_levels, insn);
4442 return tem;
4443 }
4444
4445 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4446 {
4447 /* Check for SUBREG containing a REG that's equivalent to a constant.
4448 If the constant has a known value, truncate it right now.
4449 Similarly if we are extracting a single-word of a multi-word
4450 constant. If the constant is symbolic, allow it to be substituted
4451 normally. push_reload will strip the subreg later. If the
4452 constant is VOIDmode, abort because we will lose the mode of
4453 the register (this should never happen because one of the cases
4454 above should handle it). */
4455
4456 register int regno = REGNO (SUBREG_REG (x));
4457 rtx tem;
4458
4459 if (subreg_lowpart_p (x)
4460 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4461 && reg_equiv_constant[regno] != 0
4462 && (tem = gen_lowpart_common (GET_MODE (x),
4463 reg_equiv_constant[regno])) != 0)
4464 return tem;
4465
4466 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4467 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4468 && reg_equiv_constant[regno] != 0
4469 && (tem = operand_subword (reg_equiv_constant[regno],
4470 SUBREG_WORD (x), 0,
4471 GET_MODE (SUBREG_REG (x)))) != 0)
4472 {
4473 /* TEM is now a word sized constant for the bits from X that
4474 we wanted. However, TEM may be the wrong representation.
4475
4476 Use gen_lowpart_common to convert a CONST_INT into a
4477 CONST_DOUBLE and vice versa as needed according to by the mode
4478 of the SUBREG. */

--- 8 unchanged lines hidden (view full) ---

4487 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4488 a 32 bit target. We still can - and have to - handle this
4489 for non-paradoxical subregs of CONST_INTs. */
4490 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4491 && reg_equiv_constant[regno] != 0
4492 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4493 && (GET_MODE_SIZE (GET_MODE (x))
4494 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4495 {
4496 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4497 if (WORDS_BIG_ENDIAN)
4498 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4499 - GET_MODE_BITSIZE (GET_MODE (x))
4500 - shift);
4501 /* Here we use the knowledge that CONST_INTs have a
4502 HOST_WIDE_INT field. */
4503 if (shift >= HOST_BITS_PER_WIDE_INT)
4504 shift = HOST_BITS_PER_WIDE_INT - 1;
4505 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4506 }
4507
4508 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4509 && reg_equiv_constant[regno] != 0
4510 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4511 abort ();
4512
4513 /* If the subreg contains a reg that will be converted to a mem,
4514 convert the subreg to a narrower memref now.

--- 10 unchanged lines hidden (view full) ---

4525
4526 else if (regno >= FIRST_PSEUDO_REGISTER
4527#ifdef LOAD_EXTEND_OP
4528 && (GET_MODE_SIZE (GET_MODE (x))
4529 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4530#endif
4531 && (reg_equiv_address[regno] != 0
4532 || (reg_equiv_mem[regno] != 0
4533 && (! strict_memory_address_p (GET_MODE (x),
4534 XEXP (reg_equiv_mem[regno], 0))
4535 || ! offsettable_memref_p (reg_equiv_mem[regno])
4536 || num_not_at_initial_offset))))
4537 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4538 insn);
4539 }
4540
4541 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4542 {
4543 if (fmt[i] == 'e')
4544 {
4545 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4546 ind_levels, is_set_dest, insn);
4547 /* If we have replaced a reg with it's equivalent memory loc -
4548 that can still be handled here e.g. if it's in a paradoxical
4549 subreg - we must make the change in a copy, rather than using
4550 a destructive change. This way, find_reloads can still elect
4551 not to do the change. */
4552 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4553 {
4554 x = shallow_copy_rtx (x);

--- 15 unchanged lines hidden (view full) ---

4570{
4571 /* We must rerun eliminate_regs, in case the elimination
4572 offsets have changed. */
4573 rtx tem
4574 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4575
4576 /* If TEM might contain a pseudo, we must copy it to avoid
4577 modifying it when we do the substitution for the reload. */
4578 if (rtx_varies_p (tem))
4579 tem = copy_rtx (tem);
4580
4581 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4582 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4583 return tem;
4584}
4585
4586/* Record all reloads needed for handling memory address AD
4587 which appears in *LOC in a memory reference to mode MODE
4588 which itself is found in location *MEMREFLOC.
4589 Note that we take shortcuts assuming that no multi-reg machine mode
4590 occurs as part of an address.

--- 22 unchanged lines hidden (view full) ---

4613 rtx *memrefloc;
4614 rtx ad;
4615 rtx *loc;
4616 int opnum;
4617 enum reload_type type;
4618 int ind_levels;
4619 rtx insn;
4620{
4621 register int regno;
4622 int removed_and = 0;
4623 rtx tem;
4624
4625 /* If the address is a register, see if it is a legitimate address and
4626 reload if not. We first handle the cases where we need not reload
4627 or where we must reload in a non-standard way. */
4628
4629 if (GET_CODE (ad) == REG)
4630 {
4631 regno = REGNO (ad);
4632
4633 if (reg_equiv_constant[regno] != 0
4634 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4635 {
4636 *loc = ad = reg_equiv_constant[regno];
4637 return 0;
4638 }
4639
4640 tem = reg_equiv_memory_loc[regno];
4641 if (tem != 0)
4642 {
4643 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4644 {
4645 tem = make_memloc (ad, regno);
4646 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4647 {
4648 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4649 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4650 ind_levels, insn);
4651 }
4652 /* We can avoid a reload if the register's equivalent memory
4653 expression is valid as an indirect memory address.
4654 But not all addresses are valid in a mem used as an indirect
4655 address: only reg or reg+constant. */
4656

--- 7 unchanged lines hidden (view full) ---

4664 /* TEM is not the same as what we'll be replacing the
4665 pseudo with after reload, put a USE in front of INSN
4666 in the final reload pass. */
4667 if (replace_reloads
4668 && num_not_at_initial_offset
4669 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4670 {
4671 *loc = tem;
4672 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4673 /* This doesn't really count as replacing the address
4674 as a whole, since it is still a memory access. */
4675 }
4676 return 0;
4677 }
4678 ad = tem;
4679 }
4680 }
4681
4682 /* The only remaining case where we can avoid a reload is if this is a
4683 hard register that is valid as a base register and which is not the
4684 subject of a CLOBBER in this insn. */
4685
4686 else if (regno < FIRST_PSEUDO_REGISTER
4687 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4688 && ! regno_clobbered_p (regno, this_insn, GET_MODE (ad), 0))
4689 return 0;
4690
4691 /* If we do not have one of the cases above, we must do the reload. */
4692 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4693 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4694 return 1;
4695 }
4696
4697 if (strict_memory_address_p (mode, ad))
4698 {
4699 /* The address appears valid, so reloads are not needed.
4700 But the address may contain an eliminable register.

--- 83 unchanged lines hidden (view full) ---

4784 || GET_CODE (XEXP (tem, 0)) == MEM
4785 || ! (GET_CODE (XEXP (tem, 0)) == REG
4786 || (GET_CODE (XEXP (tem, 0)) == PLUS
4787 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4788 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4789 {
4790 /* Must use TEM here, not AD, since it is the one that will
4791 have any subexpressions reloaded, if needed. */
4792 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4793 BASE_REG_CLASS, GET_MODE (tem),
4794 VOIDmode, 0,
4795 0, opnum, type);
4796 return ! removed_and;
4797 }
4798 else
4799 return 0;
4800 }
4801

--- 29 unchanged lines hidden (view full) ---

4831 type, ind_levels);
4832 return 0;
4833 }
4834 else
4835 {
4836 /* If the sum of two regs is not necessarily valid,
4837 reload the sum into a base reg.
4838 That will at least work. */
4839 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4840 Pmode, opnum, type, ind_levels);
4841 }
4842 return ! removed_and;
4843 }
4844
4845 /* If we have an indexed stack slot, there are three possible reasons why
4846 it might be invalid: The index might need to be reloaded, the address
4847 might have been made by frame pointer elimination and hence have a
4848 constant out of range, or both reasons might apply.
4849
4850 We can easily check for an index needing reload, but even if that is the
4851 case, we might also have an invalid constant. To avoid making the
4852 conservative assumption and requiring two reloads, we see if this address
4853 is valid when not interpreted strictly. If it is, the only problem is
4854 that the index needs a reload and find_reloads_address_1 will take care
4855 of it.
4856
4857 There is still a case when we might generate an extra reload,
4858 however. In certain cases eliminate_regs will return a MEM for a REG
4859 (see the code there for details). In those cases, memory_address_p
4860 applied to our address will return 0 so we will think that our offset
4861 must be too large. But it might indeed be valid and the only problem
4862 is that a MEM is present where a REG should be. This case should be
4863 very rare and there doesn't seem to be any way to avoid it.
4864
4865 If we decide to do something here, it must be that
4866 `double_reg_address_ok' is true and that this address rtl was made by
4867 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4868 rework the sum so that the reload register will be added to the index.
4869 This is safe because we know the address isn't shared.
4870
4871 We check for fp/ap/sp as both the first and second operand of the
4872 innermost PLUS. */

--- 8 unchanged lines hidden (view full) ---

4881 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4882#endif
4883 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4884 && ! memory_address_p (mode, ad))
4885 {
4886 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4887 plus_constant (XEXP (XEXP (ad, 0), 0),
4888 INTVAL (XEXP (ad, 1))),
4889 XEXP (XEXP (ad, 0), 1));
4890 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4891 GET_MODE (ad), opnum, type, ind_levels);
4892 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4893 type, 0, insn);
4894
4895 return 0;
4896 }
4897
4898 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4899 && GET_CODE (XEXP (ad, 0)) == PLUS
4900 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4901#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4902 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4903#endif
4904#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4905 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4906#endif
4907 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4908 && ! memory_address_p (mode, ad))
4909 {
4910 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4911 XEXP (XEXP (ad, 0), 0),
4912 plus_constant (XEXP (XEXP (ad, 0), 1),
4913 INTVAL (XEXP (ad, 1))));
4914 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4915 GET_MODE (ad), opnum, type, ind_levels);
4916 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4917 type, 0, insn);
4918
4919 return 0;
4920 }
4921
4922 /* See if address becomes valid when an eliminable register
4923 in a sum is replaced. */
4924
4925 tem = ad;
4926 if (GET_CODE (ad) == PLUS)
4927 tem = subst_indexed_address (ad);
4928 if (tem != ad && strict_memory_address_p (mode, tem))
4929 {

--- 11 unchanged lines hidden (view full) ---

4941 return 0;
4942 }
4943 }
4944
4945 /* If constants aren't valid addresses, reload the constant address
4946 into a register. */
4947 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4948 {
4949 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4950 Unshare it so we can safely alter it. */
4951 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4952 && CONSTANT_POOL_ADDRESS_P (ad))
4953 {
4954 *memrefloc = copy_rtx (*memrefloc);
4955 loc = &XEXP (*memrefloc, 0);
4956 if (removed_and)
4957 loc = &XEXP (*loc, 0);
4958 }
4959
4960 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4961 ind_levels);
4962 return ! removed_and;
4963 }
4964
4965 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4966 insn);
4967}
4968
4969/* Find all pseudo regs appearing in AD
4970 that are eliminable in favor of equivalent values
4971 and do not have hard regs; replace them by their equivalents.
4972 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4973 front of it for pseudos that we have to replace with stack slots. */
4974
4975static rtx
4976subst_reg_equivs (ad, insn)
4977 rtx ad;
4978 rtx insn;
4979{
4980 register RTX_CODE code = GET_CODE (ad);
4981 register int i;
4982 register char *fmt;
4983
4984 switch (code)
4985 {
4986 case HIGH:
4987 case CONST_INT:
4988 case CONST:
4989 case CONST_DOUBLE:
4990 case SYMBOL_REF:
4991 case LABEL_REF:
4992 case PC:
4993 case CC0:
4994 return ad;
4995
4996 case REG:
4997 {
4998 register int regno = REGNO (ad);
4999
5000 if (reg_equiv_constant[regno] != 0)
5001 {
5002 subst_reg_equivs_changed = 1;
5003 return reg_equiv_constant[regno];
5004 }
5005 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5006 {
5007 rtx mem = make_memloc (ad, regno);
5008 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5009 {
5010 subst_reg_equivs_changed = 1;
5011 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
5012 return mem;
5013 }
5014 }
5015 }
5016 return ad;
5017
5018 case PLUS:
5019 /* Quickly dispose of a common case. */
5020 if (XEXP (ad, 0) == frame_pointer_rtx
5021 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5022 return ad;
5023 break;
5024
5025 default:
5026 break;
5027 }
5028
5029 fmt = GET_RTX_FORMAT (code);
5030 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5031 if (fmt[i] == 'e')
5032 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);

--- 75 unchanged lines hidden (view full) ---

5108 /* Try to find a register to replace. */
5109 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5110 if (GET_CODE (op0) == REG
5111 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5112 && reg_renumber[regno] < 0
5113 && reg_equiv_constant[regno] != 0)
5114 op0 = reg_equiv_constant[regno];
5115 else if (GET_CODE (op1) == REG
5116 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5117 && reg_renumber[regno] < 0
5118 && reg_equiv_constant[regno] != 0)
5119 op1 = reg_equiv_constant[regno];
5120 else if (GET_CODE (op0) == PLUS
5121 && (tem = subst_indexed_address (op0)) != op0)
5122 op0 = tem;
5123 else if (GET_CODE (op1) == PLUS
5124 && (tem = subst_indexed_address (op1)) != op1)
5125 op1 = tem;
5126 else

--- 11 unchanged lines hidden (view full) ---

5138 if (op1 != 0)
5139 op0 = form_sum (op0, op1);
5140
5141 return op0;
5142 }
5143 return addr;
5144}
5145
5146/* Record the pseudo registers we must reload into hard registers in a
5147 subexpression of a would-be memory address, X referring to a value
5148 in mode MODE. (This function is not called if the address we find
5149 is strictly valid.)
5150
5151 CONTEXT = 1 means we are considering regs as index regs,
5152 = 0 means we are considering them as base regs.
5153

--- 5 unchanged lines hidden (view full) ---

5159 INSN, if nonzero, is the insn in which we do the reload. It is used
5160 to determine if we may generate output reloads.
5161
5162 We return nonzero if X, as a whole, is reloaded or replaced. */
5163
5164/* Note that we take shortcuts assuming that no multi-reg machine mode
5165 occurs as part of an address.
5166 Also, this is not fully machine-customizable; it works for machines
5167 such as vaxes and 68000's and 32000's, but other possible machines
5168 could have addressing modes that this does not handle right. */
5169
5170static int
5171find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5172 enum machine_mode mode;
5173 rtx x;
5174 int context;
5175 rtx *loc;
5176 int opnum;
5177 enum reload_type type;
5178 int ind_levels;
5179 rtx insn;
5180{
5181 register RTX_CODE code = GET_CODE (x);
5182
5183 switch (code)
5184 {
5185 case PLUS:
5186 {
5187 register rtx orig_op0 = XEXP (x, 0);
5188 register rtx orig_op1 = XEXP (x, 1);
5189 register RTX_CODE code0 = GET_CODE (orig_op0);
5190 register RTX_CODE code1 = GET_CODE (orig_op1);
5191 register rtx op0 = orig_op0;
5192 register rtx op1 = orig_op1;
5193
5194 if (GET_CODE (op0) == SUBREG)
5195 {
5196 op0 = SUBREG_REG (op0);
5197 code0 = GET_CODE (op0);
5198 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5199 op0 = gen_rtx_REG (word_mode,
5200 REGNO (op0) + SUBREG_WORD (orig_op0));
5201 }
5202
5203 if (GET_CODE (op1) == SUBREG)
5204 {
5205 op1 = SUBREG_REG (op1);
5206 code1 = GET_CODE (op1);
5207 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5208 op1 = gen_rtx_REG (GET_MODE (op1),
5209 REGNO (op1) + SUBREG_WORD (orig_op1));
5210 }
5211
5212 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5213 || code0 == ZERO_EXTEND || code1 == MEM)
5214 {
5215 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5216 type, ind_levels, insn);
5217 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5218 type, ind_levels, insn);
5219 }
5220

--- 59 unchanged lines hidden (view full) ---

5280 type, ind_levels, insn);
5281 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5282 type, ind_levels, insn);
5283 }
5284 }
5285
5286 return 0;
5287
5288 case POST_INC:
5289 case POST_DEC:
5290 case PRE_INC:
5291 case PRE_DEC:
5292 if (GET_CODE (XEXP (x, 0)) == REG)
5293 {
5294 register int regno = REGNO (XEXP (x, 0));
5295 int value = 0;
5296 rtx x_orig = x;
5297
5298 /* A register that is incremented cannot be constant! */
5299 if (regno >= FIRST_PSEUDO_REGISTER
5300 && reg_equiv_constant[regno] != 0)
5301 abort ();
5302

--- 31 unchanged lines hidden (view full) ---

5334 and record how much to increment by. */
5335
5336 if (reg_renumber[regno] >= 0)
5337 regno = reg_renumber[regno];
5338 if ((regno >= FIRST_PSEUDO_REGISTER
5339 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5340 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5341 {
5342#ifdef AUTO_INC_DEC
5343 register rtx link;
5344#endif
5345 int reloadnum;
5346
5347 /* If we can output the register afterwards, do so, this
5348 saves the extra update.
5349 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5350 CALL_INSN - and it does not set CC0.
5351 But don't do this if we cannot directly address the
5352 memory location, since this will make it harder to

--- 4 unchanged lines hidden (view full) ---

5357 : reg_equiv_mem[regno]);
5358 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5359 if (insn && GET_CODE (insn) == INSN && equiv
5360 && memory_operand (equiv, GET_MODE (equiv))
5361#ifdef HAVE_cc0
5362 && ! sets_cc0_p (PATTERN (insn))
5363#endif
5364 && ! (icode != CODE_FOR_nothing
5365 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5366 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5367 {
5368 /* We use the original pseudo for loc, so that
5369 emit_reload_insns() knows which pseudo this
5370 reload refers to and updates the pseudo rtx, not
5371 its equivalent memory location, as well as the
5372 corresponding entry in reg_last_reload_reg. */
5373 loc = &XEXP (x_orig, 0);
5374 x = XEXP (x, 0);
5375 reloadnum
5376 = push_reload (x, x, loc, loc,
5377 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5378 GET_MODE (x), GET_MODE (x), 0, 0,
5379 opnum, RELOAD_OTHER);
5380
5381 }
5382 else
5383 {
5384 reloadnum
5385 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5386 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5387 GET_MODE (x), GET_MODE (x), 0, 0,
5388 opnum, type);
5389 reload_inc[reloadnum]
5390 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5391
5392 value = 1;
5393 }
5394
5395#ifdef AUTO_INC_DEC
5396 /* Update the REG_INC notes. */
5397
5398 for (link = REG_NOTES (this_insn);
5399 link; link = XEXP (link, 1))
5400 if (REG_NOTE_KIND (link) == REG_INC
5401 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5402 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5403#endif
5404 }
5405 return value;
5406 }
5407
5408 else if (GET_CODE (XEXP (x, 0)) == MEM)
5409 {
5410 /* This is probably the result of a substitution, by eliminate_regs,
5411 of an equivalent address for a pseudo that was not allocated to a
5412 hard register. Verify that the specified address is valid and
5413 reload it into a register. */
5414 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5415 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5416 register rtx link;
5417 int reloadnum;
5418
5419 /* Since we know we are going to reload this item, don't decrement
5420 for the indirection level.
5421
5422 Note that this is actually conservative: it would be slightly
5423 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5424 reload1.c here. */
5425 /* We can't use ADDR_TYPE (type) here, because we need to
5426 write back the value after reading it, hence we actually
5427 need two registers. */
5428 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5429 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5430 opnum, type, ind_levels, insn);
5431
5432 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5433 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5434 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5435 reload_inc[reloadnum]
5436 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5437
5438 link = FIND_REG_INC_NOTE (this_insn, tem);
5439 if (link != 0)
5440 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5441
5442 return 1;
5443 }

--- 9 unchanged lines hidden (view full) ---

5453 the indirection level.
5454
5455 Note that this is actually conservative: it would be slightly more
5456 efficient to use the value of SPILL_INDIRECT_LEVELS from
5457 reload1.c here. */
5458
5459 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5460 opnum, ADDR_TYPE (type), ind_levels, insn);
5461 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5462 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5463 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5464 return 1;
5465
5466 case REG:
5467 {
5468 register int regno = REGNO (x);
5469
5470 if (reg_equiv_constant[regno] != 0)
5471 {
5472 find_reloads_address_part (reg_equiv_constant[regno], loc,
5473 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5474 GET_MODE (x), opnum, type, ind_levels);
5475 return 1;
5476 }
5477
5478#if 0 /* This might screw code in reload1.c to delete prior output-reload
5479 that feeds this insn. */
5480 if (reg_equiv_mem[regno] != 0)
5481 {
5482 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5483 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5484 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5485 return 1;
5486 }
5487#endif
5488
5489 if (reg_equiv_memory_loc[regno]
5490 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5491 {

--- 10 unchanged lines hidden (view full) ---

5502
5503 if (reg_renumber[regno] >= 0)
5504 regno = reg_renumber[regno];
5505
5506 if ((regno >= FIRST_PSEUDO_REGISTER
5507 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5508 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5509 {
5510 push_reload (x, NULL_RTX, loc, NULL_PTR,
5511 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5512 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5513 return 1;
5514 }
5515
5516 /* If a register appearing in an address is the subject of a CLOBBER
5517 in this insn, reload it into some other register to be safe.
5518 The CLOBBER is supposed to make the register unavailable
5519 from before this insn to after it. */
5520 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5521 {
5522 push_reload (x, NULL_RTX, loc, NULL_PTR,
5523 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5524 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5525 return 1;
5526 }
5527 }
5528 return 0;
5529
5530 case SUBREG:
5531 if (GET_CODE (SUBREG_REG (x)) == REG)
5532 {
5533 /* If this is a SUBREG of a hard register and the resulting register
5534 is of the wrong class, reload the whole SUBREG. This avoids
5535 needless copies if SUBREG_REG is multi-word. */
5536 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5537 {
5538 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5539
5540 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5541 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5542 {
5543 push_reload (x, NULL_RTX, loc, NULL_PTR,
5544 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5545 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5546 return 1;
5547 }
5548 }
5549 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5550 is larger than the class size, then reload the whole SUBREG. */
5551 else
5552 {
5553 enum reg_class class = (context ? INDEX_REG_CLASS
5554 : BASE_REG_CLASS);
5555 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5556 > reg_class_size[class])
5557 {
5558 x = find_reloads_subreg_address (x, 0, opnum, type,
5559 ind_levels, insn);
5560 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5561 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5562 return 1;
5563 }
5564 }
5565 }
5566 break;
5567
5568 default:
5569 break;
5570 }
5571
5572 {
5573 register char *fmt = GET_RTX_FORMAT (code);
5574 register int i;
5575
5576 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5577 {
5578 if (fmt[i] == 'e')
5579 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5580 opnum, type, ind_levels, insn);
5581 }
5582 }

--- 27 unchanged lines hidden (view full) ---

5610 int ind_levels;
5611{
5612 if (CONSTANT_P (x)
5613 && (! LEGITIMATE_CONSTANT_P (x)
5614 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5615 {
5616 rtx tem;
5617
5618 /* If this is a CONST_INT, it could have been created by a
5619 plus_constant call in eliminate_regs, which means it may be
5620 on the reload_obstack. reload_obstack will be freed later, so
5621 we can't allow such RTL to be put in the constant pool. There
5622 is code in force_const_mem to check for this case, but it doesn't
5623 work because we have already popped off the reload_obstack, so
5624 rtl_obstack == saveable_obstack is true at this point. */
5625 if (GET_CODE (x) == CONST_INT)
5626 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5627 else
5628 tem = x = force_const_mem (mode, x);
5629
5630 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5631 opnum, type, ind_levels, 0);
5632 }
5633
5634 else if (GET_CODE (x) == PLUS
5635 && CONSTANT_P (XEXP (x, 1))
5636 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5637 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5638 {
5639 rtx tem;
5640
5641 /* See comment above. */
5642 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5643 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5644 else
5645 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5646
5647 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5648 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5649 opnum, type, ind_levels, 0);
5650 }
5651
5652 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5653 mode, VOIDmode, 0, 0, opnum, type);
5654}
5655
5656/* X, a subreg of a pseudo, is a part of an address that needs to be
5657 reloaded.
5658
5659 If the pseudo is equivalent to a memory location that cannot be directly
5660 addressed, make the necessary address reloads.

--- 39 unchanged lines hidden (view full) ---

5700 {
5701 rtx tem = make_memloc (SUBREG_REG (x), regno);
5702
5703 /* If the address changes because of register elimination, then
5704 it must be replaced. */
5705 if (force_replace
5706 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5707 {
5708 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5709
5710 if (BYTES_BIG_ENDIAN)
5711 {
5712 int size;
5713
5714 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5715 offset += MIN (size, UNITS_PER_WORD);
5716 size = GET_MODE_SIZE (GET_MODE (x));
5717 offset -= MIN (size, UNITS_PER_WORD);
5718 }
5719 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5720 PUT_MODE (tem, GET_MODE (x));
5721 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5722 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5723 ind_levels, insn);
5724 /* If this is not a toplevel operand, find_reloads doesn't see
5725 this substitution. We have to emit a USE of the pseudo so
5726 that delete_output_reload can see it. */
5727 if (replace_reloads && recog_operand[opnum] != x)
5728 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5729 x = tem;
5730 }
5731 }
5732 }
5733 return x;
5734}
5735
5736/* Substitute into the current INSN the registers into which we have reloaded
5737 the things that need reloading. The array `replacements'
5738 says contains the locations of all pointers that must be changed
5739 and says what to replace them with.
5740
5741 Return the rtx that X translates into; usually X, but modified. */
5742
5743void
5744subst_reloads ()
5745{
5746 register int i;
5747
5748 for (i = 0; i < n_replacements; i++)
5749 {
5750 register struct replacement *r = &replacements[i];
5751 register rtx reloadreg = reload_reg_rtx[r->what];
5752 if (reloadreg)
5753 {
5754 /* Encapsulate RELOADREG so its machine mode matches what
5755 used to be there. Note that gen_lowpart_common will
5756 do the wrong thing if RELOADREG is multi-word. RELOADREG
5757 will always be a REG here. */
5758 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5759 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5760
5761 /* If we are putting this into a SUBREG and RELOADREG is a
5762 SUBREG, we would be making nested SUBREGs, so we have to fix
5763 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5764
5765 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5766 {
5767 if (GET_MODE (*r->subreg_loc)
5768 == GET_MODE (SUBREG_REG (reloadreg)))
5769 *r->subreg_loc = SUBREG_REG (reloadreg);
5770 else
5771 {
5772 *r->where = SUBREG_REG (reloadreg);
5773 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5774 }
5775 }
5776 else
5777 *r->where = reloadreg;
5778 }
5779 /* If reload got no reg and isn't optional, something's wrong. */
5780 else if (! reload_optional[r->what])
5781 abort ();
5782 }
5783}
5784
5785/* Make a copy of any replacements being done into X and move those copies
5786 to locations in Y, a copy of X. We only look at the highest level of
5787 the RTL. */
5788
5789void
5790copy_replacements (x, y)
5791 rtx x;
5792 rtx y;
5793{
5794 int i, j;
5795 enum rtx_code code = GET_CODE (x);
5796 char *fmt = GET_RTX_FORMAT (code);
5797 struct replacement *r;
5798
5799 /* We can't support X being a SUBREG because we might then need to know its
5800 location if something inside it was replaced. */
5801 if (code == SUBREG)
5802 abort ();
5803
5804 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)

--- 44 unchanged lines hidden (view full) ---

5849rtx
5850find_replacement (loc)
5851 rtx *loc;
5852{
5853 struct replacement *r;
5854
5855 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5856 {
5857 rtx reloadreg = reload_reg_rtx[r->what];
5858
5859 if (reloadreg && r->where == loc)
5860 {
5861 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5862 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5863
5864 return reloadreg;
5865 }
5866 else if (reloadreg && r->subreg_loc == loc)
5867 {
5868 /* RELOADREG must be either a REG or a SUBREG.
5869
5870 ??? Is it actually still ever a SUBREG? If so, why? */
5871
5872 if (GET_CODE (reloadreg) == REG)
5873 return gen_rtx_REG (GET_MODE (*loc),
5874 REGNO (reloadreg) + SUBREG_WORD (*loc));
5875 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5876 return reloadreg;
5877 else
5878 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5879 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5880 }
5881 }
5882
5883 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5884 what's inside and make a new rtl if so. */
5885 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5886 || GET_CODE (*loc) == MULT)
5887 {

--- 14 unchanged lines hidden (view full) ---

5902 References contained within the substructure at LOC do not count.
5903 LOC may be zero, meaning don't ignore anything.
5904
5905 This is similar to refers_to_regno_p in rtlanal.c except that we
5906 look at equivalences for pseudos that didn't get hard registers. */
5907
5908int
5909refers_to_regno_for_reload_p (regno, endregno, x, loc)
5910 int regno, endregno;
5911 rtx x;
5912 rtx *loc;
5913{
5914 register int i;
5915 register RTX_CODE code;
5916 register char *fmt;
5917
5918 if (x == 0)
5919 return 0;
5920
5921 repeat:
5922 code = GET_CODE (x);
5923
5924 switch (code)
5925 {
5926 case REG:
5927 i = REGNO (x);
5928
5929 /* If this is a pseudo, a hard register must not have been allocated.
5930 X must therefore either be a constant or be in memory. */
5931 if (i >= FIRST_PSEUDO_REGISTER)
5932 {
5933 if (reg_equiv_memory_loc[i])
5934 return refers_to_regno_for_reload_p (regno, endregno,
5935 reg_equiv_memory_loc[i],
5936 NULL_PTR);
5937
5938 if (reg_equiv_constant[i])
5939 return 0;
5940
5941 abort ();
5942 }
5943
5944 return (endregno > i
5945 && regno < i + (i < FIRST_PSEUDO_REGISTER
5946 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5947 : 1));
5948
5949 case SUBREG:
5950 /* If this is a SUBREG of a hard reg, we can see exactly which
5951 registers are being modified. Otherwise, handle normally. */
5952 if (GET_CODE (SUBREG_REG (x)) == REG
5953 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5954 {
5955 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5956 int inner_endregno
5957 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5958 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5959
5960 return endregno > inner_regno && regno < inner_endregno;
5961 }
5962 break;
5963
5964 case CLOBBER:

--- 16 unchanged lines hidden (view full) ---

5981 && refers_to_regno_for_reload_p (regno, endregno,
5982 SET_DEST (x), loc))))
5983 return 1;
5984
5985 if (code == CLOBBER || loc == &SET_SRC (x))
5986 return 0;
5987 x = SET_SRC (x);
5988 goto repeat;
5989
5990 default:
5991 break;
5992 }
5993
5994 /* X does not match, so try its subexpressions. */
5995
5996 fmt = GET_RTX_FORMAT (code);
5997 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)

--- 7 unchanged lines hidden (view full) ---

6005 }
6006 else
6007 if (refers_to_regno_for_reload_p (regno, endregno,
6008 XEXP (x, i), loc))
6009 return 1;
6010 }
6011 else if (fmt[i] == 'E')
6012 {
6013 register int j;
6014 for (j = XVECLEN (x, i) - 1; j >=0; j--)
6015 if (loc != &XVECEXP (x, i, j)
6016 && refers_to_regno_for_reload_p (regno, endregno,
6017 XVECEXP (x, i, j), loc))
6018 return 1;
6019 }
6020 }
6021 return 0;
6022}
6023
6024/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6025 we check if any register number in X conflicts with the relevant register
6026 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6027 contains a MEM (we don't bother checking for memory addresses that can't
6028 conflict because we expect this to be a rare case.
6029
6030 This function is similar to reg_overlap_mention_p in rtlanal.c except
6031 that we look at equivalences for pseudos that didn't get hard registers. */
6032
6033int
6034reg_overlap_mentioned_for_reload_p (x, in)
6035 rtx x, in;
6036{
6037 int regno, endregno;
6038
6039 /* Overly conservative. */
6040 if (GET_CODE (x) == STRICT_LOW_PART)
6041 x = XEXP (x, 0);
6042
6043 /* If either argument is a constant, then modifying X can not affect IN. */
6044 if (CONSTANT_P (x) || CONSTANT_P (in))
6045 return 0;
6046 else if (GET_CODE (x) == SUBREG)
6047 {
6048 regno = REGNO (SUBREG_REG (x));
6049 if (regno < FIRST_PSEUDO_REGISTER)
6050 regno += SUBREG_WORD (x);
6051 }
6052 else if (GET_CODE (x) == REG)
6053 {
6054 regno = REGNO (x);
6055
6056 /* If this is a pseudo, it must not have been assigned a hard register.
6057 Therefore, it must either be in memory or be a constant. */
6058

--- 6 unchanged lines hidden (view full) ---

6065 abort ();
6066 }
6067 }
6068 else if (GET_CODE (x) == MEM)
6069 return refers_to_mem_for_reload_p (in);
6070 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6071 || GET_CODE (x) == CC0)
6072 return reg_mentioned_p (x, in);
6073 else
6074 abort ();
6075
6076 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6077 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6078
6079 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
6080}
6081
6082/* Return nonzero if anything in X contains a MEM. Look also for pseudo
6083 registers. */
6084
6085int
6086refers_to_mem_for_reload_p (x)
6087 rtx x;
6088{
6089 char *fmt;
6090 int i;
6091
6092 if (GET_CODE (x) == MEM)
6093 return 1;
6094
6095 if (GET_CODE (x) == REG)
6096 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6097 && reg_equiv_memory_loc[REGNO (x)]);
6098
6099 fmt = GET_RTX_FORMAT (GET_CODE (x));
6100 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6101 if (fmt[i] == 'e'
6102 && (GET_CODE (XEXP (x, i)) == MEM
6103 || refers_to_mem_for_reload_p (XEXP (x, i))))
6104 return 1;
6105
6106 return 0;
6107}
6108
6109/* Check the insns before INSN to see if there is a suitable register
6110 containing the same value as GOAL.
6111 If OTHER is -1, look for a register in class CLASS.
6112 Otherwise, just see if register number OTHER shares GOAL's value.
6113

--- 16 unchanged lines hidden (view full) ---

6130
6131 This function is used by jump.c as well as in the reload pass.
6132
6133 If GOAL is the sum of the stack pointer and a constant, we treat it
6134 as if it were a constant except that sp is required to be unchanging. */
6135
6136rtx
6137find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6138 register rtx goal;
6139 rtx insn;
6140 enum reg_class class;
6141 register int other;
6142 short *reload_reg_p;
6143 int goalreg;
6144 enum machine_mode mode;
6145{
6146 register rtx p = insn;
6147 rtx goaltry, valtry, value, where;
6148 register rtx pat;
6149 register int regno = -1;
6150 int valueno;
6151 int goal_mem = 0;
6152 int goal_const = 0;
6153 int goal_mem_addr_varies = 0;
6154 int need_stable_sp = 0;
6155 int nregs;
6156 int valuenregs;
6157

--- 10 unchanged lines hidden (view full) ---

6168 return 0;
6169 /* An address with side effects must be reexecuted. */
6170 switch (code)
6171 {
6172 case POST_INC:
6173 case PRE_INC:
6174 case POST_DEC:
6175 case PRE_DEC:
6176 return 0;
6177 default:
6178 break;
6179 }
6180 goal_mem = 1;
6181 }
6182 else if (CONSTANT_P (goal))
6183 goal_const = 1;
6184 else if (GET_CODE (goal) == PLUS
6185 && XEXP (goal, 0) == stack_pointer_rtx
6186 && CONSTANT_P (XEXP (goal, 1)))
6187 goal_const = need_stable_sp = 1;
6188 else if (GET_CODE (goal) == PLUS
6189 && XEXP (goal, 0) == frame_pointer_rtx
6190 && CONSTANT_P (XEXP (goal, 1)))
6191 goal_const = 1;
6192 else
6193 return 0;
6194
6195 /* On some machines, certain regs must always be rejected
6196 because they don't behave the way ordinary registers do. */
6197
6198#ifdef OVERLAPPING_REGNO_P
6199 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6200 && OVERLAPPING_REGNO_P (regno))
6201 return 0;
6202#endif
6203
6204 /* Scan insns back from INSN, looking for one that copies
6205 a value into or out of GOAL.
6206 Stop and give up if we reach a label. */
6207
6208 while (1)
6209 {
6210 p = PREV_INSN (p);
6211 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6212 return 0;
6213 if (GET_CODE (p) == INSN
6214 /* If we don't want spill regs ... */
6215 && (! (reload_reg_p != 0
6216 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6217 /* ... then ignore insns introduced by reload; they aren't useful
6218 and can cause results in reload_as_needed to be different
6219 from what they were when calculating the need for spills.
6220 If we notice an input-reload insn here, we will reject it below,
6221 but it might hide a usable equivalent. That makes bad code.
6222 It may even abort: perhaps no reg was spilled for this insn
6223 because it was assumed we would find that equivalent. */
6224 || INSN_UID (p) < reload_first_uid))
6225 {
6226 rtx tem;
6227 pat = single_set (p);
6228 /* First check for something that sets some reg equal to GOAL. */
6229 if (pat != 0
6230 && ((regno >= 0
6231 && true_regnum (SET_SRC (pat)) == regno
6232 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6233 ||
6234 (regno >= 0
6235 && true_regnum (SET_DEST (pat)) == regno

--- 8 unchanged lines hidden (view full) ---

6244 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6245 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6246 || (goal_mem
6247 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6248 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6249 /* If we are looking for a constant,
6250 and something equivalent to that constant was copied
6251 into a reg, we can use that reg. */
6252 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6253 NULL_RTX))
6254 && rtx_equal_p (XEXP (tem, 0), goal)
6255 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6256 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6257 NULL_RTX))
6258 && GET_CODE (SET_DEST (pat)) == REG
6259 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6260 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6261 && GET_CODE (goal) == CONST_INT
6262 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6263 VOIDmode))
6264 && rtx_equal_p (goal, goaltry)
6265 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6266 VOIDmode))
6267 && (valueno = true_regnum (valtry)) >= 0)
6268 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6269 NULL_RTX))
6270 && GET_CODE (SET_DEST (pat)) == REG
6271 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6272 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6273 && GET_CODE (goal) == CONST_INT
6274 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6275 VOIDmode))
6276 && rtx_equal_p (goal, goaltry)
6277 && (valtry
6278 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6279 && (valueno = true_regnum (valtry)) >= 0)))
6280 {

--- 25 unchanged lines hidden (view full) ---

6306 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6307 (or copying VALUE into GOAL, if GOAL is also a register).
6308 Now verify that VALUE is really valid. */
6309
6310 /* VALUENO is the register number of VALUE; a hard register. */
6311
6312 /* Don't try to re-use something that is killed in this insn. We want
6313 to be able to trust REG_UNUSED notes. */
6314 if (find_reg_note (where, REG_UNUSED, value))
6315 return 0;
6316
6317 /* If we propose to get the value from the stack pointer or if GOAL is
6318 a MEM based on the stack pointer, we need a stable SP. */
6319 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6320 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6321 goal)))
6322 need_stable_sp = 1;

--- 4 unchanged lines hidden (view full) ---

6327
6328 /* Reject VALUE if it was loaded from GOAL
6329 and is also a register that appears in the address of GOAL. */
6330
6331 if (goal_mem && value == SET_DEST (single_set (where))
6332 && refers_to_regno_for_reload_p (valueno,
6333 (valueno
6334 + HARD_REGNO_NREGS (valueno, mode)),
6335 goal, NULL_PTR))
6336 return 0;
6337
6338 /* Reject registers that overlap GOAL. */
6339
6340 if (!goal_mem && !goal_const
6341 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6342 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6343 return 0;
6344
6345 nregs = HARD_REGNO_NREGS (regno, mode);
6346 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6347
6348 /* Reject VALUE if it is one of the regs reserved for reloads.
6349 Reload1 knows how to reuse them anyway, and it would get
6350 confused if we allocated one without its knowledge.
6351 (Now that insns introduced by reload are ignored above,
6352 this case shouldn't happen, but I'm not positive.) */
6353
6354 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6355 {
6356 int i;
6357 for (i = 0; i < valuenregs; ++i)
6358 if (reload_reg_p[valueno + i] >= 0)
6359 return 0;
6360 }
6361
6362 /* On some machines, certain regs must always be rejected
6363 because they don't behave the way ordinary registers do. */
6364
6365#ifdef OVERLAPPING_REGNO_P
6366 if (OVERLAPPING_REGNO_P (valueno))
6367 return 0;
6368#endif
6369
6370 /* Reject VALUE if it is a register being used for an input reload
6371 even if it is not one of those reserved. */
6372
6373 if (reload_reg_p != 0)
6374 {
6375 int i;
6376 for (i = 0; i < n_reloads; i++)
6377 if (reload_reg_rtx[i] != 0 && reload_in[i])
6378 {
6379 int regno1 = REGNO (reload_reg_rtx[i]);
6380 int nregs1 = HARD_REGNO_NREGS (regno1,
6381 GET_MODE (reload_reg_rtx[i]));
6382 if (regno1 < valueno + valuenregs
6383 && regno1 + nregs1 > valueno)
6384 return 0;
6385 }
6386 }
6387
6388 if (goal_mem)
6389 /* We must treat frame pointer as varying here,

--- 23 unchanged lines hidden (view full) ---

6413 for (i = 0; i < nregs; ++i)
6414 if (call_used_regs[regno + i])
6415 return 0;
6416
6417 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6418 for (i = 0; i < valuenregs; ++i)
6419 if (call_used_regs[valueno + i])
6420 return 0;
6421 }
6422
6423#ifdef NON_SAVING_SETJMP
6424 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6425 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6426 return 0;
6427#endif
6428
6429#ifdef INSN_CLOBBERS_REGNO_P
6430 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6431 && INSN_CLOBBERS_REGNO_P (p, valueno))
6432 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6433 && INSN_CLOBBERS_REGNO_P (p, regno)))
6434 return 0;
6435#endif
6436
6437 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6438 {
6439 pat = PATTERN (p);
6440
6441 /* Watch out for unspec_volatile, and volatile asms. */
6442 if (volatile_insn_p (pat))
6443 return 0;
6444
6445 /* If this insn P stores in either GOAL or VALUE, return 0.
6446 If GOAL is a memory ref and this insn writes memory, return 0.
6447 If GOAL is a memory ref and its address is not constant,
6448 and this insn P changes a register used in GOAL, return 0. */
6449
6450 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6451 {
6452 register rtx dest = SET_DEST (pat);
6453 while (GET_CODE (dest) == SUBREG
6454 || GET_CODE (dest) == ZERO_EXTRACT
6455 || GET_CODE (dest) == SIGN_EXTRACT
6456 || GET_CODE (dest) == STRICT_LOW_PART)
6457 dest = XEXP (dest, 0);
6458 if (GET_CODE (dest) == REG)
6459 {
6460 register int xregno = REGNO (dest);
6461 int xnregs;
6462 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6463 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6464 else
6465 xnregs = 1;
6466 if (xregno < regno + nregs && xregno + xnregs > regno)
6467 return 0;
6468 if (xregno < valueno + valuenregs

--- 11 unchanged lines hidden (view full) ---

6480 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6481 && reg_equiv_memory_loc[regno] != 0)
6482 return 0;
6483 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6484 return 0;
6485 }
6486 else if (GET_CODE (pat) == PARALLEL)
6487 {
6488 register int i;
6489 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6490 {
6491 register rtx v1 = XVECEXP (pat, 0, i);
6492 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6493 {
6494 register rtx dest = SET_DEST (v1);
6495 while (GET_CODE (dest) == SUBREG
6496 || GET_CODE (dest) == ZERO_EXTRACT
6497 || GET_CODE (dest) == SIGN_EXTRACT
6498 || GET_CODE (dest) == STRICT_LOW_PART)
6499 dest = XEXP (dest, 0);
6500 if (GET_CODE (dest) == REG)
6501 {
6502 register int xregno = REGNO (dest);
6503 int xnregs;
6504 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6505 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6506 else
6507 xnregs = 1;
6508 if (xregno < regno + nregs
6509 && xregno + xnregs > regno)
6510 return 0;

--- 25 unchanged lines hidden (view full) ---

6536 rtx link;
6537
6538 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6539 link = XEXP (link, 1))
6540 {
6541 pat = XEXP (link, 0);
6542 if (GET_CODE (pat) == CLOBBER)
6543 {
6544 register rtx dest = SET_DEST (pat);
6545 while (GET_CODE (dest) == SUBREG
6546 || GET_CODE (dest) == ZERO_EXTRACT
6547 || GET_CODE (dest) == SIGN_EXTRACT
6548 || GET_CODE (dest) == STRICT_LOW_PART)
6549 dest = XEXP (dest, 0);
6550 if (GET_CODE (dest) == REG)
6551 {
6552 register int xregno = REGNO (dest);
6553 int xnregs;
6554 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6555 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6556 else
6557 xnregs = 1;
6558 if (xregno < regno + nregs
6559 && xregno + xnregs > regno)
6560 return 0;
6561 if (xregno < valueno + valuenregs
6562 && xregno + xnregs > valueno)
6563 return 0;
6564 if (goal_mem_addr_varies
6565 && reg_overlap_mentioned_for_reload_p (dest,
6566 goal))
6567 return 0;
6568 }
6569 else if (goal_mem && GET_CODE (dest) == MEM
6570 && ! push_operand (dest, GET_MODE (dest)))
6571 return 0;
6572 else if (need_stable_sp
6573 && push_operand (dest, GET_MODE (dest)))
6574 return 0;
6575 }
6576 }
6577 }
6578
6579#ifdef AUTO_INC_DEC
6580 /* If this insn auto-increments or auto-decrements
6581 either regno or valueno, return 0 now.
6582 If GOAL is a memory ref and its address is not constant,
6583 and this insn P increments a register used in GOAL, return 0. */
6584 {
6585 register rtx link;
6586
6587 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6588 if (REG_NOTE_KIND (link) == REG_INC
6589 && GET_CODE (XEXP (link, 0)) == REG)
6590 {
6591 register int incno = REGNO (XEXP (link, 0));
6592 if (incno < regno + nregs && incno >= regno)
6593 return 0;
6594 if (incno < valueno + valuenregs && incno >= valueno)
6595 return 0;
6596 if (goal_mem_addr_varies
6597 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6598 goal))
6599 return 0;

--- 7 unchanged lines hidden (view full) ---

6607/* Find a place where INCED appears in an increment or decrement operator
6608 within X, and return the amount INCED is incremented or decremented by.
6609 The value is always positive. */
6610
6611static int
6612find_inc_amount (x, inced)
6613 rtx x, inced;
6614{
6615 register enum rtx_code code = GET_CODE (x);
6616 register char *fmt;
6617 register int i;
6618
6619 if (code == MEM)
6620 {
6621 register rtx addr = XEXP (x, 0);
6622 if ((GET_CODE (addr) == PRE_DEC
6623 || GET_CODE (addr) == POST_DEC
6624 || GET_CODE (addr) == PRE_INC
6625 || GET_CODE (addr) == POST_INC)
6626 && XEXP (addr, 0) == inced)
6627 return GET_MODE_SIZE (GET_MODE (x));
6628 }
6629
6630 fmt = GET_RTX_FORMAT (code);
6631 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6632 {
6633 if (fmt[i] == 'e')
6634 {
6635 register int tem = find_inc_amount (XEXP (x, i), inced);
6636 if (tem != 0)
6637 return tem;
6638 }
6639 if (fmt[i] == 'E')
6640 {
6641 register int j;
6642 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6643 {
6644 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6645 if (tem != 0)
6646 return tem;
6647 }
6648 }
6649 }
6650
6651 return 0;
6652}
6653
6654/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6655
6656int
6657regno_clobbered_p (regno, insn, mode, sets)
6658 int regno;
6659 rtx insn;
6660 enum machine_mode mode;
6661 int sets;
6662{
6663 int nregs = HARD_REGNO_NREGS (regno, mode);
6664 int endregno = regno + nregs;
6665
6666 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6667 || (sets && GET_CODE (PATTERN (insn)) == SET))
6668 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6669 {
6670 int test = REGNO (XEXP (PATTERN (insn), 0));
6671
6672 return test >= regno && test < endregno;
6673 }
6674
6675 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6676 {
6677 int i = XVECLEN (PATTERN (insn), 0) - 1;
6678
6679 for (; i >= 0; i--)
6680 {
6681 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6682 if ((GET_CODE (elt) == CLOBBER
6683 || (sets && GET_CODE (PATTERN (insn)) == SET))
6684 && GET_CODE (XEXP (elt, 0)) == REG)
6685 {
6686 int test = REGNO (XEXP (elt, 0));
6687
6688 if (test >= regno && test < endregno)
6689 return 1;
6690 }
6691 }
6692 }
6693
6694 return 0;
6695}
6696
6697static char *reload_when_needed_name[] =
6698{
6699 "RELOAD_FOR_INPUT",
6700 "RELOAD_FOR_OUTPUT",
6701 "RELOAD_FOR_INSN",
6702 "RELOAD_FOR_INPUT_ADDRESS",
6703 "RELOAD_FOR_INPADDR_ADDRESS",
6704 "RELOAD_FOR_OUTPUT_ADDRESS",
6705 "RELOAD_FOR_OUTADDR_ADDRESS",
6706 "RELOAD_FOR_OPERAND_ADDRESS",
6707 "RELOAD_FOR_OPADDR_ADDR",
6708 "RELOAD_OTHER",
6709 "RELOAD_FOR_OTHER_ADDRESS"
6710};
6711
6712static char *reg_class_names[] = REG_CLASS_NAMES;
6713
6714/* These functions are used to print the variables set by 'find_reloads' */
6715
6716void
6717debug_reload_to_stream (f)
6718 FILE *f;
6719{
6720 int r;
6721 char *prefix;
6722
6723 if (! f)
6724 f = stderr;
6725 for (r = 0; r < n_reloads; r++)
6726 {
6727 fprintf (f, "Reload %d: ", r);
6728
6729 if (reload_in[r] != 0)
6730 {
6731 fprintf (f, "reload_in (%s) = ",
6732 GET_MODE_NAME (reload_inmode[r]));
6733 print_inline_rtx (f, reload_in[r], 24);
6734 fprintf (f, "\n\t");
6735 }
6736
6737 if (reload_out[r] != 0)
6738 {
6739 fprintf (f, "reload_out (%s) = ",
6740 GET_MODE_NAME (reload_outmode[r]));
6741 print_inline_rtx (f, reload_out[r], 24);
6742 fprintf (f, "\n\t");
6743 }
6744
6745 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6746
6747 fprintf (f, "%s (opnum = %d)",
6748 reload_when_needed_name[(int) reload_when_needed[r]],
6749 reload_opnum[r]);
6750
6751 if (reload_optional[r])
6752 fprintf (f, ", optional");
6753
6754 if (reload_nongroup[r])
6755 fprintf (stderr, ", nongroup");
6756
6757 if (reload_inc[r] != 0)
6758 fprintf (f, ", inc by %d", reload_inc[r]);
6759
6760 if (reload_nocombine[r])
6761 fprintf (f, ", can't combine");
6762
6763 if (reload_secondary_p[r])
6764 fprintf (f, ", secondary_reload_p");
6765
6766 if (reload_in_reg[r] != 0)
6767 {
6768 fprintf (f, "\n\treload_in_reg: ");
6769 print_inline_rtx (f, reload_in_reg[r], 24);
6770 }
6771
6772 if (reload_out_reg[r] != 0)
6773 {
6774 fprintf (f, "\n\treload_out_reg: ");
6775 print_inline_rtx (f, reload_out_reg[r], 24);
6776 }
6777
6778 if (reload_reg_rtx[r] != 0)
6779 {
6780 fprintf (f, "\n\treload_reg_rtx: ");
6781 print_inline_rtx (f, reload_reg_rtx[r], 24);
6782 }
6783
6784 prefix = "\n\t";
6785 if (reload_secondary_in_reload[r] != -1)
6786 {
6787 fprintf (f, "%ssecondary_in_reload = %d",
6788 prefix, reload_secondary_in_reload[r]);
6789 prefix = ", ";
6790 }
6791
6792 if (reload_secondary_out_reload[r] != -1)
6793 fprintf (f, "%ssecondary_out_reload = %d\n",
6794 prefix, reload_secondary_out_reload[r]);
6795
6796 prefix = "\n\t";
6797 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6798 {
6799 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6800 insn_name[reload_secondary_in_icode[r]]);
6801 prefix = ", ";
6802 }
6803
6804 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6805 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6806 insn_name[reload_secondary_out_icode[r]]);
6807
6808 fprintf (f, "\n");
6809 }
6810}
6811
6812void
6813debug_reload ()
6814{
6815 debug_reload_to_stream (stderr);
6816}