1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
21
22
23/* $FreeBSD: head/contrib/gcc/reload.c 90285 2002-02-06 05:01:51Z obrien $ */
24
25
26/* This file contains subroutines used only from the file reload1.c.
27 It knows how to scan one insn for operands and values
28 that need to be copied into registers to make valid code.
29 It also finds other operands and values which are valid
30 but for which equivalent values in registers exist and
31 ought to be used instead.
32
33 Before processing the first insn of the function, call `init_reload'.

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69
70 2. Pseudo-registers that are equivalent to constants are replaced
71 with those constants if they are not in hard registers.
72
731 happens every time find_reloads is called.
742 happens only when REPLACE is 1, which is only when
75actually doing the reloads, not when just counting them.
76
77Using a reload register for several reloads in one insn:
78
79When an insn has reloads, it is considered as having three parts:
80the input reloads, the insn itself after reloading, and the output reloads.
81Reloads of values used in memory addresses are often needed for only one part.
82
83When this is so, reload_when_needed records which part needs the reload.
84Two reloads for different parts of the insn can share the same reload
85register.
86
87When a reload is used for addresses in multiple parts, or when it is
88an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
89a register with any other reload. */
90
91#define REG_OK_STRICT
92
93#include "config.h"
94#include "system.h"
95#include "rtl.h"
96#include "tm_p.h"
97#include "insn-config.h"
98#include "expr.h"
99#include "optabs.h"
100#include "recog.h"
101#include "reload.h"
102#include "regs.h"
103#include "hard-reg-set.h"
104#include "flags.h"
105#include "real.h"
106#include "output.h"
107#include "function.h"
108#include "toplev.h"
109
110#ifndef REGISTER_MOVE_COST
111#define REGISTER_MOVE_COST(m, x, y) 2
112#endif
113
114#ifndef REGNO_MODE_OK_FOR_BASE_P
115#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116#endif
117
118#ifndef REG_MODE_OK_FOR_BASE_P
119#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120#endif
121
122/* All reloads of the current insn are recorded here. See reload.h for
123 comments. */
124int n_reloads;
125struct reload rld[MAX_RELOADS];
126
127/* All the "earlyclobber" operands of the current insn
128 are recorded here. */
129int n_earlyclobbers;
130rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
131
132int reload_n_operands;
133
134/* Replacing reloads.

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164 rtx base; /* Base address for MEM. */
165 HOST_WIDE_INT start; /* Starting offset or register number. */
166 HOST_WIDE_INT end; /* Ending offset or register number. */
167};
168
169#ifdef SECONDARY_MEMORY_NEEDED
170
171/* Save MEMs needed to copy from one class of registers to another. One MEM
172 is used per mode, but normally only one or two modes are ever used.
173
174 We keep two versions, before and after register elimination. The one
175 after register elimination is record separately for each operand. This
176 is done in case the address is not valid to be sure that we separately
177 reload each. */
178
179static rtx secondary_memlocs[NUM_MACHINE_MODES];
180static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
181#endif
182

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235#define ADDR_TYPE(type) \
236 ((type) == RELOAD_FOR_INPUT_ADDRESS \
237 ? RELOAD_FOR_INPADDR_ADDRESS \
238 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
239 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 : (type)))
241
242#ifdef HAVE_SECONDARY_RELOADS
243static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
244 enum machine_mode, enum reload_type,
245 enum insn_code *));
246#endif
247static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
248static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
249static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
250static void combine_reloads PARAMS ((void));
251static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
252 enum reload_type, int, int));
253static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
254 enum machine_mode, enum machine_mode,
255 enum reg_class, int, int));
256static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
257static struct decomposition decompose PARAMS ((rtx));
258static int immune_p PARAMS ((rtx, rtx, struct decomposition));
259static int alternative_allows_memconst PARAMS ((const char *, int));
260static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
261 int, rtx, int *));
262static rtx make_memloc PARAMS ((rtx, int));
263static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
264 int, enum reload_type, int, rtx));
265static rtx subst_reg_equivs PARAMS ((rtx, rtx));
266static rtx subst_indexed_address PARAMS ((rtx));
267static void update_auto_inc_notes PARAMS ((rtx, int, int));
268static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
269 int, enum reload_type,int, rtx));
270static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
271 enum machine_mode, int,
272 enum reload_type, int));
273static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
274 int, rtx));
275static int find_inc_amount PARAMS ((rtx, rtx));
276
277#ifdef HAVE_SECONDARY_RELOADS
278
279/* Determine if any secondary reloads are needed for loading (if IN_P is
280 non-zero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
283

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352
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 use the insn. */
355
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
358
359 if (icode != CODE_FOR_nothing
360 && insn_data[(int) icode].operand[in_p].predicate
361 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
363
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
368 register. */
369
370 if (icode != CODE_FOR_nothing)
371 {
372 /* If IN_P is non-zero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
375 skip. */
376
377 enum reg_class insn_class;
378
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;
381 else
382 {
383 char insn_letter
384 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
385 insn_class
386 = (insn_letter == 'r' ? GENERAL_REGS
387 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
388
389 if (insn_class == NO_REGS)
390 abort ();
391 if (in_p
392 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
393 abort ();
394 }
395
396 /* The scratch register's constraint must start with "=&". */
397 if (insn_data[(int) icode].operand[2].constraint[0] != '='
398 || insn_data[(int) icode].operand[2].constraint[1] != '&')
399 abort ();
400
401 if (reg_class_subset_p (reload_class, insn_class))
402 mode = insn_data[(int) icode].operand[2].mode;
403 else
404 {
405 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
406 class = insn_class;
407 t_mode = insn_data[(int) icode].operand[2].mode;
408 t_class = (t_letter == 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
410 t_icode = icode;
411 icode = CODE_FOR_nothing;
412 }
413 }
414
415 /* This case isn't valid, so fail. Reload is allowed to use the same
416 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
417 in the case of a secondary register, we actually need two different
418 registers for correct code. We fail here to prevent the possibility of
419 silently generating incorrect code later.
420
421 The convention is that secondary input reloads are valid only if the
422 secondary_class is different from class. If you have such a case, you
423 can not use secondary reloads, you must work around the problem some
424 other way.
425
426 Allow this when a reload_in/out pattern is being used. I.e. assume
427 that the generated code handles this case. */
428
429 if (in_p && class == reload_class && icode == CODE_FOR_nothing
430 && t_icode == CODE_FOR_nothing)
431 abort ();
432
433 /* If we need a tertiary reload, see if we have one we can reuse or else
434 make a new one. */
435
436 if (t_class != NO_REGS)
437 {
438 for (t_reload = 0; t_reload < n_reloads; t_reload++)
439 if (rld[t_reload].secondary_p
440 && (reg_class_subset_p (t_class, rld[t_reload].class)
441 || reg_class_subset_p (rld[t_reload].class, t_class))
442 && ((in_p && rld[t_reload].inmode == t_mode)
443 || (! in_p && rld[t_reload].outmode == t_mode))
444 && ((in_p && (rld[t_reload].secondary_in_icode
445 == CODE_FOR_nothing))
446 || (! in_p &&(rld[t_reload].secondary_out_icode
447 == CODE_FOR_nothing)))
448 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
449 && MERGABLE_RELOADS (secondary_type,
450 rld[t_reload].when_needed,
451 opnum, rld[t_reload].opnum))
452 {
453 if (in_p)
454 rld[t_reload].inmode = t_mode;
455 if (! in_p)
456 rld[t_reload].outmode = t_mode;
457
458 if (reg_class_subset_p (t_class, rld[t_reload].class))
459 rld[t_reload].class = t_class;
460
461 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
462 rld[t_reload].optional &= optional;
463 rld[t_reload].secondary_p = 1;
464 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
465 opnum, rld[t_reload].opnum))
466 rld[t_reload].when_needed = RELOAD_OTHER;
467 }
468
469 if (t_reload == n_reloads)
470 {
471 /* We need to make a new tertiary reload for this register class. */
472 rld[t_reload].in = rld[t_reload].out = 0;
473 rld[t_reload].class = t_class;
474 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
475 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
476 rld[t_reload].reg_rtx = 0;
477 rld[t_reload].optional = optional;
478 rld[t_reload].inc = 0;
479 /* Maybe we could combine these, but it seems too tricky. */
480 rld[t_reload].nocombine = 1;
481 rld[t_reload].in_reg = 0;
482 rld[t_reload].out_reg = 0;
483 rld[t_reload].opnum = opnum;
484 rld[t_reload].when_needed = secondary_type;
485 rld[t_reload].secondary_in_reload = -1;
486 rld[t_reload].secondary_out_reload = -1;
487 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
488 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
489 rld[t_reload].secondary_p = 1;
490
491 n_reloads++;
492 }
493 }
494
495 /* See if we can reuse an existing secondary reload. */
496 for (s_reload = 0; s_reload < n_reloads; s_reload++)
497 if (rld[s_reload].secondary_p
498 && (reg_class_subset_p (class, rld[s_reload].class)
499 || reg_class_subset_p (rld[s_reload].class, class))
500 && ((in_p && rld[s_reload].inmode == mode)
501 || (! in_p && rld[s_reload].outmode == mode))
502 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
503 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
504 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
505 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
506 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
507 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
508 opnum, rld[s_reload].opnum))
509 {
510 if (in_p)
511 rld[s_reload].inmode = mode;
512 if (! in_p)
513 rld[s_reload].outmode = mode;
514
515 if (reg_class_subset_p (class, rld[s_reload].class))
516 rld[s_reload].class = class;
517
518 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
519 rld[s_reload].optional &= optional;
520 rld[s_reload].secondary_p = 1;
521 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
522 opnum, rld[s_reload].opnum))
523 rld[s_reload].when_needed = RELOAD_OTHER;
524 }
525
526 if (s_reload == n_reloads)
527 {
528#ifdef SECONDARY_MEMORY_NEEDED
529 /* If we need a memory location to copy between the two reload regs,
530 set it up now. Note that we do the input case before making
531 the reload and the output case after. This is due to the
532 way reloads are output. */
533
534 if (in_p && icode == CODE_FOR_nothing
535 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
536 {
537 get_secondary_mem (x, reload_mode, opnum, type);
538
539 /* We may have just added new reloads. Make sure we add
540 the new reload at the end. */
541 s_reload = n_reloads;
542 }
543#endif
544
545 /* We need to make a new secondary reload for this register class. */
546 rld[s_reload].in = rld[s_reload].out = 0;
547 rld[s_reload].class = class;
548
549 rld[s_reload].inmode = in_p ? mode : VOIDmode;
550 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
551 rld[s_reload].reg_rtx = 0;
552 rld[s_reload].optional = optional;
553 rld[s_reload].inc = 0;
554 /* Maybe we could combine these, but it seems too tricky. */
555 rld[s_reload].nocombine = 1;
556 rld[s_reload].in_reg = 0;
557 rld[s_reload].out_reg = 0;
558 rld[s_reload].opnum = opnum;
559 rld[s_reload].when_needed = secondary_type;
560 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
561 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
562 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
563 rld[s_reload].secondary_out_icode
564 = ! in_p ? t_icode : CODE_FOR_nothing;
565 rld[s_reload].secondary_p = 1;
566
567 n_reloads++;
568
569#ifdef SECONDARY_MEMORY_NEEDED
570 if (! in_p && icode == CODE_FOR_nothing
571 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
572 get_secondary_mem (x, mode, opnum, type);
573#endif
574 }
575
576 *picode = icode;
577 return s_reload;
578}
579#endif /* HAVE_SECONDARY_RELOADS */
580
581#ifdef SECONDARY_MEMORY_NEEDED
582
583/* Return a memory location that will be used to copy X in mode MODE.
584 If we haven't already made a location for this mode in this insn,
585 call find_reloads_address on the location being returned. */
586
587rtx
588get_secondary_mem (x, mode, opnum, type)
589 rtx x ATTRIBUTE_UNUSED;
590 enum machine_mode mode;
591 int opnum;
592 enum reload_type type;
593{
594 rtx loc;
595 int mem_valid;
596
597 /* By default, if MODE is narrower than a word, widen it to a word.
598 This is required because most machines that require these memory
599 locations do not support short load and stores from all registers
600 (e.g., FP registers). */
601
602#ifdef SECONDARY_MEMORY_NEEDED_MODE
603 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
604#else
605 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
606 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
607#endif
608
609 /* If we already have made a MEM for this operand in MODE, return it. */
610 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
611 return secondary_memlocs_elim[(int) mode][opnum];
612
613 /* If this is the first time we've tried to get a MEM for this mode,
614 allocate a new one. `something_changed' in reload will get set
615 by noticing that the frame size has changed. */
616
617 if (secondary_memlocs[(int) mode] == 0)
618 {
619#ifdef SECONDARY_MEMORY_NEEDED_RTX
620 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
621#else

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641 don't save it. */
642
643 if (! mem_valid)
644 {
645 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
646 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
647 : RELOAD_OTHER);
648
649 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0),
650 opnum, type, 0, 0);
651 }
652
653 secondary_memlocs_elim[(int) mode][opnum] = loc;
654 return loc;
655}
656
657/* Clear any secondary memory locations we've made. */
658
659void
660clear_secondary_mem ()
661{
662 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
663}
664#endif /* SECONDARY_MEMORY_NEEDED */
665
666/* Find the largest class for which every register number plus N is valid in
667 M1 (if in range). Abort if no such class exists. */
668
669static enum reg_class
670find_valid_class (m1, n)
671 enum machine_mode m1 ATTRIBUTE_UNUSED;
672 int n;
673{
674 int class;
675 int regno;
676 enum reg_class best_class = NO_REGS;
677 unsigned int best_size = 0;
678
679 for (class = 1; class < N_REG_CLASSES; class++)
680 {
681 int bad = 0;
682 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
683 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
684 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
685 && ! HARD_REGNO_MODE_OK (regno + n, m1))

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697
698/* Return the number of a previously made reload that can be combined with
699 a new one, or n_reloads if none of the existing reloads can be used.
700 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
701 push_reload, they determine the kind of the new reload that we try to
702 combine. P_IN points to the corresponding value of IN, which can be
703 modified by this function.
704 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
705
706static int
707find_reusable_reload (p_in, out, class, type, opnum, dont_share)
708 rtx *p_in, out;
709 enum reg_class class;
710 enum reload_type type;
711 int opnum, dont_share;
712{
713 rtx in = *p_in;
714 int i;
715 /* We can't merge two reloads if the output of either one is
716 earlyclobbered. */
717
718 if (earlyclobber_operand_p (out))
719 return n_reloads;
720
721 /* We can use an existing reload if the class is right
722 and at least one of IN and OUT is a match
723 and the other is at worst neutral.
724 (A zero compared against anything is neutral.)
725
726 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
727 for the same thing since that can cause us to need more reload registers
728 than we otherwise would. */
729
730 for (i = 0; i < n_reloads; i++)
731 if ((reg_class_subset_p (class, rld[i].class)
732 || reg_class_subset_p (rld[i].class, class))
733 /* If the existing reload has a register, it must fit our class. */
734 && (rld[i].reg_rtx == 0
735 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
736 true_regnum (rld[i].reg_rtx)))
737 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
738 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
739 || (out != 0 && MATCHES (rld[i].out, out)
740 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
741 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
742 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
743 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
744 return i;
745
746 /* Reloading a plain reg for input can match a reload to postincrement
747 that reg, since the postincrement's value is the right value.
748 Likewise, it can match a preincrement reload, since we regard
749 the preincrementation as happening before any ref in this insn
750 to that register. */
751 for (i = 0; i < n_reloads; i++)
752 if ((reg_class_subset_p (class, rld[i].class)
753 || reg_class_subset_p (rld[i].class, class))
754 /* If the existing reload has a register, it must fit our
755 class. */
756 && (rld[i].reg_rtx == 0
757 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
758 true_regnum (rld[i].reg_rtx)))
759 && out == 0 && rld[i].out == 0 && rld[i].in != 0
760 && ((GET_CODE (in) == REG
761 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
762 && MATCHES (XEXP (rld[i].in, 0), in))
763 || (GET_CODE (rld[i].in) == REG
764 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
765 && MATCHES (XEXP (in, 0), rld[i].in)))
766 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
767 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
768 && MERGABLE_RELOADS (type, rld[i].when_needed,
769 opnum, rld[i].opnum))
770 {
771 /* Make sure reload_in ultimately has the increment,
772 not the plain register. */
773 if (GET_CODE (in) == REG)
774 *p_in = rld[i].in;
775 return i;
776 }
777 return n_reloads;
778}
779
780/* Return nonzero if X is a SUBREG which will require reloading of its
781 SUBREG_REG expression. */
782
783static int
784reload_inner_reg_of_subreg (x, mode)
785 rtx x;
786 enum machine_mode mode;
787{
788 rtx inner;
789
790 /* Only SUBREGs are problematical. */
791 if (GET_CODE (x) != SUBREG)
792 return 0;
793
794 inner = SUBREG_REG (x);
795
796 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
797 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
798 return 1;
799
800 /* If INNER is not a hard register, then INNER will not need to
801 be reloaded. */
802 if (GET_CODE (inner) != REG
803 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
804 return 0;
805
806 /* If INNER is not ok for MODE, then INNER will need reloading. */
807 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
808 return 1;
809
810 /* If the outer part is a word or smaller, INNER larger than a
811 word and the number of regs for INNER is not the same as the
812 number of words in INNER, then INNER will need reloading. */
813 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
814 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
815 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
816 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
817}
818
819/* Record one reload that needs to be performed.
820 IN is an rtx saying where the data are to be found before this instruction.
821 OUT says where they must be stored after the instruction.
822 (IN is zero for data not read, and OUT is zero for data not written.)
823 INLOC and OUTLOC point to the places in the instructions where
824 IN and OUT were found.
825 If IN and OUT are both non-zero, it means the same register must be used
826 to reload both IN and OUT.

--- 17 unchanged lines hidden (view full) ---

844 If both IN and OUT are nonzero, in some rare cases we might
845 want to make two separate reloads. (Actually we never do this now.)
846 Therefore, the reload-number for OUT is stored in
847 output_reloadnum when we return; the return value applies to IN.
848 Usually (presently always), when IN and OUT are nonzero,
849 the two reload-numbers are equal, but the caller should be careful to
850 distinguish them. */
851
852int
853push_reload (in, out, inloc, outloc, class,
854 inmode, outmode, strict_low, optional, opnum, type)
855 rtx in, out;
856 rtx *inloc, *outloc;
857 enum reg_class class;
858 enum machine_mode inmode, outmode;
859 int strict_low;
860 int optional;
861 int opnum;
862 enum reload_type type;
863{
864 int i;
865 int dont_share = 0;
866 int dont_remove_subreg = 0;
867 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
868 int secondary_in_reload = -1, secondary_out_reload = -1;
869 enum insn_code secondary_in_icode = CODE_FOR_nothing;
870 enum insn_code secondary_out_icode = CODE_FOR_nothing;
871
872 /* INMODE and/or OUTMODE could be VOIDmode if no mode
873 has been specified for the operand. In that case,
874 use the operand's mode as the mode to reload. */
875 if (inmode == VOIDmode && in != 0)
876 inmode = GET_MODE (in);
877 if (outmode == VOIDmode && out != 0)
878 outmode = GET_MODE (out);
879
880 /* If IN is a pseudo register everywhere-equivalent to a constant, and
881 it is not in a hard register, reload straight from the constant,
882 since we want to get rid of such pseudo registers.
883 Often this is done earlier, but not always in find_reloads_address. */
884 if (in != 0 && GET_CODE (in) == REG)
885 {
886 int regno = REGNO (in);
887
888 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
889 && reg_equiv_constant[regno] != 0)
890 in = reg_equiv_constant[regno];
891 }
892
893 /* Likewise for OUT. Of course, OUT will never be equivalent to
894 an actual constant, but it might be equivalent to a memory location
895 (in the case of a parameter). */
896 if (out != 0 && GET_CODE (out) == REG)
897 {
898 int regno = REGNO (out);
899
900 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
901 && reg_equiv_constant[regno] != 0)
902 out = reg_equiv_constant[regno];
903 }
904
905 /* If we have a read-write operand with an address side-effect,
906 change either IN or OUT so the side-effect happens only once. */
907 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
908 switch (GET_CODE (XEXP (in, 0)))
909 {
910 case POST_INC: case POST_DEC: case POST_MODIFY:
911 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
912 break;
913
914 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
915 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
916 break;
917
918 default:
919 break;
920 }
921
922 /* If we are reloading a (SUBREG constant ...), really reload just the
923 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
924 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
925 a pseudo and hence will become a MEM) with M1 wider than M2 and the
926 register is a pseudo, also reload the inside expression.
927 For machines that extend byte loads, do this for any SUBREG of a pseudo
928 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
929 M2 is an integral mode that gets extended when loaded.

--- 9 unchanged lines hidden (view full) ---

939 Similarly, we must reload the inside expression if we have a
940 STRICT_LOW_PART (presumably, in == out in the cas).
941
942 Also reload the inner expression if it does not require a secondary
943 reload but the SUBREG does.
944
945 Finally, reload the inner expression if it is a register that is in
946 the class whose registers cannot be referenced in a different size
947 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
948 cannot reload just the inside since we might end up with the wrong
949 register class. But if it is inside a STRICT_LOW_PART, we have
950 no choice, so we hope we do get the right register class there. */
951
952 if (in != 0 && GET_CODE (in) == SUBREG
953 && (subreg_lowpart_p (in) || strict_low)
954#ifdef CLASS_CANNOT_CHANGE_MODE
955 && (class != CLASS_CANNOT_CHANGE_MODE
956 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
957#endif
958 && (CONSTANT_P (SUBREG_REG (in))
959 || GET_CODE (SUBREG_REG (in)) == PLUS
960 || strict_low
961 || (((GET_CODE (SUBREG_REG (in)) == REG
962 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
963 || GET_CODE (SUBREG_REG (in)) == MEM)
964 && ((GET_MODE_SIZE (inmode)

--- 14 unchanged lines hidden (view full) ---

979 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
980 / UNITS_PER_WORD)))
981#endif
982 ))
983 || (GET_CODE (SUBREG_REG (in)) == REG
984 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
985 /* The case where out is nonzero
986 is handled differently in the following statement. */
987 && (out == 0 || subreg_lowpart_p (in))
988 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
989 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
990 > UNITS_PER_WORD)
991 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
992 / UNITS_PER_WORD)
993 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
994 GET_MODE (SUBREG_REG (in)))))
995 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
996#ifdef SECONDARY_INPUT_RELOAD_CLASS
997 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
998 && (SECONDARY_INPUT_RELOAD_CLASS (class,
999 GET_MODE (SUBREG_REG (in)),
1000 SUBREG_REG (in))
1001 == NO_REGS))
1002#endif
1003#ifdef CLASS_CANNOT_CHANGE_MODE
1004 || (GET_CODE (SUBREG_REG (in)) == REG
1005 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1006 && (TEST_HARD_REG_BIT
1007 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1008 REGNO (SUBREG_REG (in))))
1009 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1010 inmode))
1011#endif
1012 ))
1013 {
1014 in_subreg_loc = inloc;
1015 inloc = &SUBREG_REG (in);
1016 in = *inloc;
1017#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1018 if (GET_CODE (in) == MEM)

--- 8 unchanged lines hidden (view full) ---

1027 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1028 either M1 is not valid for R or M2 is wider than a word but we only
1029 need one word to store an M2-sized quantity in R.
1030
1031 However, we must reload the inner reg *as well as* the subreg in
1032 that case. */
1033
1034 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1035 code above. This can happen if SUBREG_BYTE != 0. */
1036
1037 if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
1038 {
1039 enum reg_class in_class = class;
1040
1041 if (GET_CODE (SUBREG_REG (in)) == REG)
1042 in_class
1043 = find_valid_class (inmode,
1044 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1045 GET_MODE (SUBREG_REG (in)),
1046 SUBREG_BYTE (in),
1047 GET_MODE (in)));
1048
1049 /* This relies on the fact that emit_reload_insns outputs the
1050 instructions for input reloads of type RELOAD_OTHER in the same
1051 order as the reloads. Thus if the outer reload is also of type
1052 RELOAD_OTHER, we are guaranteed that this inner reload will be
1053 output before the outer reload. */
1054 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1055 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1056 dont_remove_subreg = 1;
1057 }
1058
1059 /* Similarly for paradoxical and problematical SUBREGs on the output.
1060 Note that there is no reason we need worry about the previous value
1061 of SUBREG_REG (out); even if wider than out,
1062 storing in a subreg is entitled to clobber it all
1063 (except in the case of STRICT_LOW_PART,
1064 and in that case the constraint should label it input-output.) */
1065 if (out != 0 && GET_CODE (out) == SUBREG
1066 && (subreg_lowpart_p (out) || strict_low)
1067#ifdef CLASS_CANNOT_CHANGE_MODE
1068 && (class != CLASS_CANNOT_CHANGE_MODE
1069 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1070 outmode))
1071#endif
1072 && (CONSTANT_P (SUBREG_REG (out))
1073 || strict_low
1074 || (((GET_CODE (SUBREG_REG (out)) == REG
1075 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1076 || GET_CODE (SUBREG_REG (out)) == MEM)
1077 && ((GET_MODE_SIZE (outmode)
1078 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1079#ifdef WORD_REGISTER_OPERATIONS
1080 || ((GET_MODE_SIZE (outmode)
1081 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1082 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1083 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1084 / UNITS_PER_WORD)))
1085#endif
1086 ))
1087 || (GET_CODE (SUBREG_REG (out)) == REG
1088 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1089 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1090 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1091 > UNITS_PER_WORD)
1092 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1093 / UNITS_PER_WORD)
1094 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1095 GET_MODE (SUBREG_REG (out)))))
1096 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1097#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1098 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1099 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1100 GET_MODE (SUBREG_REG (out)),
1101 SUBREG_REG (out))
1102 == NO_REGS))
1103#endif
1104#ifdef CLASS_CANNOT_CHANGE_MODE
1105 || (GET_CODE (SUBREG_REG (out)) == REG
1106 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1107 && (TEST_HARD_REG_BIT
1108 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1109 REGNO (SUBREG_REG (out))))
1110 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1111 outmode))
1112#endif
1113 ))
1114 {
1115 out_subreg_loc = outloc;
1116 outloc = &SUBREG_REG (out);
1117 out = *outloc;
1118#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1119 if (GET_CODE (out) == MEM
1120 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1121 abort ();
1122#endif
1123 outmode = GET_MODE (out);
1124 }
1125
1126 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1127 either M1 is not valid for R or M2 is wider than a word but we only
1128 need one word to store an M2-sized quantity in R.
1129
1130 However, we must reload the inner reg *as well as* the subreg in
1131 that case. In this case, the inner reg is an in-out reload. */
1132
1133 if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
1134 {
1135 /* This relies on the fact that emit_reload_insns outputs the
1136 instructions for output reloads of type RELOAD_OTHER in reverse
1137 order of the reloads. Thus if the outer reload is also of type
1138 RELOAD_OTHER, we are guaranteed that this inner reload will be
1139 output after the outer reload. */
1140 dont_remove_subreg = 1;
1141 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1142 &SUBREG_REG (out),
1143 find_valid_class (outmode,
1144 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1145 GET_MODE (SUBREG_REG (out)),
1146 SUBREG_BYTE (out),
1147 GET_MODE (out))),
1148 VOIDmode, VOIDmode, 0, 0,
1149 opnum, RELOAD_OTHER);
1150 }
1151
1152 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1153 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1154 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1155 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1156 dont_share = 1;
1157
1158 /* If IN is a SUBREG of a hard register, make a new REG. This
1159 simplifies some of the cases below. */
1160
1161 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1162 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1163 && ! dont_remove_subreg)
1164 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1165
1166 /* Similarly for OUT. */
1167 if (out != 0 && GET_CODE (out) == SUBREG
1168 && GET_CODE (SUBREG_REG (out)) == REG
1169 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1170 && ! dont_remove_subreg)
1171 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1172
1173 /* Narrow down the class of register wanted if that is
1174 desirable on this machine for efficiency. */
1175 if (in != 0)
1176 class = PREFERRED_RELOAD_CLASS (in, class);
1177
1178 /* Output reloads may need analogous treatment, different in detail. */
1179#ifdef PREFERRED_OUTPUT_RELOAD_CLASS

--- 87 unchanged lines hidden (view full) ---

1267 /* We found no existing reload suitable for re-use.
1268 So add an additional reload. */
1269
1270#ifdef SECONDARY_MEMORY_NEEDED
1271 /* If a memory location is needed for the copy, make one. */
1272 if (in != 0 && GET_CODE (in) == REG
1273 && REGNO (in) < FIRST_PSEUDO_REGISTER
1274 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1275 class, inmode))
1276 get_secondary_mem (in, inmode, opnum, type);
1277#endif
1278
1279 i = n_reloads;
1280 rld[i].in = in;
1281 rld[i].out = out;
1282 rld[i].class = class;
1283 rld[i].inmode = inmode;
1284 rld[i].outmode = outmode;
1285 rld[i].reg_rtx = 0;
1286 rld[i].optional = optional;
1287 rld[i].inc = 0;
1288 rld[i].nocombine = 0;
1289 rld[i].in_reg = inloc ? *inloc : 0;
1290 rld[i].out_reg = outloc ? *outloc : 0;
1291 rld[i].opnum = opnum;
1292 rld[i].when_needed = type;
1293 rld[i].secondary_in_reload = secondary_in_reload;
1294 rld[i].secondary_out_reload = secondary_out_reload;
1295 rld[i].secondary_in_icode = secondary_in_icode;
1296 rld[i].secondary_out_icode = secondary_out_icode;
1297 rld[i].secondary_p = 0;
1298
1299 n_reloads++;
1300
1301#ifdef SECONDARY_MEMORY_NEEDED
1302 if (out != 0 && GET_CODE (out) == REG
1303 && REGNO (out) < FIRST_PSEUDO_REGISTER
1304 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1305 outmode))

--- 5 unchanged lines hidden (view full) ---

1311 /* We are reusing an existing reload,
1312 but we may have additional information for it.
1313 For example, we may now have both IN and OUT
1314 while the old one may have just one of them. */
1315
1316 /* The modes can be different. If they are, we want to reload in
1317 the larger mode, so that the value is valid for both modes. */
1318 if (inmode != VOIDmode
1319 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1320 rld[i].inmode = inmode;
1321 if (outmode != VOIDmode
1322 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1323 rld[i].outmode = outmode;
1324 if (in != 0)
1325 {
1326 rtx in_reg = inloc ? *inloc : 0;
1327 /* If we merge reloads for two distinct rtl expressions that
1328 are identical in content, there might be duplicate address
1329 reloads. Remove the extra set now, so that if we later find
1330 that we can inherit this reload, we can get rid of the
1331 address reloads altogether.
1332
1333 Do not do this if both reloads are optional since the result
1334 would be an optional reload which could potentially leave
1335 unresolved address replacements.
1336
1337 It is not sufficient to call transfer_replacements since
1338 choose_reload_regs will remove the replacements for address
1339 reloads of inherited reloads which results in the same
1340 problem. */
1341 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1342 && ! (rld[i].optional && optional))
1343 {
1344 /* We must keep the address reload with the lower operand
1345 number alive. */
1346 if (opnum > rld[i].opnum)
1347 {
1348 remove_address_replacements (in);
1349 in = rld[i].in;
1350 in_reg = rld[i].in_reg;
1351 }
1352 else
1353 remove_address_replacements (rld[i].in);
1354 }
1355 rld[i].in = in;
1356 rld[i].in_reg = in_reg;
1357 }
1358 if (out != 0)
1359 {
1360 rld[i].out = out;
1361 rld[i].out_reg = outloc ? *outloc : 0;
1362 }
1363 if (reg_class_subset_p (class, rld[i].class))
1364 rld[i].class = class;
1365 rld[i].optional &= optional;
1366 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1367 opnum, rld[i].opnum))
1368 rld[i].when_needed = RELOAD_OTHER;
1369 rld[i].opnum = MIN (rld[i].opnum, opnum);
1370 }
1371
1372 /* If the ostensible rtx being reloaded differs from the rtx found
1373 in the location to substitute, this reload is not safe to combine
1374 because we cannot reliably tell whether it appears in the insn. */
1375
1376 if (in != 0 && in != *inloc)
1377 rld[i].nocombine = 1;
1378
1379#if 0
1380 /* This was replaced by changes in find_reloads_address_1 and the new
1381 function inc_for_reload, which go with a new meaning of reload_inc. */
1382
1383 /* If this is an IN/OUT reload in an insn that sets the CC,
1384 it must be for an autoincrement. It doesn't work to store
1385 the incremented value after the insn because that would clobber the CC.
1386 So we must do the increment of the value reloaded from,
1387 increment it, store it back, then decrement again. */
1388 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1389 {
1390 out = 0;
1391 rld[i].out = 0;
1392 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1393 /* If we did not find a nonzero amount-to-increment-by,
1394 that contradicts the belief that IN is being incremented
1395 in an address in this insn. */
1396 if (rld[i].inc == 0)
1397 abort ();
1398 }
1399#endif
1400
1401 /* If we will replace IN and OUT with the reload-reg,
1402 record where they are located so that substitution need
1403 not do a tree walk. */
1404
1405 if (replace_reloads)
1406 {
1407 if (inloc != 0)
1408 {
1409 struct replacement *r = &replacements[n_replacements++];
1410 r->what = i;
1411 r->subreg_loc = in_subreg_loc;
1412 r->where = inloc;
1413 r->mode = inmode;
1414 }
1415 if (outloc != 0 && outloc != inloc)
1416 {
1417 struct replacement *r = &replacements[n_replacements++];
1418 r->what = i;
1419 r->where = outloc;
1420 r->subreg_loc = out_subreg_loc;
1421 r->mode = outmode;
1422 }
1423 }
1424
1425 /* If this reload is just being introduced and it has both
1426 an incoming quantity and an outgoing quantity that are
1427 supposed to be made to match, see if either one of the two
1428 can serve as the place to reload into.
1429
1430 If one of them is acceptable, set rld[i].reg_rtx
1431 to that one. */
1432
1433 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1434 {
1435 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1436 inmode, outmode,
1437 rld[i].class, i,
1438 earlyclobber_operand_p (out));
1439
1440 /* If the outgoing register already contains the same value
1441 as the incoming one, we can dispense with loading it.
1442 The easiest way to tell the caller that is to give a phony
1443 value for the incoming operand (same as outgoing one). */
1444 if (rld[i].reg_rtx == out
1445 && (GET_CODE (in) == REG || CONSTANT_P (in))
1446 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1447 static_reload_reg_p, i, inmode))
1448 rld[i].in = out;
1449 }
1450
1451 /* If this is an input reload and the operand contains a register that
1452 dies in this insn and is used nowhere else, see if it is the right class
1453 to be used for this reload. Use it if so. (This occurs most commonly
1454 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1455 this if it is also an output reload that mentions the register unless
1456 the output is a SUBREG that clobbers an entire register.
1457
1458 Note that the operand might be one of the spill regs, if it is a
1459 pseudo reg and we are in a block where spilling has not taken place.
1460 But if there is no spilling in this block, that is OK.
1461 An explicitly used hard reg cannot be a spill reg. */
1462
1463 if (rld[i].reg_rtx == 0 && in != 0)
1464 {
1465 rtx note;
1466 int regno;
1467 enum machine_mode rel_mode = inmode;
1468
1469 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1470 rel_mode = outmode;
1471
1472 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1473 if (REG_NOTE_KIND (note) == REG_DEAD
1474 && GET_CODE (XEXP (note, 0)) == REG
1475 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1476 && reg_mentioned_p (XEXP (note, 0), in)
1477 && ! refers_to_regno_for_reload_p (regno,
1478 (regno
1479 + HARD_REGNO_NREGS (regno,
1480 rel_mode)),
1481 PATTERN (this_insn), inloc)
1482 /* If this is also an output reload, IN cannot be used as
1483 the reload register if it is set in this insn unless IN
1484 is also OUT. */
1485 && (out == 0 || in == out
1486 || ! hard_reg_set_here_p (regno,
1487 (regno
1488 + HARD_REGNO_NREGS (regno,
1489 rel_mode)),
1490 PATTERN (this_insn)))
1491 /* ??? Why is this code so different from the previous?
1492 Is there any simple coherent way to describe the two together?
1493 What's going on here. */
1494 && (in != out
1495 || (GET_CODE (in) == SUBREG
1496 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1497 / UNITS_PER_WORD)
1498 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1499 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1500 /* Make sure the operand fits in the reg that dies. */
1501 && (GET_MODE_SIZE (rel_mode)
1502 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1503 && HARD_REGNO_MODE_OK (regno, inmode)
1504 && HARD_REGNO_MODE_OK (regno, outmode))
1505 {
1506 unsigned int offs;
1507 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1508 HARD_REGNO_NREGS (regno, outmode));
1509
1510 for (offs = 0; offs < nregs; offs++)
1511 if (fixed_regs[regno + offs]
1512 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1513 regno + offs))
1514 break;
1515
1516 if (offs == nregs)
1517 {
1518 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1519 break;
1520 }
1521 }
1522 }
1523
1524 if (out)
1525 output_reloadnum = i;
1526

--- 9 unchanged lines hidden (view full) ---

1536static void
1537push_replacement (loc, reloadnum, mode)
1538 rtx *loc;
1539 int reloadnum;
1540 enum machine_mode mode;
1541{
1542 if (replace_reloads)
1543 {
1544 struct replacement *r = &replacements[n_replacements++];
1545 r->what = reloadnum;
1546 r->where = loc;
1547 r->subreg_loc = 0;
1548 r->mode = mode;
1549 }
1550}
1551
1552/* Transfer all replacements that used to be in reload FROM to be in

--- 17 unchanged lines hidden (view full) ---

1570int
1571remove_address_replacements (in_rtx)
1572 rtx in_rtx;
1573{
1574 int i, j;
1575 char reload_flags[MAX_RELOADS];
1576 int something_changed = 0;
1577
1578 memset (reload_flags, 0, sizeof reload_flags);
1579 for (i = 0, j = 0; i < n_replacements; i++)
1580 {
1581 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1582 reload_flags[replacements[i].what] |= 1;
1583 else
1584 {
1585 replacements[j++] = replacements[i];
1586 reload_flags[replacements[i].what] |= 2;
1587 }
1588 }
1589 /* Note that the following store must be done before the recursive calls. */
1590 n_replacements = j;
1591
1592 for (i = n_reloads - 1; i >= 0; i--)
1593 {
1594 if (reload_flags[i] == 1)
1595 {
1596 deallocate_reload_reg (i);
1597 remove_address_replacements (rld[i].in);
1598 rld[i].in = 0;
1599 something_changed = 1;
1600 }
1601 }
1602 return something_changed;
1603}
1604
1605/* If there is only one output reload, and it is not for an earlyclobber
1606 operand, try to combine it with a (logically unrelated) input reload
1607 to reduce the number of reload registers needed.
1608
1609 This is safe if the input reload does not appear in
1610 the value being output-reloaded, because this implies
1611 it is not needed any more once the original insn completes.

--- 9 unchanged lines hidden (view full) ---

1621 int output_reload = -1;
1622 int secondary_out = -1;
1623 rtx note;
1624
1625 /* Find the output reload; return unless there is exactly one
1626 and that one is mandatory. */
1627
1628 for (i = 0; i < n_reloads; i++)
1629 if (rld[i].out != 0)
1630 {
1631 if (output_reload >= 0)
1632 return;
1633 output_reload = i;
1634 }
1635
1636 if (output_reload < 0 || rld[output_reload].optional)
1637 return;
1638
1639 /* An input-output reload isn't combinable. */
1640
1641 if (rld[output_reload].in != 0)
1642 return;
1643
1644 /* If this reload is for an earlyclobber operand, we can't do anything. */
1645 if (earlyclobber_operand_p (rld[output_reload].out))
1646 return;
1647
1648 /* If there is a reload for part of the address of this operand, we would
1649 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1650 its life to the point where doing this combine would not lower the
1651 number of spill registers needed. */
1652 for (i = 0; i < n_reloads; i++)
1653 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1654 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1655 && rld[i].opnum == rld[output_reload].opnum)
1656 return;
1657
1658 /* Check each input reload; can we combine it? */
1659
1660 for (i = 0; i < n_reloads; i++)
1661 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1662 /* Life span of this reload must not extend past main insn. */
1663 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1664 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1665 && rld[i].when_needed != RELOAD_OTHER
1666 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1667 == CLASS_MAX_NREGS (rld[output_reload].class,
1668 rld[output_reload].outmode))
1669 && rld[i].inc == 0
1670 && rld[i].reg_rtx == 0
1671#ifdef SECONDARY_MEMORY_NEEDED
1672 /* Don't combine two reloads with different secondary
1673 memory locations. */
1674 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1675 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1676 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1677 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1678#endif
1679 && (SMALL_REGISTER_CLASSES
1680 ? (rld[i].class == rld[output_reload].class)
1681 : (reg_class_subset_p (rld[i].class,
1682 rld[output_reload].class)
1683 || reg_class_subset_p (rld[output_reload].class,
1684 rld[i].class)))
1685 && (MATCHES (rld[i].in, rld[output_reload].out)
1686 /* Args reversed because the first arg seems to be
1687 the one that we imagine being modified
1688 while the second is the one that might be affected. */
1689 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1690 rld[i].in)
1691 /* However, if the input is a register that appears inside
1692 the output, then we also can't share.
1693 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1694 If the same reload reg is used for both reg 69 and the
1695 result to be stored in memory, then that result
1696 will clobber the address of the memory ref. */
1697 && ! (GET_CODE (rld[i].in) == REG
1698 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1699 rld[output_reload].out))))
1700 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
1701 && (reg_class_size[(int) rld[i].class]
1702 || SMALL_REGISTER_CLASSES)
1703 /* We will allow making things slightly worse by combining an
1704 input and an output, but no worse than that. */
1705 && (rld[i].when_needed == RELOAD_FOR_INPUT
1706 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1707 {
1708 int j;
1709
1710 /* We have found a reload to combine with! */
1711 rld[i].out = rld[output_reload].out;
1712 rld[i].out_reg = rld[output_reload].out_reg;
1713 rld[i].outmode = rld[output_reload].outmode;
1714 /* Mark the old output reload as inoperative. */
1715 rld[output_reload].out = 0;
1716 /* The combined reload is needed for the entire insn. */
1717 rld[i].when_needed = RELOAD_OTHER;
1718 /* If the output reload had a secondary reload, copy it. */
1719 if (rld[output_reload].secondary_out_reload != -1)
1720 {
1721 rld[i].secondary_out_reload
1722 = rld[output_reload].secondary_out_reload;
1723 rld[i].secondary_out_icode
1724 = rld[output_reload].secondary_out_icode;
1725 }
1726
1727#ifdef SECONDARY_MEMORY_NEEDED
1728 /* Copy any secondary MEM. */
1729 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1730 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1731 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1732#endif
1733 /* If required, minimize the register class. */
1734 if (reg_class_subset_p (rld[output_reload].class,
1735 rld[i].class))
1736 rld[i].class = rld[output_reload].class;
1737
1738 /* Transfer all replacements from the old reload to the combined. */
1739 for (j = 0; j < n_replacements; j++)
1740 if (replacements[j].what == output_reload)
1741 replacements[j].what = i;
1742
1743 return;
1744 }
1745
1746 /* If this insn has only one operand that is modified or written (assumed
1747 to be the first), it must be the one corresponding to this reload. It
1748 is safe to use anything that dies in this insn for that output provided
1749 that it does not occur in the output (we already know it isn't an
1750 earlyclobber. If this is an asm insn, give up. */
1751
1752 if (INSN_CODE (this_insn) == -1)
1753 return;
1754
1755 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1756 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1757 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1758 return;
1759
1760 /* See if some hard register that dies in this insn and is not used in
1761 the output is the right class. Only works if the register we pick
1762 up can fully hold our output reload. */
1763 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1764 if (REG_NOTE_KIND (note) == REG_DEAD
1765 && GET_CODE (XEXP (note, 0)) == REG
1766 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1767 rld[output_reload].out)
1768 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1769 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1770 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1771 REGNO (XEXP (note, 0)))
1772 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1773 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1774 /* Ensure that a secondary or tertiary reload for this output
1775 won't want this register. */
1776 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1777 || (! (TEST_HARD_REG_BIT
1778 (reg_class_contents[(int) rld[secondary_out].class],
1779 REGNO (XEXP (note, 0))))
1780 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1781 || ! (TEST_HARD_REG_BIT
1782 (reg_class_contents[(int) rld[secondary_out].class],
1783 REGNO (XEXP (note, 0)))))))
1784 && ! fixed_regs[REGNO (XEXP (note, 0))])
1785 {
1786 rld[output_reload].reg_rtx
1787 = gen_rtx_REG (rld[output_reload].outmode,
1788 REGNO (XEXP (note, 0)));
1789 return;
1790 }
1791}
1792
1793/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1794 See if one of IN and OUT is a register that may be used;
1795 this is desirable since a spill-register won't be needed.
1796 If so, return the register rtx that proves acceptable.
1797
1798 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1799 CLASS is the register class required for the reload.
1800
1801 If FOR_REAL is >= 0, it is the number of the reload,
1802 and in some cases when it can be discovered that OUT doesn't need
1803 to be computed, clear out rld[FOR_REAL].out.
1804
1805 If FOR_REAL is -1, this should not be done, because this call
1806 is just to see if a register can be found, not to find and install it.
1807
1808 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1809 puts an additional constraint on being able to use IN for OUT since
1810 IN must not appear elsewhere in the insn (it is assumed that IN itself
1811 is safe from the earlyclobber). */

--- 16 unchanged lines hidden (view full) ---

1828
1829 /* If operands exceed a word, we can't use either of them
1830 unless they have the same size. */
1831 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1832 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1833 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1834 return 0;
1835
1836 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1837 respectively refers to a hard register. */
1838
1839 /* Find the inside of any subregs. */
1840 while (GET_CODE (out) == SUBREG)
1841 {
1842 if (GET_CODE (SUBREG_REG (out)) == REG
1843 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1844 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1845 GET_MODE (SUBREG_REG (out)),
1846 SUBREG_BYTE (out),
1847 GET_MODE (out));
1848 out = SUBREG_REG (out);
1849 }
1850 while (GET_CODE (in) == SUBREG)
1851 {
1852 if (GET_CODE (SUBREG_REG (in)) == REG
1853 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1854 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1855 GET_MODE (SUBREG_REG (in)),
1856 SUBREG_BYTE (in),
1857 GET_MODE (in));
1858 in = SUBREG_REG (in);
1859 }
1860
1861 /* Narrow down the reg class, the same way push_reload will;
1862 otherwise we might find a dummy now, but push_reload won't. */
1863 class = PREFERRED_RELOAD_CLASS (in, class);
1864
1865 /* See if OUT will do. */
1866 if (GET_CODE (out) == REG
1867 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1868 {
1869 unsigned int regno = REGNO (out) + out_offset;
1870 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1871 rtx saved_rtx;
1872
1873 /* When we consider whether the insn uses OUT,
1874 ignore references within IN. They don't prevent us
1875 from copying IN into OUT, because those refs would
1876 move into the insn that reloads IN.
1877
1878 However, we only ignore IN in its role as this reload.
1879 If the insn uses IN elsewhere and it contains OUT,
1880 that counts. We can't be sure it's the "same" operand
1881 so it might not go through this reload. */
1882 saved_rtx = *inloc;
1883 *inloc = const0_rtx;
1884
1885 if (regno < FIRST_PSEUDO_REGISTER
1886 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1887 PATTERN (this_insn), outloc))
1888 {
1889 unsigned int i;
1890
1891 for (i = 0; i < nwords; i++)
1892 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1893 regno + i))
1894 break;
1895
1896 if (i == nwords)
1897 {
1898 if (GET_CODE (real_out) == REG)

--- 22 unchanged lines hidden (view full) ---

1921 && HARD_REGNO_MODE_OK (REGNO (in),
1922 /* The only case where out and real_out might
1923 have different modes is where real_out
1924 is a subreg, and in that case, out
1925 has a real mode. */
1926 (GET_MODE (out) != VOIDmode
1927 ? GET_MODE (out) : outmode)))
1928 {
1929 unsigned int regno = REGNO (in) + in_offset;
1930 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1931
1932 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1933 && ! hard_reg_set_here_p (regno, regno + nwords,
1934 PATTERN (this_insn))
1935 && (! earlyclobber
1936 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1937 PATTERN (this_insn), inloc)))
1938 {
1939 unsigned int i;
1940
1941 for (i = 0; i < nwords; i++)
1942 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1943 regno + i))
1944 break;
1945
1946 if (i == nwords)
1947 {
1948 /* If we were going to use OUT as the reload reg
1949 and changed our mind, it means OUT is a dummy that
1950 dies here. So don't bother copying value to it. */
1951 if (for_real >= 0 && value == real_out)
1952 rld[for_real].out = 0;
1953 if (GET_CODE (real_in) == REG)
1954 value = real_in;
1955 else
1956 value = gen_rtx_REG (inmode, regno);
1957 }
1958 }
1959 }
1960

--- 21 unchanged lines hidden (view full) ---

1982
1983/* Return 1 if expression X alters a hard reg in the range
1984 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1985 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1986 X should be the body of an instruction. */
1987
1988static int
1989hard_reg_set_here_p (beg_regno, end_regno, x)
1990 unsigned int beg_regno, end_regno;
1991 rtx x;
1992{
1993 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1994 {
1995 rtx op0 = SET_DEST (x);
1996
1997 while (GET_CODE (op0) == SUBREG)
1998 op0 = SUBREG_REG (op0);
1999 if (GET_CODE (op0) == REG)
2000 {
2001 unsigned int r = REGNO (op0);
2002
2003 /* See if this reg overlaps range under consideration. */
2004 if (r < end_regno
2005 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2006 return 1;
2007 }
2008 }
2009 else if (GET_CODE (x) == PARALLEL)
2010 {
2011 int i = XVECLEN (x, 0) - 1;
2012
2013 for (; i >= 0; i--)
2014 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2015 return 1;
2016 }
2017
2018 return 0;
2019}
2020
2021/* Return 1 if ADDR is a valid memory address for mode MODE,
2022 and check that each pseudo reg has the proper kind of
2023 hard reg. */
2024
2025int
2026strict_memory_address_p (mode, addr)
2027 enum machine_mode mode ATTRIBUTE_UNUSED;
2028 rtx addr;
2029{
2030 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2031 return 0;
2032
2033 win:
2034 return 1;
2035}
2036

--- 9 unchanged lines hidden (view full) ---

2046
2047/* ??? To be completely correct, we should arrange to pass
2048 for X the output operand and for Y the input operand.
2049 For now, we assume that the output operand has the lower number
2050 because that is natural in (SET output (... input ...)). */
2051
2052int
2053operands_match_p (x, y)
2054 rtx x, y;
2055{
2056 int i;
2057 RTX_CODE code = GET_CODE (x);
2058 const char *fmt;
2059 int success_2;
2060
2061 if (x == y)
2062 return 1;
2063 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2064 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2065 && GET_CODE (SUBREG_REG (y)) == REG)))
2066 {
2067 int j;
2068
2069 if (code == SUBREG)
2070 {
2071 i = REGNO (SUBREG_REG (x));
2072 if (i >= FIRST_PSEUDO_REGISTER)
2073 goto slow;
2074 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2075 GET_MODE (SUBREG_REG (x)),
2076 SUBREG_BYTE (x),
2077 GET_MODE (x));
2078 }
2079 else
2080 i = REGNO (x);
2081
2082 if (GET_CODE (y) == SUBREG)
2083 {
2084 j = REGNO (SUBREG_REG (y));
2085 if (j >= FIRST_PSEUDO_REGISTER)
2086 goto slow;
2087 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2088 GET_MODE (SUBREG_REG (y)),
2089 SUBREG_BYTE (y),
2090 GET_MODE (y));
2091 }
2092 else
2093 j = REGNO (y);
2094
2095 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2096 multiple hard register group, so that for example (reg:DI 0) and
2097 (reg:SI 1) will be considered the same register. */
2098 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD

--- 5 unchanged lines hidden (view full) ---

2104
2105 return i == j;
2106 }
2107 /* If two operands must match, because they are really a single
2108 operand of an assembler insn, then two postincrements are invalid
2109 because the assembler insn would increment only once.
2110 On the other hand, an postincrement matches ordinary indexing
2111 if the postincrement is the output operand. */
2112 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2113 return operands_match_p (XEXP (x, 0), y);
2114 /* Two preincrements are invalid
2115 because the assembler insn would increment only once.
2116 On the other hand, an preincrement matches ordinary indexing
2117 if the preincrement is the input operand.
2118 In this case, return 2, since some callers need to do special
2119 things when this happens. */
2120 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2121 || GET_CODE (y) == PRE_MODIFY)
2122 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2123
2124 slow:
2125
2126 /* Now we have disposed of all the cases
2127 in which different rtx codes can match. */
2128 if (code != GET_CODE (y))
2129 return 0;
2130 if (code == LABEL_REF)
2131 return XEXP (x, 0) == XEXP (y, 0);
2132 if (code == SYMBOL_REF)
2133 return XSTR (x, 0) == XSTR (y, 0);
2134

--- 54 unchanged lines hidden (view full) ---

2189 default:
2190 abort ();
2191 }
2192 }
2193 return 1 + success_2;
2194}
2195
2196/* Describe the range of registers or memory referenced by X.
2197 If X is a register, set REG_FLAG and put the first register
2198 number into START and the last plus one into END.
2199 If X is a memory reference, put a base address into BASE
2200 and a range of integer offsets into START and END.
2201 If X is pushing on the stack, we can assume it causes no trouble,
2202 so we set the SAFE field. */
2203
2204static struct decomposition
2205decompose (x)
2206 rtx x;
2207{
2208 struct decomposition val;
2209 int all_const = 0;
2210
2211 val.reg_flag = 0;
2212 val.safe = 0;
2213 val.base = 0;
2214 if (GET_CODE (x) == MEM)
2215 {
2216 rtx base = NULL_RTX, offset = 0;
2217 rtx addr = XEXP (x, 0);
2218
2219 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2220 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2221 {
2222 val.base = XEXP (addr, 0);
2223 val.start = -GET_MODE_SIZE (GET_MODE (x));
2224 val.end = GET_MODE_SIZE (GET_MODE (x));
2225 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2226 return val;
2227 }
2228
2229 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2230 {
2231 if (GET_CODE (XEXP (addr, 1)) == PLUS
2232 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2233 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2234 {
2235 val.base = XEXP (addr, 0);
2236 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2237 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2238 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2239 return val;
2240 }
2241 }
2242
2243 if (GET_CODE (addr) == CONST)
2244 {
2245 addr = XEXP (addr, 0);
2246 all_const = 1;
2247 }
2248 if (GET_CODE (addr) == PLUS)
2249 {
2250 if (CONSTANT_P (XEXP (addr, 0)))

--- 7 unchanged lines hidden (view full) ---

2258 offset = XEXP (addr, 1);
2259 }
2260 }
2261
2262 if (offset == 0)
2263 {
2264 base = addr;
2265 offset = const0_rtx;
2266 }
2267 if (GET_CODE (offset) == CONST)
2268 offset = XEXP (offset, 0);
2269 if (GET_CODE (offset) == PLUS)
2270 {
2271 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2272 {
2273 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2274 offset = XEXP (offset, 0);

--- 24 unchanged lines hidden (view full) ---

2299 val.start = INTVAL (offset);
2300 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2301 val.base = base;
2302 return val;
2303 }
2304 else if (GET_CODE (x) == REG)
2305 {
2306 val.reg_flag = 1;
2307 val.start = true_regnum (x);
2308 if (val.start < 0)
2309 {
2310 /* A pseudo with no hard reg. */
2311 val.start = REGNO (x);
2312 val.end = val.start + 1;
2313 }
2314 else
2315 /* A hard reg. */
2316 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2317 }
2318 else if (GET_CODE (x) == SUBREG)
2319 {
2320 if (GET_CODE (SUBREG_REG (x)) != REG)
2321 /* This could be more precise, but it's good enough. */
2322 return decompose (SUBREG_REG (x));
2323 val.reg_flag = 1;
2324 val.start = true_regnum (x);
2325 if (val.start < 0)
2326 return decompose (SUBREG_REG (x));
2327 else
2328 /* A hard reg. */
2329 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2330 }
2331 else if (CONSTANT_P (x)
2332 /* This hasn't been assigned yet, so it can't conflict yet. */

--- 10 unchanged lines hidden (view full) ---

2343static int
2344immune_p (x, y, ydata)
2345 rtx x, y;
2346 struct decomposition ydata;
2347{
2348 struct decomposition xdata;
2349
2350 if (ydata.reg_flag)
2351 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2352 if (ydata.safe)
2353 return 1;
2354
2355 if (GET_CODE (y) != MEM)
2356 abort ();
2357 /* If Y is memory and X is not, Y can't affect X. */
2358 if (GET_CODE (x) != MEM)
2359 return 1;
2360
2361 xdata = decompose (x);
2362
2363 if (! rtx_equal_p (xdata.base, ydata.base))
2364 {
2365 /* If bases are distinct symbolic constants, there is no overlap. */
2366 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2367 return 1;
2368 /* Constants and stack slots never overlap. */
2369 if (CONSTANT_P (xdata.base)

--- 5 unchanged lines hidden (view full) ---

2375 && (xdata.base == frame_pointer_rtx
2376 || xdata.base == hard_frame_pointer_rtx
2377 || xdata.base == stack_pointer_rtx))
2378 return 1;
2379 /* If either base is variable, we don't know anything. */
2380 return 0;
2381 }
2382
2383 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2384}
2385
2386/* Similar, but calls decompose. */
2387
2388int
2389safe_from_earlyclobber (op, clobber)
2390 rtx op, clobber;

--- 28 unchanged lines hidden (view full) ---

2419
2420int
2421find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2422 rtx insn;
2423 int replace, ind_levels;
2424 int live_known;
2425 short *reload_reg_p;
2426{
2427 int insn_code_number;
2428 int i, j;
2429 int noperands;
2430 /* These start out as the constraints for the insn
2431 and they are chewed up as we consider alternatives. */
2432 char *constraints[MAX_RECOG_OPERANDS];
2433 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2434 a register. */
2435 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2436 char pref_or_nothing[MAX_RECOG_OPERANDS];
2437 /* Nonzero for a MEM operand whose entire address needs a reload. */
2438 int address_reloaded[MAX_RECOG_OPERANDS];
2439 /* Value of enum reload_type to use for operand. */
2440 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2441 /* Value of enum reload_type to use within address of operand. */
2442 enum reload_type address_type[MAX_RECOG_OPERANDS];
2443 /* Save the usage of each operand. */
2444 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2445 int no_input_reloads = 0, no_output_reloads = 0;
2446 int n_alternatives;
2447 int this_alternative[MAX_RECOG_OPERANDS];
2448 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2449 char this_alternative_win[MAX_RECOG_OPERANDS];
2450 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2451 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2452 int this_alternative_matches[MAX_RECOG_OPERANDS];
2453 int swapped;
2454 int goal_alternative[MAX_RECOG_OPERANDS];
2455 int this_alternative_number;
2456 int goal_alternative_number = 0;
2457 int operand_reloadnum[MAX_RECOG_OPERANDS];
2458 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2459 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2460 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2461 char goal_alternative_win[MAX_RECOG_OPERANDS];
2462 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2463 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2464 int goal_alternative_swapped;
2465 int best;
2466 int commutative;
2467 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2468 rtx substed_operand[MAX_RECOG_OPERANDS];
2469 rtx body = PATTERN (insn);
2470 rtx set = single_set (insn);
2471 int goal_earlyclobber = 0, this_earlyclobber;
2472 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2473 int retval = 0;
2474
2475 this_insn = insn;
2476 n_reloads = 0;
2477 n_replacements = 0;
2478 n_earlyclobbers = 0;
2479 replace_reloads = replace;
2480 hard_regs_live_known = live_known;
2481 static_reload_reg_p = reload_reg_p;

--- 5 unchanged lines hidden (view full) ---

2487 no_output_reloads = 1;
2488
2489#ifdef HAVE_cc0
2490 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2491 no_input_reloads = 1;
2492 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2493 no_output_reloads = 1;
2494#endif
2495
2496#ifdef SECONDARY_MEMORY_NEEDED
2497 /* The eliminated forms of any secondary memory locations are per-insn, so
2498 clear them out here. */
2499
2500 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2501#endif
2502
2503 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2504 is cheap to move between them. If it is not, there may not be an insn
2505 to do the copy, so we may need a reload. */
2506 if (GET_CODE (body) == SET
2507 && GET_CODE (SET_DEST (body)) == REG
2508 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2509 && GET_CODE (SET_SRC (body)) == REG
2510 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2511 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2512 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2513 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2514 return 0;
2515
2516 extract_insn (insn);
2517
2518 noperands = reload_n_operands = recog_data.n_operands;
2519 n_alternatives = recog_data.n_alternatives;
2520
2521 /* Just return "no reloads" if insn has no operands with constraints. */
2522 if (noperands == 0 || n_alternatives == 0)
2523 return 0;
2524
2525 insn_code_number = INSN_CODE (insn);
2526 this_insn_is_asm = insn_code_number < 0;
2527
2528 memcpy (operand_mode, recog_data.operand_mode,
2529 noperands * sizeof (enum machine_mode));
2530 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2531
2532 commutative = -1;
2533
2534 /* If we will need to know, later, whether some pair of operands
2535 are the same, we must compare them now and save the result.
2536 Reloading the base and index registers will clobber them
2537 and afterward they will fail to match. */
2538
2539 for (i = 0; i < noperands; i++)
2540 {
2541 char *p;
2542 int c;
2543
2544 substed_operand[i] = recog_data.operand[i];
2545 p = constraints[i];
2546
2547 modified[i] = RELOAD_READ;
2548
2549 /* Scan this operand's constraint to see if it is an output operand,
2550 an in-out operand, is commutative, or should match another. */
2551
2552 while ((c = *p++))
2553 {
2554 if (c == '=')
2555 modified[i] = RELOAD_WRITE;
2556 else if (c == '+')
2557 modified[i] = RELOAD_READ_WRITE;
2558 else if (c == '%')
2559 {
2560 /* The last operand should not be marked commutative. */
2561 if (i == noperands - 1)
2562 abort ();
2563
2564 commutative = i;
2565 }
2566 else if (ISDIGIT (c))
2567 {
2568 c = strtoul (p - 1, &p, 10);
2569
2570 operands_match[c][i]
2571 = operands_match_p (recog_data.operand[c],
2572 recog_data.operand[i]);
2573
2574 /* An operand may not match itself. */
2575 if (c == i)
2576 abort ();
2577
2578 /* If C can be commuted with C+1, and C might need to match I,
2579 then C+1 might also need to match I. */
2580 if (commutative >= 0)
2581 {
2582 if (c == commutative || c == commutative + 1)
2583 {
2584 int other = c + (c == commutative ? 1 : -1);
2585 operands_match[other][i]
2586 = operands_match_p (recog_data.operand[other],
2587 recog_data.operand[i]);
2588 }
2589 if (i == commutative || i == commutative + 1)
2590 {
2591 int other = i + (i == commutative ? 1 : -1);
2592 operands_match[c][other]
2593 = operands_match_p (recog_data.operand[c],
2594 recog_data.operand[other]);
2595 }
2596 /* Note that C is supposed to be less than I.
2597 No need to consider altering both C and I because in
2598 that case we would alter one into the other. */
2599 }
2600 }
2601 }
2602 }
2603
2604 /* Examine each operand that is a memory reference or memory address
2605 and reload parts of the addresses into index registers.
2606 Also here any references to pseudo regs that didn't get hard regs
2607 but are equivalent to constants get replaced in the insn itself
2608 with those constants. Nobody will ever see them again.
2609
2610 Finally, set up the preferred classes of each operand. */
2611
2612 for (i = 0; i < noperands; i++)
2613 {
2614 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2615
2616 address_reloaded[i] = 0;
2617 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2618 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2619 : RELOAD_OTHER);
2620 address_type[i]
2621 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2622 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2623 : RELOAD_OTHER);
2624
2625 if (*constraints[i] == 0)
2626 /* Ignore things like match_operator operands. */
2627 ;
2628 else if (constraints[i][0] == 'p')
2629 {
2630 find_reloads_address (VOIDmode, (rtx*) 0,
2631 recog_data.operand[i],
2632 recog_data.operand_loc[i],
2633 i, operand_type[i], ind_levels, insn);
2634
2635 /* If we now have a simple operand where we used to have a
2636 PLUS or MULT, re-recognize and try again. */
2637 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2638 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2639 && (GET_CODE (recog_data.operand[i]) == MULT
2640 || GET_CODE (recog_data.operand[i]) == PLUS))
2641 {
2642 INSN_CODE (insn) = -1;
2643 retval = find_reloads (insn, replace, ind_levels, live_known,
2644 reload_reg_p);
2645 return retval;
2646 }
2647
2648 recog_data.operand[i] = *recog_data.operand_loc[i];
2649 substed_operand[i] = recog_data.operand[i];
2650 }
2651 else if (code == MEM)
2652 {
2653 address_reloaded[i]
2654 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2655 recog_data.operand_loc[i],
2656 XEXP (recog_data.operand[i], 0),
2657 &XEXP (recog_data.operand[i], 0),
2658 i, address_type[i], ind_levels, insn);
2659 recog_data.operand[i] = *recog_data.operand_loc[i];
2660 substed_operand[i] = recog_data.operand[i];
2661 }
2662 else if (code == SUBREG)
2663 {
2664 rtx reg = SUBREG_REG (recog_data.operand[i]);
2665 rtx op
2666 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2667 ind_levels,
2668 set != 0
2669 && &SET_DEST (set) == recog_data.operand_loc[i],
2670 insn,
2671 &address_reloaded[i]);
2672
2673 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2674 that didn't get a hard register, emit a USE with a REG_EQUAL
2675 note in front so that we might inherit a previous, possibly
2676 wider reload. */
2677
2678 if (replace
2679 && GET_CODE (op) == MEM
2680 && GET_CODE (reg) == REG
2681 && (GET_MODE_SIZE (GET_MODE (reg))
2682 >= GET_MODE_SIZE (GET_MODE (op))))
2683 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2684 insn),
2685 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2686
2687 substed_operand[i] = recog_data.operand[i] = op;
2688 }
2689 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2690 /* We can get a PLUS as an "operand" as a result of register
2691 elimination. See eliminate_regs and gen_reload. We handle
2692 a unary operator by reloading the operand. */
2693 substed_operand[i] = recog_data.operand[i]
2694 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2695 ind_levels, 0, insn,
2696 &address_reloaded[i]);
2697 else if (code == REG)
2698 {
2699 /* This is equivalent to calling find_reloads_toplev.
2700 The code is duplicated for speed.
2701 When we find a pseudo always equivalent to a constant,
2702 we replace it by the constant. We must be sure, however,
2703 that we don't try to replace it in the insn in which it
2704 is being set. */
2705 int regno = REGNO (recog_data.operand[i]);
2706 if (reg_equiv_constant[regno] != 0
2707 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2708 {
2709 /* Record the existing mode so that the check if constants are
2710 allowed will work when operand_mode isn't specified. */
2711
2712 if (operand_mode[i] == VOIDmode)
2713 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2714
2715 substed_operand[i] = recog_data.operand[i]
2716 = reg_equiv_constant[regno];
2717 }
2718 if (reg_equiv_memory_loc[regno] != 0
2719 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2720 /* We need not give a valid is_set_dest argument since the case
2721 of a constant equivalence was checked above. */
2722 substed_operand[i] = recog_data.operand[i]
2723 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2724 ind_levels, 0, insn,
2725 &address_reloaded[i]);
2726 }
2727 /* If the operand is still a register (we didn't replace it with an
2728 equivalent), get the preferred class to reload it into. */
2729 code = GET_CODE (recog_data.operand[i]);
2730 preferred_class[i]
2731 = ((code == REG && REGNO (recog_data.operand[i])
2732 >= FIRST_PSEUDO_REGISTER)
2733 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2734 : NO_REGS);
2735 pref_or_nothing[i]
2736 = (code == REG
2737 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2738 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2739 }
2740
2741 /* If this is simply a copy from operand 1 to operand 0, merge the
2742 preferred classes for the operands. */
2743 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2744 && recog_data.operand[1] == SET_SRC (set))
2745 {
2746 preferred_class[0] = preferred_class[1]
2747 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2748 pref_or_nothing[0] |= pref_or_nothing[1];
2749 pref_or_nothing[1] |= pref_or_nothing[0];
2750 }
2751
2752 /* Now see what we need for pseudo-regs that didn't get hard regs

--- 22 unchanged lines hidden (view full) ---

2775 and would require loading. */
2776 int losers = 0;
2777 /* BAD is set to 1 if it some operand can't fit this alternative
2778 even after reloading. */
2779 int bad = 0;
2780 /* REJECT is a count of how undesirable this alternative says it is
2781 if any reloading is required. If the alternative matches exactly
2782 then REJECT is ignored, but otherwise it gets this much
2783 counted against it in addition to the reloading needed. Each
2784 ? counts three times here since we want the disparaging caused by
2785 a bad register class to only count 1/3 as much. */
2786 int reject = 0;
2787
2788 this_earlyclobber = 0;
2789
2790 for (i = 0; i < noperands; i++)
2791 {
2792 char *p = constraints[i];
2793 int win = 0;
2794 int did_match = 0;
2795 /* 0 => this operand can be reloaded somehow for this alternative. */
2796 int badop = 1;
2797 /* 0 => this operand can be reloaded if the alternative allows regs. */
2798 int winreg = 0;
2799 int c;
2800 rtx operand = recog_data.operand[i];
2801 int offset = 0;
2802 /* Nonzero means this is a MEM that must be reloaded into a reg
2803 regardless of what the constraint says. */
2804 int force_reload = 0;
2805 int offmemok = 0;
2806 /* Nonzero if a constant forced into memory would be OK for this
2807 operand. */
2808 int constmemok = 0;
2809 int earlyclobber = 0;
2810
2811 /* If the predicate accepts a unary operator, it means that
2812 we need to reload the operand, but do not do this for
2813 match_operator and friends. */
2814 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2815 operand = XEXP (operand, 0);
2816
2817 /* If the operand is a SUBREG, extract
2818 the REG or MEM (or maybe even a constant) within.
2819 (Constants can occur as a result of reg_equiv_constant.) */
2820
2821 while (GET_CODE (operand) == SUBREG)
2822 {
2823 /* Offset only matters when operand is a REG and
2824 it is a hard reg. This is because it is passed
2825 to reg_fits_class_p if it is a REG and all pseudos
2826 return 0 from that function. */
2827 if (GET_CODE (SUBREG_REG (operand)) == REG
2828 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2829 {
2830 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2831 GET_MODE (SUBREG_REG (operand)),
2832 SUBREG_BYTE (operand),
2833 GET_MODE (operand));
2834 }
2835 operand = SUBREG_REG (operand);
2836 /* Force reload if this is a constant or PLUS or if there may
2837 be a problem accessing OPERAND in the outer mode. */
2838 if (CONSTANT_P (operand)
2839 || GET_CODE (operand) == PLUS
2840 /* We must force a reload of paradoxical SUBREGs
2841 of a MEM because the alignment of the inner value
2842 may not be enough to do the outer reference. On
2843 big-endian machines, it may also reference outside
2844 the object.
2845
2846 On machines that extend byte operations and we have a
2847 SUBREG where both the inner and outer modes are no wider
2848 than a word and the inner mode is narrower, is integral,
2849 and gets extended when loaded from memory, combine.c has
2850 made assumptions about the behavior of the machine in such
2851 register access. If the data is, in fact, in memory we
2852 must always load using the size assumed to be in the
2853 register and let the insn do the different-sized
2854 accesses.
2855
2856 This is doubly true if WORD_REGISTER_OPERATIONS. In
2857 this case eliminate_regs has left non-paradoxical
2858 subregs for push_reloads to see. Make sure it does
2859 by forcing the reload.
2860
2861 ??? When is it right at this stage to have a subreg
2862 of a mem that is _not_ to be handled specialy? IMO
2863 those should have been reduced to just a mem. */
2864 || ((GET_CODE (operand) == MEM

--- 12 unchanged lines hidden (view full) ---

2877 && (GET_MODE_SIZE (operand_mode[i])
2878 > GET_MODE_SIZE (GET_MODE (operand)))
2879 && INTEGRAL_MODE_P (GET_MODE (operand))
2880 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2881#endif
2882 )
2883#endif
2884 )
2885 /* This following hunk of code should no longer be
2886 needed at all with SUBREG_BYTE. If you need this
2887 code back, please explain to me why so I can
2888 fix the real problem. -DaveM */
2889#if 0
2890 /* Subreg of a hard reg which can't handle the subreg's mode
2891 or which would handle that mode in the wrong number of
2892 registers for subregging to work. */
2893 || (GET_CODE (operand) == REG
2894 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2895 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2896 && (GET_MODE_SIZE (GET_MODE (operand))
2897 > UNITS_PER_WORD)
2898 && ((GET_MODE_SIZE (GET_MODE (operand))
2899 / UNITS_PER_WORD)
2900 != HARD_REGNO_NREGS (REGNO (operand),
2901 GET_MODE (operand))))
2902 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2903 operand_mode[i])))
2904#endif
2905 )
2906 force_reload = 1;
2907 }
2908
2909 this_alternative[i] = (int) NO_REGS;
2910 this_alternative_win[i] = 0;
2911 this_alternative_match_win[i] = 0;
2912 this_alternative_offmemok[i] = 0;
2913 this_alternative_earlyclobber[i] = 0;
2914 this_alternative_matches[i] = -1;
2915
2916 /* An empty constraint or empty alternative
2917 allows anything which matched the pattern. */
2918 if (*p == 0 || *p == ',')
2919 win = 1, badop = 0;
2920
2921 /* Scan this alternative's specs for this operand;
2922 set WIN if the operand fits any letter in this alternative.
2923 Otherwise, clear BADOP if this operand could
2924 fit some letter after reloads,
2925 or set WINREG if this operand could fit after reloads
2926 provided the constraint allows some registers. */
2927
2928 while (*p && (c = *p++) != ',')
2929 switch (c)
2930 {
2931 case '=': case '+': case '*':
2932 break;
2933
2934 case '%':
2935 /* The last operand should not be marked commutative. */
2936 if (i != noperands - 1)
2937 commutative = i;
2938 break;
2939
2940 case '?':
2941 reject += 6;
2942 break;
2943
2944 case '!':
2945 reject = 600;
2946 break;
2947
2948 case '#':
2949 /* Ignore rest of this alternative as far as
2950 reloading is concerned. */
2951 while (*p && *p != ',')
2952 p++;
2953 break;
2954
2955 case '0': case '1': case '2': case '3': case '4':
2956 case '5': case '6': case '7': case '8': case '9':
2957 c = strtoul (p - 1, &p, 10);
2958
2959 this_alternative_matches[i] = c;
2960 /* We are supposed to match a previous operand.
2961 If we do, we win if that one did.
2962 If we do not, count both of the operands as losers.
2963 (This is too conservative, since most of the time
2964 only a single reload insn will be needed to make
2965 the two operands win. As a result, this alternative
2966 may be rejected when it is actually desirable.) */
2967 if ((swapped && (c != commutative || i != commutative + 1))
2968 /* If we are matching as if two operands were swapped,
2969 also pretend that operands_match had been computed
2970 with swapped.
2971 But if I is the second of those and C is the first,
2972 don't exchange them, because operands_match is valid
2973 only on one side of its diagonal. */
2974 ? (operands_match
2975 [(c == commutative || c == commutative + 1)
2976 ? 2 * commutative + 1 - c : c]
2977 [(i == commutative || i == commutative + 1)
2978 ? 2 * commutative + 1 - i : i])
2979 : operands_match[c][i])
2980 {
2981 /* If we are matching a non-offsettable address where an
2982 offsettable address was expected, then we must reject
2983 this combination, because we can't reload it. */
2984 if (this_alternative_offmemok[c]
2985 && GET_CODE (recog_data.operand[c]) == MEM
2986 && this_alternative[c] == (int) NO_REGS
2987 && ! this_alternative_win[c])
2988 bad = 1;
2989
2990 did_match = this_alternative_win[c];
2991 }
2992 else
2993 {
2994 /* Operands don't match. */
2995 rtx value;
2996 /* Retroactively mark the operand we had to match
2997 as a loser, if it wasn't already. */
2998 if (this_alternative_win[c])
2999 losers++;
3000 this_alternative_win[c] = 0;
3001 if (this_alternative[c] == (int) NO_REGS)
3002 bad = 1;
3003 /* But count the pair only once in the total badness of
3004 this alternative, if the pair can be a dummy reload. */
3005 value
3006 = find_dummy_reload (recog_data.operand[i],
3007 recog_data.operand[c],
3008 recog_data.operand_loc[i],
3009 recog_data.operand_loc[c],
3010 operand_mode[i], operand_mode[c],
3011 this_alternative[c], -1,
3012 this_alternative_earlyclobber[c]);
3013
3014 if (value != 0)
3015 losers--;
3016 }
3017 /* This can be fixed with reloads if the operand
3018 we are supposed to match can be fixed with reloads. */
3019 badop = 0;
3020 this_alternative[i] = this_alternative[c];
3021
3022 /* If we have to reload this operand and some previous
3023 operand also had to match the same thing as this
3024 operand, we don't know how to do that. So reject this
3025 alternative. */
3026 if (! did_match || force_reload)
3027 for (j = 0; j < i; j++)
3028 if (this_alternative_matches[j]
3029 == this_alternative_matches[i])
3030 badop = 1;
3031 break;
3032
3033 case 'p':
3034 /* All necessary reloads for an address_operand
3035 were handled in find_reloads_address. */
3036 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3037 win = 1;
3038 break;
3039
3040 case 'm':
3041 if (force_reload)
3042 break;
3043 if (GET_CODE (operand) == MEM
3044 || (GET_CODE (operand) == REG

--- 144 unchanged lines hidden (view full) ---

3189 case 'g':
3190 if (! force_reload
3191 /* A PLUS is never a valid operand, but reload can make
3192 it from a register when eliminating registers. */
3193 && GET_CODE (operand) != PLUS
3194 /* A SCRATCH is not a valid operand. */
3195 && GET_CODE (operand) != SCRATCH
3196#ifdef LEGITIMATE_PIC_OPERAND_P
3197 && (! CONSTANT_P (operand)
3198 || ! flag_pic
3199 || LEGITIMATE_PIC_OPERAND_P (operand))
3200#endif
3201 && (GENERAL_REGS == ALL_REGS
3202 || GET_CODE (operand) != REG
3203 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3204 && reg_renumber[REGNO (operand)] < 0)))
3205 win = 1;
3206 /* Drop through into 'r' case. */
3207
3208 case 'r':
3209 this_alternative[i]
3210 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3211 goto reg;
3212
3213 default:
3214 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3215 {
3216#ifdef EXTRA_CONSTRAINT
3217 if (EXTRA_CONSTRAINT (operand, c))
3218 win = 1;
3219#endif
3220 break;
3221 }
3222
3223 this_alternative[i]
3224 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3225 reg:
3226 if (GET_MODE (operand) == BLKmode)
3227 break;
3228 winreg = 1;
3229 if (GET_CODE (operand) == REG
3230 && reg_fits_class_p (operand, this_alternative[i],
3231 offset, GET_MODE (recog_data.operand[i])))
3232 win = 1;
3233 break;
3234 }
3235
3236 constraints[i] = p;
3237
3238 /* If this operand could be handled with a reg,
3239 and some reg is allowed, then this operand can be handled. */
3240 if (winreg && this_alternative[i] != (int) NO_REGS)
3241 badop = 0;
3242
3243 /* Record which operands fit this alternative. */
3244 this_alternative_earlyclobber[i] = earlyclobber;
3245 if (win && ! force_reload)
3246 this_alternative_win[i] = 1;
3247 else if (did_match && ! force_reload)
3248 this_alternative_match_win[i] = 1;
3249 else
3250 {
3251 int const_to_mem = 0;
3252
3253 this_alternative_offmemok[i] = offmemok;
3254 losers++;
3255 if (badop)
3256 bad = 1;
3257 /* Alternative loses if it has no regs for a reg operand. */
3258 if (GET_CODE (operand) == REG
3259 && this_alternative[i] == (int) NO_REGS
3260 && this_alternative_matches[i] < 0)
3261 bad = 1;
3262
3263 /* If this is a constant that is reloaded into the desired
3264 class by copying it to memory first, count that as another
3265 reload. This is consistent with other code and is
3266 required to avoid choosing another alternative when
3267 the constant is moved into memory by this function on
3268 an early reload pass. Note that the test here is
3269 precisely the same as in the code below that calls
3270 force_const_mem. */
3271 if (CONSTANT_P (operand)
3272 /* force_const_mem does not accept HIGH. */
3273 && GET_CODE (operand) != HIGH
3274 && ((PREFERRED_RELOAD_CLASS (operand,
3275 (enum reg_class) this_alternative[i])
3276 == NO_REGS)
3277 || no_input_reloads)
3278 && operand_mode[i] != VOIDmode)
3279 {
3280 const_to_mem = 1;
3281 if (this_alternative[i] != (int) NO_REGS)
3282 losers++;
3283 }

--- 9 unchanged lines hidden (view full) ---

3293 (enum reg_class) this_alternative[i])
3294 == NO_REGS))
3295 bad = 1;
3296
3297 /* Alternative loses if it requires a type of reload not
3298 permitted for this insn. We can always reload SCRATCH
3299 and objects with a REG_UNUSED note. */
3300 else if (GET_CODE (operand) != SCRATCH
3301 && modified[i] != RELOAD_READ && no_output_reloads
3302 && ! find_reg_note (insn, REG_UNUSED, operand))
3303 bad = 1;
3304 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3305 && ! const_to_mem)
3306 bad = 1;
3307
3308 /* We prefer to reload pseudos over reloading other things,
3309 since such reloads may be able to be eliminated later.
3310 If we are reloading a SCRATCH, we won't be generating any
3311 insns, just using a register, so it is also preferred.
3312 So bump REJECT in other cases. Don't do this in the
3313 case where we are forcing a constant into memory and
3314 it will then win since we don't want to have a different
3315 alternative match then. */
3316 if (! (GET_CODE (operand) == REG
3317 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3318 && GET_CODE (operand) != SCRATCH
3319 && ! (const_to_mem && constmemok))
3320 reject += 2;
3321
3322 /* Input reloads can be inherited more often than output
3323 reloads can be removed, so penalize output reloads. */
3324 if (operand_type[i] != RELOAD_FOR_INPUT
3325 && GET_CODE (operand) != SCRATCH)
3326 reject++;
3327 }
3328
3329 /* If this operand is a pseudo register that didn't get a hard
3330 reg and this alternative accepts some register, see if the
3331 class that we want is a subset of the preferred class for this
3332 register. If not, but it intersects that class, use the
3333 preferred class instead. If it does not intersect the preferred
3334 class, show that usage of this alternative should be discouraged;
3335 it will be discouraged more still if the register is `preferred
3336 or nothing'. We do this because it increases the chance of
3337 reusing our spill register in a later insn and avoiding a pair

--- 4 unchanged lines hidden (view full) ---

3342
3343 Don't do this for a multiword operand, since it is only a
3344 small win and has the risk of requiring more spill registers,
3345 which could cause a large loss.
3346
3347 Don't do this if the preferred class has only one register
3348 because we might otherwise exhaust the class. */
3349
3350 if (! win && ! did_match
3351 && this_alternative[i] != (int) NO_REGS
3352 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3353 && reg_class_size[(int) preferred_class[i]] > 1)
3354 {
3355 if (! reg_class_subset_p (this_alternative[i],
3356 preferred_class[i]))
3357 {
3358 /* Since we don't have a way of forming the intersection,
3359 we just do something special if the preferred class
3360 is a subset of the class we have; that's the most
3361 common case anyway. */
3362 if (reg_class_subset_p (preferred_class[i],
3363 this_alternative[i]))
3364 this_alternative[i] = (int) preferred_class[i];
3365 else
3366 reject += (2 + 2 * pref_or_nothing[i]);
3367 }
3368 }
3369 }
3370
3371 /* Now see if any output operands that are marked "earlyclobber"
3372 in this alternative conflict with any input operands
3373 or any memory addresses. */
3374
3375 for (i = 0; i < noperands; i++)
3376 if (this_alternative_earlyclobber[i]
3377 && (this_alternative_win[i] || this_alternative_match_win[i]))
3378 {
3379 struct decomposition early_data;
3380
3381 early_data = decompose (recog_data.operand[i]);
3382
3383 if (modified[i] == RELOAD_READ)
3384 abort ();
3385
3386 if (this_alternative[i] == NO_REGS)
3387 {
3388 this_alternative_earlyclobber[i] = 0;
3389 if (this_insn_is_asm)
3390 error_for_asm (this_insn,
3391 "`&' constraint used with no register class");
3392 else
3393 abort ();
3394 }
3395
3396 for (j = 0; j < noperands; j++)
3397 /* Is this an input operand or a memory ref? */
3398 if ((GET_CODE (recog_data.operand[j]) == MEM
3399 || modified[j] != RELOAD_WRITE)
3400 && j != i
3401 /* Ignore things like match_operator operands. */
3402 && *recog_data.constraints[j] != 0
3403 /* Don't count an input operand that is constrained to match
3404 the early clobber operand. */
3405 && ! (this_alternative_matches[j] == i
3406 && rtx_equal_p (recog_data.operand[i],
3407 recog_data.operand[j]))
3408 /* Is it altered by storing the earlyclobber operand? */
3409 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3410 early_data))
3411 {
3412 /* If the output is in a single-reg class,
3413 it's costly to reload it, so reload the input instead. */
3414 if (reg_class_size[this_alternative[i]] == 1
3415 && (GET_CODE (recog_data.operand[j]) == REG
3416 || GET_CODE (recog_data.operand[j]) == SUBREG))
3417 {
3418 losers++;
3419 this_alternative_win[j] = 0;
3420 this_alternative_match_win[j] = 0;
3421 }
3422 else
3423 break;
3424 }
3425 /* If an earlyclobber operand conflicts with something,
3426 it must be reloaded, so request this and count the cost. */
3427 if (j != noperands)
3428 {
3429 losers++;
3430 this_alternative_win[i] = 0;
3431 this_alternative_match_win[j] = 0;
3432 for (j = 0; j < noperands; j++)
3433 if (this_alternative_matches[j] == i
3434 && this_alternative_match_win[j])
3435 {
3436 this_alternative_win[j] = 0;
3437 this_alternative_match_win[j] = 0;
3438 losers++;
3439 }
3440 }
3441 }
3442
3443 /* If one alternative accepts all the operands, no reload required,
3444 choose that alternative; don't consider the remaining ones. */
3445 if (losers == 0)
3446 {
3447 /* Unswap these so that they are never swapped at `finish'. */
3448 if (commutative >= 0)
3449 {
3450 recog_data.operand[commutative] = substed_operand[commutative];
3451 recog_data.operand[commutative + 1]
3452 = substed_operand[commutative + 1];
3453 }
3454 for (i = 0; i < noperands; i++)
3455 {
3456 goal_alternative_win[i] = this_alternative_win[i];
3457 goal_alternative_match_win[i] = this_alternative_match_win[i];
3458 goal_alternative[i] = this_alternative[i];
3459 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3460 goal_alternative_matches[i] = this_alternative_matches[i];
3461 goal_alternative_earlyclobber[i]
3462 = this_alternative_earlyclobber[i];
3463 }
3464 goal_alternative_number = this_alternative_number;
3465 goal_alternative_swapped = swapped;

--- 11 unchanged lines hidden (view full) ---

3477 and it needs less reloading than the others checked so far,
3478 record it as the chosen goal for reloading. */
3479 if (! bad && best > losers)
3480 {
3481 for (i = 0; i < noperands; i++)
3482 {
3483 goal_alternative[i] = this_alternative[i];
3484 goal_alternative_win[i] = this_alternative_win[i];
3485 goal_alternative_match_win[i] = this_alternative_match_win[i];
3486 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3487 goal_alternative_matches[i] = this_alternative_matches[i];
3488 goal_alternative_earlyclobber[i]
3489 = this_alternative_earlyclobber[i];
3490 }
3491 goal_alternative_swapped = swapped;
3492 best = losers;
3493 goal_alternative_number = this_alternative_number;

--- 10 unchanged lines hidden (view full) ---

3504 If we have just tried the alternatives the second time,
3505 return operands to normal and drop through. */
3506
3507 if (commutative >= 0)
3508 {
3509 swapped = !swapped;
3510 if (swapped)
3511 {
3512 enum reg_class tclass;
3513 int t;
3514
3515 recog_data.operand[commutative] = substed_operand[commutative + 1];
3516 recog_data.operand[commutative + 1] = substed_operand[commutative];
3517 /* Swap the duplicates too. */
3518 for (i = 0; i < recog_data.n_dups; i++)
3519 if (recog_data.dup_num[i] == commutative
3520 || recog_data.dup_num[i] == commutative + 1)
3521 *recog_data.dup_loc[i]
3522 = recog_data.operand[(int) recog_data.dup_num[i]];
3523
3524 tclass = preferred_class[commutative];
3525 preferred_class[commutative] = preferred_class[commutative + 1];
3526 preferred_class[commutative + 1] = tclass;
3527
3528 t = pref_or_nothing[commutative];
3529 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3530 pref_or_nothing[commutative + 1] = t;
3531
3532 memcpy (constraints, recog_data.constraints,
3533 noperands * sizeof (char *));
3534 goto try_swapped;
3535 }
3536 else
3537 {
3538 recog_data.operand[commutative] = substed_operand[commutative];
3539 recog_data.operand[commutative + 1]
3540 = substed_operand[commutative + 1];
3541 /* Unswap the duplicates too. */
3542 for (i = 0; i < recog_data.n_dups; i++)
3543 if (recog_data.dup_num[i] == commutative
3544 || recog_data.dup_num[i] == commutative + 1)
3545 *recog_data.dup_loc[i]
3546 = recog_data.operand[(int) recog_data.dup_num[i]];
3547 }
3548 }
3549
3550 /* The operands don't meet the constraints.
3551 goal_alternative describes the alternative
3552 that we could reach by reloading the fewest operands.
3553 Reload so as to fit it. */
3554
3555 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3556 {
3557 /* No alternative works with reloads?? */
3558 if (insn_code_number >= 0)
3559 fatal_insn ("unable to generate reloads for:", insn);
3560 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3561 /* Avoid further trouble with this insn. */
3562 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3563 n_reloads = 0;
3564 return 0;
3565 }
3566
3567 /* Jump to `finish' from above if all operands are valid already.
3568 In that case, goal_alternative_win is all 1. */
3569 finish:
3570
3571 /* Right now, for any pair of operands I and J that are required to match,
3572 with I < J,
3573 goal_alternative_matches[J] is I.
3574 Set up goal_alternative_matched as the inverse function:
3575 goal_alternative_matched[I] = J. */
3576
3577 for (i = 0; i < noperands; i++)
3578 goal_alternative_matched[i] = -1;
3579
3580 for (i = 0; i < noperands; i++)
3581 if (! goal_alternative_win[i]
3582 && goal_alternative_matches[i] >= 0)
3583 goal_alternative_matched[goal_alternative_matches[i]] = i;
3584
3585 for (i = 0; i < noperands; i++)
3586 goal_alternative_win[i] |= goal_alternative_match_win[i];
3587
3588 /* If the best alternative is with operands 1 and 2 swapped,
3589 consider them swapped before reporting the reloads. Update the
3590 operand numbers of any reloads already pushed. */
3591
3592 if (goal_alternative_swapped)
3593 {
3594 rtx tem;
3595
3596 tem = substed_operand[commutative];
3597 substed_operand[commutative] = substed_operand[commutative + 1];
3598 substed_operand[commutative + 1] = tem;
3599 tem = recog_data.operand[commutative];
3600 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3601 recog_data.operand[commutative + 1] = tem;
3602 tem = *recog_data.operand_loc[commutative];
3603 *recog_data.operand_loc[commutative]
3604 = *recog_data.operand_loc[commutative + 1];
3605 *recog_data.operand_loc[commutative + 1] = tem;
3606
3607 for (i = 0; i < n_reloads; i++)
3608 {
3609 if (rld[i].opnum == commutative)
3610 rld[i].opnum = commutative + 1;
3611 else if (rld[i].opnum == commutative + 1)
3612 rld[i].opnum = commutative;
3613 }
3614 }
3615
3616 for (i = 0; i < noperands; i++)
3617 {
3618 operand_reloadnum[i] = -1;
3619
3620 /* If this is an earlyclobber operand, we need to widen the scope.
3621 The reload must remain valid from the start of the insn being
3622 reloaded until after the operand is stored into its destination.
3623 We approximate this with RELOAD_OTHER even though we know that we
3624 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3625
3626 One special case that is worth checking is when we have an
3627 output that is earlyclobber but isn't used past the insn (typically
3628 a SCRATCH). In this case, we only need have the reload live
3629 through the insn itself, but not for any of our input or output
3630 reloads.
3631 But we must not accidentally narrow the scope of an existing
3632 RELOAD_OTHER reload - leave these alone.
3633
3634 In any case, anything needed to address this operand can remain
3635 however they were previously categorized. */
3636
3637 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3638 operand_type[i]
3639 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3640 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3641 }
3642
3643 /* Any constants that aren't allowed and can't be reloaded
3644 into registers are here changed into memory references. */
3645 for (i = 0; i < noperands; i++)
3646 if (! goal_alternative_win[i]
3647 && CONSTANT_P (recog_data.operand[i])
3648 /* force_const_mem does not accept HIGH. */
3649 && GET_CODE (recog_data.operand[i]) != HIGH
3650 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3651 (enum reg_class) goal_alternative[i])
3652 == NO_REGS)
3653 || no_input_reloads)
3654 && operand_mode[i] != VOIDmode)
3655 {
3656 substed_operand[i] = recog_data.operand[i]
3657 = find_reloads_toplev (force_const_mem (operand_mode[i],
3658 recog_data.operand[i]),
3659 i, address_type[i], ind_levels, 0, insn,
3660 NULL);
3661 if (alternative_allows_memconst (recog_data.constraints[i],
3662 goal_alternative_number))
3663 goal_alternative_win[i] = 1;
3664 }
3665
3666 /* Record the values of the earlyclobber operands for the caller. */
3667 if (goal_earlyclobber)
3668 for (i = 0; i < noperands; i++)
3669 if (goal_alternative_earlyclobber[i])
3670 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3671
3672 /* Now record reloads for all the operands that need them. */
3673 for (i = 0; i < noperands; i++)
3674 if (! goal_alternative_win[i])
3675 {
3676 /* Operands that match previous ones have already been handled. */
3677 if (goal_alternative_matches[i] >= 0)
3678 ;
3679 /* Handle an operand with a nonoffsettable address
3680 appearing where an offsettable address will do
3681 by reloading the address into a base register.
3682
3683 ??? We can also do this when the operand is a register and
3684 reg_equiv_mem is not offsettable, but this is a bit tricky,
3685 so we don't bother with it. It may not be worth doing. */
3686 else if (goal_alternative_matched[i] == -1
3687 && goal_alternative_offmemok[i]
3688 && GET_CODE (recog_data.operand[i]) == MEM)
3689 {
3690 operand_reloadnum[i]
3691 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3692 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3693 MODE_BASE_REG_CLASS (VOIDmode),
3694 GET_MODE (XEXP (recog_data.operand[i], 0)),
3695 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3696 rld[operand_reloadnum[i]].inc
3697 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3698
3699 /* If this operand is an output, we will have made any
3700 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3701 now we are treating part of the operand as an input, so
3702 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3703
3704 if (modified[i] == RELOAD_WRITE)
3705 {
3706 for (j = 0; j < n_reloads; j++)
3707 {
3708 if (rld[j].opnum == i)
3709 {
3710 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3711 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3712 else if (rld[j].when_needed
3713 == RELOAD_FOR_OUTADDR_ADDRESS)
3714 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3715 }
3716 }
3717 }
3718 }
3719 else if (goal_alternative_matched[i] == -1)
3720 {
3721 operand_reloadnum[i]
3722 = push_reload ((modified[i] != RELOAD_WRITE
3723 ? recog_data.operand[i] : 0),
3724 (modified[i] != RELOAD_READ
3725 ? recog_data.operand[i] : 0),
3726 (modified[i] != RELOAD_WRITE
3727 ? recog_data.operand_loc[i] : 0),
3728 (modified[i] != RELOAD_READ
3729 ? recog_data.operand_loc[i] : 0),
3730 (enum reg_class) goal_alternative[i],
3731 (modified[i] == RELOAD_WRITE
3732 ? VOIDmode : operand_mode[i]),
3733 (modified[i] == RELOAD_READ
3734 ? VOIDmode : operand_mode[i]),
3735 (insn_code_number < 0 ? 0
3736 : insn_data[insn_code_number].operand[i].strict_low),
3737 0, i, operand_type[i]);
3738 }
3739 /* In a matching pair of operands, one must be input only
3740 and the other must be output only.
3741 Pass the input operand as IN and the other as OUT. */
3742 else if (modified[i] == RELOAD_READ
3743 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3744 {
3745 operand_reloadnum[i]
3746 = push_reload (recog_data.operand[i],
3747 recog_data.operand[goal_alternative_matched[i]],
3748 recog_data.operand_loc[i],
3749 recog_data.operand_loc[goal_alternative_matched[i]],
3750 (enum reg_class) goal_alternative[i],
3751 operand_mode[i],
3752 operand_mode[goal_alternative_matched[i]],
3753 0, 0, i, RELOAD_OTHER);
3754 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3755 }
3756 else if (modified[i] == RELOAD_WRITE
3757 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3758 {
3759 operand_reloadnum[goal_alternative_matched[i]]
3760 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3761 recog_data.operand[i],
3762 recog_data.operand_loc[goal_alternative_matched[i]],
3763 recog_data.operand_loc[i],
3764 (enum reg_class) goal_alternative[i],
3765 operand_mode[goal_alternative_matched[i]],
3766 operand_mode[i],
3767 0, 0, i, RELOAD_OTHER);
3768 operand_reloadnum[i] = output_reloadnum;
3769 }
3770 else if (insn_code_number >= 0)
3771 abort ();
3772 else
3773 {
3774 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3775 /* Avoid further trouble with this insn. */
3776 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3777 n_reloads = 0;
3778 return 0;
3779 }
3780 }
3781 else if (goal_alternative_matched[i] < 0
3782 && goal_alternative_matches[i] < 0
3783 && optimize)
3784 {
3785 /* For each non-matching operand that's a MEM or a pseudo-register
3786 that didn't get a hard register, make an optional reload.
3787 This may get done even if the insn needs no reloads otherwise. */
3788
3789 rtx operand = recog_data.operand[i];
3790
3791 while (GET_CODE (operand) == SUBREG)
3792 operand = SUBREG_REG (operand);
3793 if ((GET_CODE (operand) == MEM
3794 || (GET_CODE (operand) == REG
3795 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3796 /* If this is only for an output, the optional reload would not
3797 actually cause us to use a register now, just note that
3798 something is stored here. */
3799 && ((enum reg_class) goal_alternative[i] != NO_REGS
3800 || modified[i] == RELOAD_WRITE)
3801 && ! no_input_reloads
3802 /* An optional output reload might allow to delete INSN later.
3803 We mustn't make in-out reloads on insns that are not permitted
3804 output reloads.
3805 If this is an asm, we can't delete it; we must not even call
3806 push_reload for an optional output reload in this case,
3807 because we can't be sure that the constraint allows a register,
3808 and push_reload verifies the constraints for asms. */
3809 && (modified[i] == RELOAD_READ
3810 || (! no_output_reloads && ! this_insn_is_asm)))
3811 operand_reloadnum[i]
3812 = push_reload ((modified[i] != RELOAD_WRITE
3813 ? recog_data.operand[i] : 0),
3814 (modified[i] != RELOAD_READ
3815 ? recog_data.operand[i] : 0),
3816 (modified[i] != RELOAD_WRITE
3817 ? recog_data.operand_loc[i] : 0),
3818 (modified[i] != RELOAD_READ
3819 ? recog_data.operand_loc[i] : 0),
3820 (enum reg_class) goal_alternative[i],
3821 (modified[i] == RELOAD_WRITE
3822 ? VOIDmode : operand_mode[i]),
3823 (modified[i] == RELOAD_READ
3824 ? VOIDmode : operand_mode[i]),
3825 (insn_code_number < 0 ? 0
3826 : insn_data[insn_code_number].operand[i].strict_low),
3827 1, i, operand_type[i]);
3828 /* If a memory reference remains (either as a MEM or a pseudo that
3829 did not get a hard register), yet we can't make an optional
3830 reload, check if this is actually a pseudo register reference;
3831 we then need to emit a USE and/or a CLOBBER so that reload
3832 inheritance will do the right thing. */
3833 else if (replace
3834 && (GET_CODE (operand) == MEM
3835 || (GET_CODE (operand) == REG
3836 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3837 && reg_renumber [REGNO (operand)] < 0)))
3838 {
3839 operand = *recog_data.operand_loc[i];
3840
3841 while (GET_CODE (operand) == SUBREG)
3842 operand = SUBREG_REG (operand);
3843 if (GET_CODE (operand) == REG)
3844 {
3845 if (modified[i] != RELOAD_WRITE)
3846 /* We mark the USE with QImode so that we recognize
3847 it as one that can be safely deleted at the end
3848 of reload. */
3849 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3850 insn), QImode);
3851 if (modified[i] != RELOAD_READ)
3852 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3853 }
3854 }
3855 }
3856 else if (goal_alternative_matches[i] >= 0
3857 && goal_alternative_win[goal_alternative_matches[i]]
3858 && modified[i] == RELOAD_READ
3859 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3860 && ! no_input_reloads && ! no_output_reloads
3861 && optimize)
3862 {
3863 /* Similarly, make an optional reload for a pair of matching
3864 objects that are in MEM or a pseudo that didn't get a hard reg. */
3865
3866 rtx operand = recog_data.operand[i];
3867
3868 while (GET_CODE (operand) == SUBREG)
3869 operand = SUBREG_REG (operand);
3870 if ((GET_CODE (operand) == MEM
3871 || (GET_CODE (operand) == REG
3872 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3873 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3874 != NO_REGS))
3875 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3876 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3877 recog_data.operand[i],
3878 recog_data.operand_loc[goal_alternative_matches[i]],
3879 recog_data.operand_loc[i],
3880 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3881 operand_mode[goal_alternative_matches[i]],
3882 operand_mode[i],
3883 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3884 }
3885
3886 /* Perform whatever substitutions on the operands we are supposed
3887 to make due to commutativity or replacement of registers
3888 with equivalent constants or memory slots. */
3889
3890 for (i = 0; i < noperands; i++)
3891 {
3892 /* We only do this on the last pass through reload, because it is
3893 possible for some data (like reg_equiv_address) to be changed during
3894 later passes. Moreover, we loose the opportunity to get a useful
3895 reload_{in,out}_reg when we do these replacements. */
3896
3897 if (replace)
3898 {
3899 rtx substitution = substed_operand[i];
3900
3901 *recog_data.operand_loc[i] = substitution;
3902
3903 /* If we're replacing an operand with a LABEL_REF, we need
3904 to make sure that there's a REG_LABEL note attached to
3905 this instruction. */
3906 if (GET_CODE (insn) != JUMP_INSN
3907 && GET_CODE (substitution) == LABEL_REF
3908 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3909 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3910 XEXP (substitution, 0),
3911 REG_NOTES (insn));
3912 }
3913 else
3914 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3915 }
3916
3917 /* If this insn pattern contains any MATCH_DUP's, make sure that
3918 they will be substituted if the operands they match are substituted.
3919 Also do now any substitutions we already did on the operands.
3920
3921 Don't do this if we aren't making replacements because we might be
3922 propagating things allocated by frame pointer elimination into places
3923 it doesn't expect. */
3924
3925 if (insn_code_number >= 0 && replace)
3926 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3927 {
3928 int opno = recog_data.dup_num[i];
3929 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3930 if (operand_reloadnum[opno] >= 0)
3931 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3932 insn_data[insn_code_number].operand[opno].mode);
3933 }
3934
3935#if 0
3936 /* This loses because reloading of prior insns can invalidate the equivalence
3937 (or at least find_equiv_reg isn't smart enough to find it any more),
3938 causing this insn to need more reload regs than it needed before.
3939 It may be too late to make the reload regs available.
3940 Now this optimization is done safely in choose_reload_regs. */
3941
3942 /* For each reload of a reg into some other class of reg,
3943 search for an existing equivalent reg (same value now) in the right class.
3944 We can use it as long as we don't need to change its contents. */
3945 for (i = 0; i < n_reloads; i++)
3946 if (rld[i].reg_rtx == 0
3947 && rld[i].in != 0
3948 && GET_CODE (rld[i].in) == REG
3949 && rld[i].out == 0)
3950 {
3951 rld[i].reg_rtx
3952 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3953 static_reload_reg_p, 0, rld[i].inmode);
3954 /* Prevent generation of insn to load the value
3955 because the one we found already has the value. */
3956 if (rld[i].reg_rtx)
3957 rld[i].in = rld[i].reg_rtx;
3958 }
3959#endif
3960
3961 /* Perhaps an output reload can be combined with another
3962 to reduce needs by one. */
3963 if (!goal_earlyclobber)
3964 combine_reloads ();
3965
3966 /* If we have a pair of reloads for parts of an address, they are reloading
3967 the same object, the operands themselves were not reloaded, and they
3968 are for two operands that are supposed to match, merge the reloads and
3969 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3970
3971 for (i = 0; i < n_reloads; i++)
3972 {
3973 int k;
3974
3975 for (j = i + 1; j < n_reloads; j++)
3976 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3977 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3978 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3979 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3980 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
3981 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3982 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3983 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3984 && rtx_equal_p (rld[i].in, rld[j].in)
3985 && (operand_reloadnum[rld[i].opnum] < 0
3986 || rld[operand_reloadnum[rld[i].opnum]].optional)
3987 && (operand_reloadnum[rld[j].opnum] < 0
3988 || rld[operand_reloadnum[rld[j].opnum]].optional)
3989 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
3990 || (goal_alternative_matches[rld[j].opnum]
3991 == rld[i].opnum)))
3992 {
3993 for (k = 0; k < n_replacements; k++)
3994 if (replacements[k].what == j)
3995 replacements[k].what = i;
3996
3997 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3998 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3999 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4000 else
4001 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4002 rld[j].in = 0;
4003 }
4004 }
4005
4006 /* Scan all the reloads and update their type.
4007 If a reload is for the address of an operand and we didn't reload
4008 that operand, change the type. Similarly, change the operand number
4009 of a reload when two operands match. If a reload is optional, treat it
4010 as though the operand isn't reloaded.
4011
4012 ??? This latter case is somewhat odd because if we do the optional
4013 reload, it means the object is hanging around. Thus we need only
4014 do the address reload if the optional reload was NOT done.
4015
4016 Change secondary reloads to be the address type of their operand, not
4017 the normal type.
4018
4019 If an operand's reload is now RELOAD_OTHER, change any
4020 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4021 RELOAD_FOR_OTHER_ADDRESS. */
4022
4023 for (i = 0; i < n_reloads; i++)
4024 {
4025 if (rld[i].secondary_p
4026 && rld[i].when_needed == operand_type[rld[i].opnum])
4027 rld[i].when_needed = address_type[rld[i].opnum];
4028
4029 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4030 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4031 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4032 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4033 && (operand_reloadnum[rld[i].opnum] < 0
4034 || rld[operand_reloadnum[rld[i].opnum]].optional))
4035 {
4036 /* If we have a secondary reload to go along with this reload,
4037 change its type to RELOAD_FOR_OPADDR_ADDR. */
4038
4039 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4040 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4041 && rld[i].secondary_in_reload != -1)
4042 {
4043 int secondary_in_reload = rld[i].secondary_in_reload;
4044
4045 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4046
4047 /* If there's a tertiary reload we have to change it also. */
4048 if (secondary_in_reload > 0
4049 && rld[secondary_in_reload].secondary_in_reload != -1)
4050 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4051 = RELOAD_FOR_OPADDR_ADDR;
4052 }
4053
4054 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4055 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4056 && rld[i].secondary_out_reload != -1)
4057 {
4058 int secondary_out_reload = rld[i].secondary_out_reload;
4059
4060 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4061
4062 /* If there's a tertiary reload we have to change it also. */
4063 if (secondary_out_reload
4064 && rld[secondary_out_reload].secondary_out_reload != -1)
4065 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4066 = RELOAD_FOR_OPADDR_ADDR;
4067 }
4068
4069 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4070 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4071 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4072 else
4073 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4074 }
4075
4076 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4077 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4078 && operand_reloadnum[rld[i].opnum] >= 0
4079 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4080 == RELOAD_OTHER))
4081 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4082
4083 if (goal_alternative_matches[rld[i].opnum] >= 0)
4084 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4085 }
4086
4087 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4088 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4089 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4090
4091 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4092 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a

--- 13 unchanged lines hidden (view full) ---

4106 We can reduce the register pressure by exploiting that a
4107 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4108 does not conflict with any of them, if it is only used for the first of
4109 the RELOAD_FOR_X_ADDRESS reloads. */
4110 {
4111 int first_op_addr_num = -2;
4112 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4113 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4114 int need_change = 0;
4115 /* We use last_op_addr_reload and the contents of the above arrays
4116 first as flags - -2 means no instance encountered, -1 means exactly
4117 one instance encountered.
4118 If more than one instance has been encountered, we store the reload
4119 number of the first reload of the kind in question; reload numbers
4120 are known to be non-negative. */
4121 for (i = 0; i < noperands; i++)
4122 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4123 for (i = n_reloads - 1; i >= 0; i--)
4124 {
4125 switch (rld[i].when_needed)
4126 {
4127 case RELOAD_FOR_OPERAND_ADDRESS:
4128 if (++first_op_addr_num >= 0)
4129 {
4130 first_op_addr_num = i;
4131 need_change = 1;
4132 }
4133 break;
4134 case RELOAD_FOR_INPUT_ADDRESS:
4135 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4136 {
4137 first_inpaddr_num[rld[i].opnum] = i;
4138 need_change = 1;
4139 }
4140 break;
4141 case RELOAD_FOR_OUTPUT_ADDRESS:
4142 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4143 {
4144 first_outpaddr_num[rld[i].opnum] = i;
4145 need_change = 1;
4146 }
4147 break;
4148 default:
4149 break;
4150 }
4151 }
4152
4153 if (need_change)
4154 {
4155 for (i = 0; i < n_reloads; i++)
4156 {
4157 int first_num;
4158 enum reload_type type;
4159
4160 switch (rld[i].when_needed)
4161 {
4162 case RELOAD_FOR_OPADDR_ADDR:
4163 first_num = first_op_addr_num;
4164 type = RELOAD_FOR_OPERAND_ADDRESS;
4165 break;
4166 case RELOAD_FOR_INPADDR_ADDRESS:
4167 first_num = first_inpaddr_num[rld[i].opnum];
4168 type = RELOAD_FOR_INPUT_ADDRESS;
4169 break;
4170 case RELOAD_FOR_OUTADDR_ADDRESS:
4171 first_num = first_outpaddr_num[rld[i].opnum];
4172 type = RELOAD_FOR_OUTPUT_ADDRESS;
4173 break;
4174 default:
4175 continue;
4176 }
4177 if (first_num < 0)
4178 continue;
4179 else if (i > first_num)
4180 rld[i].when_needed = type;
4181 else
4182 {
4183 /* Check if the only TYPE reload that uses reload I is
4184 reload FIRST_NUM. */
4185 for (j = n_reloads - 1; j > first_num; j--)
4186 {
4187 if (rld[j].when_needed == type
4188 && (rld[i].secondary_p
4189 ? rld[j].secondary_in_reload == i
4190 : reg_mentioned_p (rld[i].in, rld[j].in)))
4191 {
4192 rld[i].when_needed = type;
4193 break;
4194 }
4195 }
4196 }
4197 }
4198 }
4199 }
4200
4201 /* See if we have any reloads that are now allowed to be merged
4202 because we've changed when the reload is needed to
4203 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4204 check for the most common cases. */
4205
4206 for (i = 0; i < n_reloads; i++)
4207 if (rld[i].in != 0 && rld[i].out == 0
4208 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4209 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4210 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4211 for (j = 0; j < n_reloads; j++)
4212 if (i != j && rld[j].in != 0 && rld[j].out == 0
4213 && rld[j].when_needed == rld[i].when_needed
4214 && MATCHES (rld[i].in, rld[j].in)
4215 && rld[i].class == rld[j].class
4216 && !rld[i].nocombine && !rld[j].nocombine
4217 && rld[i].reg_rtx == rld[j].reg_rtx)
4218 {
4219 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4220 transfer_replacements (i, j);
4221 rld[j].in = 0;
4222 }
4223
4224#ifdef HAVE_cc0
4225 /* If we made any reloads for addresses, see if they violate a
4226 "no input reloads" requirement for this insn. But loads that we
4227 do after the insn (such as for output addresses) are fine. */
4228 if (no_input_reloads)
4229 for (i = 0; i < n_reloads; i++)
4230 if (rld[i].in != 0
4231 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4232 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4233 abort ();
4234#endif
4235
4236 /* Compute reload_mode and reload_nregs. */
4237 for (i = 0; i < n_reloads; i++)
4238 {
4239 rld[i].mode
4240 = (rld[i].inmode == VOIDmode
4241 || (GET_MODE_SIZE (rld[i].outmode)
4242 > GET_MODE_SIZE (rld[i].inmode)))
4243 ? rld[i].outmode : rld[i].inmode;
4244
4245 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4246 }
4247
4248 /* Special case a simple move with an input reload and a
4249 destination of a hard reg, if the hard reg is ok, use it. */
4250 for (i = 0; i < n_reloads; i++)
4251 if (rld[i].when_needed == RELOAD_FOR_INPUT
4252 && GET_CODE (PATTERN (insn)) == SET
4253 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4254 && SET_SRC (PATTERN (insn)) == rld[i].in)
4255 {
4256 rtx dest = SET_DEST (PATTERN (insn));
4257 unsigned int regno = REGNO (dest);
4258
4259 if (regno < FIRST_PSEUDO_REGISTER
4260 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4261 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4262 rld[i].reg_rtx = dest;
4263 }
4264
4265 return retval;
4266}
4267
4268/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4269 accepts a memory operand with constant address. */
4270
4271static int
4272alternative_allows_memconst (constraint, altnum)
4273 const char *constraint;
4274 int altnum;
4275{
4276 int c;
4277 /* Skip alternatives before the one requested. */
4278 while (altnum > 0)
4279 {
4280 while (*constraint++ != ',');
4281 altnum--;
4282 }
4283 /* Scan the requested alternative for 'm' or 'o'.
4284 If one of them is present, this alternative accepts memory constants. */

--- 15 unchanged lines hidden (view full) ---

4300
4301 OPNUM and TYPE identify the purpose of the reload.
4302
4303 IS_SET_DEST is true if X is the destination of a SET, which is not
4304 appropriate to be replaced by a constant.
4305
4306 INSN, if nonzero, is the insn in which we do the reload. It is used
4307 to determine if we may generate output reloads, and where to put USEs
4308 for pseudos that we have to replace with stack slots.
4309
4310 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4311 result of find_reloads_address. */
4312
4313static rtx
4314find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4315 address_reloaded)
4316 rtx x;
4317 int opnum;
4318 enum reload_type type;
4319 int ind_levels;
4320 int is_set_dest;
4321 rtx insn;
4322 int *address_reloaded;
4323{
4324 RTX_CODE code = GET_CODE (x);
4325
4326 const char *fmt = GET_RTX_FORMAT (code);
4327 int i;
4328 int copied;
4329
4330 if (code == REG)
4331 {
4332 /* This code is duplicated for speed in find_reloads. */
4333 int regno = REGNO (x);
4334 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4335 x = reg_equiv_constant[regno];
4336#if 0
4337 /* This creates (subreg (mem...)) which would cause an unnecessary
4338 reload of the mem. */
4339 else if (reg_equiv_mem[regno] != 0)
4340 x = reg_equiv_mem[regno];
4341#endif
4342 else if (reg_equiv_memory_loc[regno]
4343 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4344 {
4345 rtx mem = make_memloc (x, regno);
4346 if (reg_equiv_address[regno]
4347 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4348 {
4349 /* If this is not a toplevel operand, find_reloads doesn't see
4350 this substitution. We have to emit a USE of the pseudo so
4351 that delete_output_reload can see it. */
4352 if (replace_reloads && recog_data.operand[opnum] != x)
4353 /* We mark the USE with QImode so that we recognize it
4354 as one that can be safely deleted at the end of
4355 reload. */
4356 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4357 QImode);
4358 x = mem;
4359 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4360 opnum, type, ind_levels, insn);
4361 if (address_reloaded)
4362 *address_reloaded = i;
4363 }
4364 }
4365 return x;
4366 }
4367 if (code == MEM)
4368 {
4369 rtx tem = x;
4370
4371 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4372 opnum, type, ind_levels, insn);
4373 if (address_reloaded)
4374 *address_reloaded = i;
4375
4376 return tem;
4377 }
4378
4379 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4380 {
4381 /* Check for SUBREG containing a REG that's equivalent to a constant.
4382 If the constant has a known value, truncate it right now.
4383 Similarly if we are extracting a single-word of a multi-word
4384 constant. If the constant is symbolic, allow it to be substituted
4385 normally. push_reload will strip the subreg later. If the
4386 constant is VOIDmode, abort because we will lose the mode of
4387 the register (this should never happen because one of the cases
4388 above should handle it). */
4389
4390 int regno = REGNO (SUBREG_REG (x));
4391 rtx tem;
4392
4393 if (subreg_lowpart_p (x)
4394 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4395 && reg_equiv_constant[regno] != 0
4396 && (tem = gen_lowpart_common (GET_MODE (x),
4397 reg_equiv_constant[regno])) != 0)
4398 return tem;
4399
4400 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4401 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4402 && reg_equiv_constant[regno] != 0
4403 && (tem = operand_subword (reg_equiv_constant[regno],
4404 SUBREG_BYTE (x) / UNITS_PER_WORD, 0,
4405 GET_MODE (SUBREG_REG (x)))) != 0)
4406 {
4407 /* TEM is now a word sized constant for the bits from X that
4408 we wanted. However, TEM may be the wrong representation.
4409
4410 Use gen_lowpart_common to convert a CONST_INT into a
4411 CONST_DOUBLE and vice versa as needed according to by the mode
4412 of the SUBREG. */

--- 8 unchanged lines hidden (view full) ---

4421 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4422 a 32 bit target. We still can - and have to - handle this
4423 for non-paradoxical subregs of CONST_INTs. */
4424 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4425 && reg_equiv_constant[regno] != 0
4426 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4427 && (GET_MODE_SIZE (GET_MODE (x))
4428 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4429 {
4430 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
4431 if (WORDS_BIG_ENDIAN)
4432 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4433 - GET_MODE_BITSIZE (GET_MODE (x))
4434 - shift);
4435 /* Here we use the knowledge that CONST_INTs have a
4436 HOST_WIDE_INT field. */
4437 if (shift >= HOST_BITS_PER_WIDE_INT)
4438 shift = HOST_BITS_PER_WIDE_INT - 1;
4439 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4440 }
4441
4442 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4443 && reg_equiv_constant[regno] != 0
4444 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4445 abort ();
4446
4447 /* If the subreg contains a reg that will be converted to a mem,
4448 convert the subreg to a narrower memref now.

--- 10 unchanged lines hidden (view full) ---

4459
4460 else if (regno >= FIRST_PSEUDO_REGISTER
4461#ifdef LOAD_EXTEND_OP
4462 && (GET_MODE_SIZE (GET_MODE (x))
4463 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4464#endif
4465 && (reg_equiv_address[regno] != 0
4466 || (reg_equiv_mem[regno] != 0
4467 && (! strict_memory_address_p (GET_MODE (x),
4468 XEXP (reg_equiv_mem[regno], 0))
4469 || ! offsettable_memref_p (reg_equiv_mem[regno])
4470 || num_not_at_initial_offset))))
4471 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4472 insn);
4473 }
4474
4475 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4476 {
4477 if (fmt[i] == 'e')
4478 {
4479 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4480 ind_levels, is_set_dest, insn,
4481 address_reloaded);
4482 /* If we have replaced a reg with it's equivalent memory loc -
4483 that can still be handled here e.g. if it's in a paradoxical
4484 subreg - we must make the change in a copy, rather than using
4485 a destructive change. This way, find_reloads can still elect
4486 not to do the change. */
4487 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4488 {
4489 x = shallow_copy_rtx (x);

--- 15 unchanged lines hidden (view full) ---

4505{
4506 /* We must rerun eliminate_regs, in case the elimination
4507 offsets have changed. */
4508 rtx tem
4509 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4510
4511 /* If TEM might contain a pseudo, we must copy it to avoid
4512 modifying it when we do the substitution for the reload. */
4513 if (rtx_varies_p (tem, 0))
4514 tem = copy_rtx (tem);
4515
4516 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4517 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4518
4519 /* Copy the result if it's still the same as the equivalence, to avoid
4520 modifying it when we do the substitution for the reload. */
4521 if (tem == reg_equiv_memory_loc[regno])
4522 tem = copy_rtx (tem);
4523 return tem;
4524}
4525
4526/* Record all reloads needed for handling memory address AD
4527 which appears in *LOC in a memory reference to mode MODE
4528 which itself is found in location *MEMREFLOC.
4529 Note that we take shortcuts assuming that no multi-reg machine mode
4530 occurs as part of an address.

--- 22 unchanged lines hidden (view full) ---

4553 rtx *memrefloc;
4554 rtx ad;
4555 rtx *loc;
4556 int opnum;
4557 enum reload_type type;
4558 int ind_levels;
4559 rtx insn;
4560{
4561 int regno;
4562 int removed_and = 0;
4563 rtx tem;
4564
4565 /* If the address is a register, see if it is a legitimate address and
4566 reload if not. We first handle the cases where we need not reload
4567 or where we must reload in a non-standard way. */
4568
4569 if (GET_CODE (ad) == REG)
4570 {
4571 regno = REGNO (ad);
4572
4573 /* If the register is equivalent to an invariant expression, substitute
4574 the invariant, and eliminate any eliminable register references. */
4575 tem = reg_equiv_constant[regno];
4576 if (tem != 0
4577 && (tem = eliminate_regs (tem, mode, insn))
4578 && strict_memory_address_p (mode, tem))
4579 {
4580 *loc = ad = tem;
4581 return 0;
4582 }
4583
4584 tem = reg_equiv_memory_loc[regno];
4585 if (tem != 0)
4586 {
4587 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4588 {
4589 tem = make_memloc (ad, regno);
4590 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4591 {
4592 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0),
4593 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4594 ind_levels, insn);
4595 }
4596 /* We can avoid a reload if the register's equivalent memory
4597 expression is valid as an indirect memory address.
4598 But not all addresses are valid in a mem used as an indirect
4599 address: only reg or reg+constant. */
4600

--- 7 unchanged lines hidden (view full) ---

4608 /* TEM is not the same as what we'll be replacing the
4609 pseudo with after reload, put a USE in front of INSN
4610 in the final reload pass. */
4611 if (replace_reloads
4612 && num_not_at_initial_offset
4613 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4614 {
4615 *loc = tem;
4616 /* We mark the USE with QImode so that we
4617 recognize it as one that can be safely
4618 deleted at the end of reload. */
4619 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4620 insn), QImode);
4621
4622 /* This doesn't really count as replacing the address
4623 as a whole, since it is still a memory access. */
4624 }
4625 return 0;
4626 }
4627 ad = tem;
4628 }
4629 }
4630
4631 /* The only remaining case where we can avoid a reload is if this is a
4632 hard register that is valid as a base register and which is not the
4633 subject of a CLOBBER in this insn. */
4634
4635 else if (regno < FIRST_PSEUDO_REGISTER
4636 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4637 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4638 return 0;
4639
4640 /* If we do not have one of the cases above, we must do the reload. */
4641 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4642 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4643 return 1;
4644 }
4645
4646 if (strict_memory_address_p (mode, ad))
4647 {
4648 /* The address appears valid, so reloads are not needed.
4649 But the address may contain an eliminable register.

--- 83 unchanged lines hidden (view full) ---

4733 || GET_CODE (XEXP (tem, 0)) == MEM
4734 || ! (GET_CODE (XEXP (tem, 0)) == REG
4735 || (GET_CODE (XEXP (tem, 0)) == PLUS
4736 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4737 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4738 {
4739 /* Must use TEM here, not AD, since it is the one that will
4740 have any subexpressions reloaded, if needed. */
4741 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4742 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4743 VOIDmode, 0,
4744 0, opnum, type);
4745 return ! removed_and;
4746 }
4747 else
4748 return 0;
4749 }
4750

--- 29 unchanged lines hidden (view full) ---

4780 type, ind_levels);
4781 return 0;
4782 }
4783 else
4784 {
4785 /* If the sum of two regs is not necessarily valid,
4786 reload the sum into a base reg.
4787 That will at least work. */
4788 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4789 Pmode, opnum, type, ind_levels);
4790 }
4791 return ! removed_and;
4792 }
4793
4794 /* If we have an indexed stack slot, there are three possible reasons why
4795 it might be invalid: The index might need to be reloaded, the address
4796 might have been made by frame pointer elimination and hence have a
4797 constant out of range, or both reasons might apply.
4798
4799 We can easily check for an index needing reload, but even if that is the
4800 case, we might also have an invalid constant. To avoid making the
4801 conservative assumption and requiring two reloads, we see if this address
4802 is valid when not interpreted strictly. If it is, the only problem is
4803 that the index needs a reload and find_reloads_address_1 will take care
4804 of it.
4805
4806 If we decide to do something here, it must be that
4807 `double_reg_address_ok' is true and that this address rtl was made by
4808 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4809 rework the sum so that the reload register will be added to the index.
4810 This is safe because we know the address isn't shared.
4811
4812 We check for fp/ap/sp as both the first and second operand of the
4813 innermost PLUS. */

--- 8 unchanged lines hidden (view full) ---

4822 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4823#endif
4824 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4825 && ! memory_address_p (mode, ad))
4826 {
4827 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4828 plus_constant (XEXP (XEXP (ad, 0), 0),
4829 INTVAL (XEXP (ad, 1))),
4830 XEXP (XEXP (ad, 0), 1));
4831 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4832 MODE_BASE_REG_CLASS (mode),
4833 GET_MODE (ad), opnum, type, ind_levels);
4834 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4835 type, 0, insn);
4836
4837 return 0;
4838 }
4839
4840 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4841 && GET_CODE (XEXP (ad, 0)) == PLUS
4842 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4843#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4844 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4845#endif
4846#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4847 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4848#endif
4849 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4850 && ! memory_address_p (mode, ad))
4851 {
4852 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4853 XEXP (XEXP (ad, 0), 0),
4854 plus_constant (XEXP (XEXP (ad, 0), 1),
4855 INTVAL (XEXP (ad, 1))));
4856 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4857 MODE_BASE_REG_CLASS (mode),
4858 GET_MODE (ad), opnum, type, ind_levels);
4859 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4860 type, 0, insn);
4861
4862 return 0;
4863 }
4864
4865 /* See if address becomes valid when an eliminable register
4866 in a sum is replaced. */
4867
4868 tem = ad;
4869 if (GET_CODE (ad) == PLUS)
4870 tem = subst_indexed_address (ad);
4871 if (tem != ad && strict_memory_address_p (mode, tem))
4872 {

--- 11 unchanged lines hidden (view full) ---

4884 return 0;
4885 }
4886 }
4887
4888 /* If constants aren't valid addresses, reload the constant address
4889 into a register. */
4890 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4891 {
4892 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4893 Unshare it so we can safely alter it. */
4894 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4895 && CONSTANT_POOL_ADDRESS_P (ad))
4896 {
4897 *memrefloc = copy_rtx (*memrefloc);
4898 loc = &XEXP (*memrefloc, 0);
4899 if (removed_and)
4900 loc = &XEXP (*loc, 0);
4901 }
4902
4903 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4904 Pmode, opnum, type, ind_levels);
4905 return ! removed_and;
4906 }
4907
4908 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4909 insn);
4910}
4911
4912/* Find all pseudo regs appearing in AD
4913 that are eliminable in favor of equivalent values
4914 and do not have hard regs; replace them by their equivalents.
4915 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4916 front of it for pseudos that we have to replace with stack slots. */
4917
4918static rtx
4919subst_reg_equivs (ad, insn)
4920 rtx ad;
4921 rtx insn;
4922{
4923 RTX_CODE code = GET_CODE (ad);
4924 int i;
4925 const char *fmt;
4926
4927 switch (code)
4928 {
4929 case HIGH:
4930 case CONST_INT:
4931 case CONST:
4932 case CONST_DOUBLE:
4933 case SYMBOL_REF:
4934 case LABEL_REF:
4935 case PC:
4936 case CC0:
4937 return ad;
4938
4939 case REG:
4940 {
4941 int regno = REGNO (ad);
4942
4943 if (reg_equiv_constant[regno] != 0)
4944 {
4945 subst_reg_equivs_changed = 1;
4946 return reg_equiv_constant[regno];
4947 }
4948 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4949 {
4950 rtx mem = make_memloc (ad, regno);
4951 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4952 {
4953 subst_reg_equivs_changed = 1;
4954 /* We mark the USE with QImode so that we recognize it
4955 as one that can be safely deleted at the end of
4956 reload. */
4957 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
4958 QImode);
4959 return mem;
4960 }
4961 }
4962 }
4963 return ad;
4964
4965 case PLUS:
4966 /* Quickly dispose of a common case. */
4967 if (XEXP (ad, 0) == frame_pointer_rtx
4968 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4969 return ad;
4970 break;
4971
4972 default:
4973 break;
4974 }
4975
4976 fmt = GET_RTX_FORMAT (code);
4977 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4978 if (fmt[i] == 'e')
4979 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);

--- 75 unchanged lines hidden (view full) ---

5055 /* Try to find a register to replace. */
5056 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5057 if (GET_CODE (op0) == REG
5058 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5059 && reg_renumber[regno] < 0
5060 && reg_equiv_constant[regno] != 0)
5061 op0 = reg_equiv_constant[regno];
5062 else if (GET_CODE (op1) == REG
5063 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5064 && reg_renumber[regno] < 0
5065 && reg_equiv_constant[regno] != 0)
5066 op1 = reg_equiv_constant[regno];
5067 else if (GET_CODE (op0) == PLUS
5068 && (tem = subst_indexed_address (op0)) != op0)
5069 op0 = tem;
5070 else if (GET_CODE (op1) == PLUS
5071 && (tem = subst_indexed_address (op1)) != op1)
5072 op1 = tem;
5073 else

--- 11 unchanged lines hidden (view full) ---

5085 if (op1 != 0)
5086 op0 = form_sum (op0, op1);
5087
5088 return op0;
5089 }
5090 return addr;
5091}
5092
5093/* Update the REG_INC notes for an insn. It updates all REG_INC
5094 notes for the instruction which refer to REGNO the to refer
5095 to the reload number.
5096
5097 INSN is the insn for which any REG_INC notes need updating.
5098
5099 REGNO is the register number which has been reloaded.
5100
5101 RELOADNUM is the reload number. */
5102
5103static void
5104update_auto_inc_notes (insn, regno, reloadnum)
5105 rtx insn ATTRIBUTE_UNUSED;
5106 int regno ATTRIBUTE_UNUSED;
5107 int reloadnum ATTRIBUTE_UNUSED;
5108{
5109#ifdef AUTO_INC_DEC
5110 rtx link;
5111
5112 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5113 if (REG_NOTE_KIND (link) == REG_INC
5114 && REGNO (XEXP (link, 0)) == regno)
5115 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5116#endif
5117}
5118
5119/* Record the pseudo registers we must reload into hard registers in a
5120 subexpression of a would-be memory address, X referring to a value
5121 in mode MODE. (This function is not called if the address we find
5122 is strictly valid.)
5123
5124 CONTEXT = 1 means we are considering regs as index regs,
5125 = 0 means we are considering them as base regs.
5126

--- 5 unchanged lines hidden (view full) ---

5132 INSN, if nonzero, is the insn in which we do the reload. It is used
5133 to determine if we may generate output reloads.
5134
5135 We return nonzero if X, as a whole, is reloaded or replaced. */
5136
5137/* Note that we take shortcuts assuming that no multi-reg machine mode
5138 occurs as part of an address.
5139 Also, this is not fully machine-customizable; it works for machines
5140 such as VAXen and 68000's and 32000's, but other possible machines
5141 could have addressing modes that this does not handle right. */
5142
5143static int
5144find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5145 enum machine_mode mode;
5146 rtx x;
5147 int context;
5148 rtx *loc;
5149 int opnum;
5150 enum reload_type type;
5151 int ind_levels;
5152 rtx insn;
5153{
5154 RTX_CODE code = GET_CODE (x);
5155
5156 switch (code)
5157 {
5158 case PLUS:
5159 {
5160 rtx orig_op0 = XEXP (x, 0);
5161 rtx orig_op1 = XEXP (x, 1);
5162 RTX_CODE code0 = GET_CODE (orig_op0);
5163 RTX_CODE code1 = GET_CODE (orig_op1);
5164 rtx op0 = orig_op0;
5165 rtx op1 = orig_op1;
5166
5167 if (GET_CODE (op0) == SUBREG)
5168 {
5169 op0 = SUBREG_REG (op0);
5170 code0 = GET_CODE (op0);
5171 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5172 op0 = gen_rtx_REG (word_mode,
5173 (REGNO (op0) +
5174 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5175 GET_MODE (SUBREG_REG (orig_op0)),
5176 SUBREG_BYTE (orig_op0),
5177 GET_MODE (orig_op0))));
5178 }
5179
5180 if (GET_CODE (op1) == SUBREG)
5181 {
5182 op1 = SUBREG_REG (op1);
5183 code1 = GET_CODE (op1);
5184 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5185 /* ??? Why is this given op1's mode and above for
5186 ??? op0 SUBREGs we use word_mode? */
5187 op1 = gen_rtx_REG (GET_MODE (op1),
5188 (REGNO (op1) +
5189 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5190 GET_MODE (SUBREG_REG (orig_op1)),
5191 SUBREG_BYTE (orig_op1),
5192 GET_MODE (orig_op1))));
5193 }
5194
5195 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5196 || code0 == ZERO_EXTEND || code1 == MEM)
5197 {
5198 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5199 type, ind_levels, insn);
5200 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5201 type, ind_levels, insn);
5202 }
5203

--- 59 unchanged lines hidden (view full) ---

5263 type, ind_levels, insn);
5264 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5265 type, ind_levels, insn);
5266 }
5267 }
5268
5269 return 0;
5270
5271 case POST_MODIFY:
5272 case PRE_MODIFY:
5273 {
5274 rtx op0 = XEXP (x, 0);
5275 rtx op1 = XEXP (x, 1);
5276
5277 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5278 return 0;
5279
5280 /* Currently, we only support {PRE,POST}_MODIFY constructs
5281 where a base register is {inc,dec}remented by the contents
5282 of another register or by a constant value. Thus, these
5283 operands must match. */
5284 if (op0 != XEXP (op1, 0))
5285 abort ();
5286
5287 /* Require index register (or constant). Let's just handle the
5288 register case in the meantime... If the target allows
5289 auto-modify by a constant then we could try replacing a pseudo
5290 register with its equivalent constant where applicable. */
5291 if (REG_P (XEXP (op1, 1)))
5292 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5293 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5294 opnum, type, ind_levels, insn);
5295
5296 if (REG_P (XEXP (op1, 0)))
5297 {
5298 int regno = REGNO (XEXP (op1, 0));
5299 int reloadnum;
5300
5301 /* A register that is incremented cannot be constant! */
5302 if (regno >= FIRST_PSEUDO_REGISTER
5303 && reg_equiv_constant[regno] != 0)
5304 abort ();
5305
5306 /* Handle a register that is equivalent to a memory location
5307 which cannot be addressed directly. */
5308 if (reg_equiv_memory_loc[regno] != 0
5309 && (reg_equiv_address[regno] != 0
5310 || num_not_at_initial_offset))
5311 {
5312 rtx tem = make_memloc (XEXP (x, 0), regno);
5313
5314 if (reg_equiv_address[regno]
5315 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5316 {
5317 /* First reload the memory location's address.
5318 We can't use ADDR_TYPE (type) here, because we need to
5319 write back the value after reading it, hence we actually
5320 need two registers. */
5321 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5322 &XEXP (tem, 0), opnum,
5323 RELOAD_OTHER,
5324 ind_levels, insn);
5325
5326 /* Then reload the memory location into a base
5327 register. */
5328 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5329 &XEXP (op1, 0),
5330 MODE_BASE_REG_CLASS (mode),
5331 GET_MODE (x), GET_MODE (x), 0,
5332 0, opnum, RELOAD_OTHER);
5333
5334 update_auto_inc_notes (this_insn, regno, reloadnum);
5335 return 0;
5336 }
5337 }
5338
5339 if (reg_renumber[regno] >= 0)
5340 regno = reg_renumber[regno];
5341
5342 /* We require a base register here... */
5343 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5344 {
5345 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5346 &XEXP (op1, 0), &XEXP (x, 0),
5347 MODE_BASE_REG_CLASS (mode),
5348 GET_MODE (x), GET_MODE (x), 0, 0,
5349 opnum, RELOAD_OTHER);
5350
5351 update_auto_inc_notes (this_insn, regno, reloadnum);
5352 return 0;
5353 }
5354 }
5355 else
5356 abort ();
5357 }
5358 return 0;
5359
5360 case POST_INC:
5361 case POST_DEC:
5362 case PRE_INC:
5363 case PRE_DEC:
5364 if (GET_CODE (XEXP (x, 0)) == REG)
5365 {
5366 int regno = REGNO (XEXP (x, 0));
5367 int value = 0;
5368 rtx x_orig = x;
5369
5370 /* A register that is incremented cannot be constant! */
5371 if (regno >= FIRST_PSEUDO_REGISTER
5372 && reg_equiv_constant[regno] != 0)
5373 abort ();
5374

--- 31 unchanged lines hidden (view full) ---

5406 and record how much to increment by. */
5407
5408 if (reg_renumber[regno] >= 0)
5409 regno = reg_renumber[regno];
5410 if ((regno >= FIRST_PSEUDO_REGISTER
5411 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5412 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5413 {
5414 int reloadnum;
5415
5416 /* If we can output the register afterwards, do so, this
5417 saves the extra update.
5418 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5419 CALL_INSN - and it does not set CC0.
5420 But don't do this if we cannot directly address the
5421 memory location, since this will make it harder to

--- 4 unchanged lines hidden (view full) ---

5426 : reg_equiv_mem[regno]);
5427 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5428 if (insn && GET_CODE (insn) == INSN && equiv
5429 && memory_operand (equiv, GET_MODE (equiv))
5430#ifdef HAVE_cc0
5431 && ! sets_cc0_p (PATTERN (insn))
5432#endif
5433 && ! (icode != CODE_FOR_nothing
5434 && ((*insn_data[icode].operand[0].predicate)
5435 (equiv, Pmode))
5436 && ((*insn_data[icode].operand[1].predicate)
5437 (equiv, Pmode))))
5438 {
5439 /* We use the original pseudo for loc, so that
5440 emit_reload_insns() knows which pseudo this
5441 reload refers to and updates the pseudo rtx, not
5442 its equivalent memory location, as well as the
5443 corresponding entry in reg_last_reload_reg. */
5444 loc = &XEXP (x_orig, 0);
5445 x = XEXP (x, 0);
5446 reloadnum
5447 = push_reload (x, x, loc, loc,
5448 (context ? INDEX_REG_CLASS :
5449 MODE_BASE_REG_CLASS (mode)),
5450 GET_MODE (x), GET_MODE (x), 0, 0,
5451 opnum, RELOAD_OTHER);
5452 }
5453 else
5454 {
5455 reloadnum
5456 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5457 (context ? INDEX_REG_CLASS :
5458 MODE_BASE_REG_CLASS (mode)),
5459 GET_MODE (x), GET_MODE (x), 0, 0,
5460 opnum, type);
5461 rld[reloadnum].inc
5462 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5463
5464 value = 1;
5465 }
5466
5467 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5468 reloadnum);
5469 }
5470 return value;
5471 }
5472
5473 else if (GET_CODE (XEXP (x, 0)) == MEM)
5474 {
5475 /* This is probably the result of a substitution, by eliminate_regs,
5476 of an equivalent address for a pseudo that was not allocated to a
5477 hard register. Verify that the specified address is valid and
5478 reload it into a register. */
5479 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5480 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5481 rtx link;
5482 int reloadnum;
5483
5484 /* Since we know we are going to reload this item, don't decrement
5485 for the indirection level.
5486
5487 Note that this is actually conservative: it would be slightly
5488 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5489 reload1.c here. */
5490 /* We can't use ADDR_TYPE (type) here, because we need to
5491 write back the value after reading it, hence we actually
5492 need two registers. */
5493 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5494 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5495 opnum, type, ind_levels, insn);
5496
5497 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5498 (context ? INDEX_REG_CLASS :
5499 MODE_BASE_REG_CLASS (mode)),
5500 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5501 rld[reloadnum].inc
5502 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5503
5504 link = FIND_REG_INC_NOTE (this_insn, tem);
5505 if (link != 0)
5506 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5507
5508 return 1;
5509 }

--- 9 unchanged lines hidden (view full) ---

5519 the indirection level.
5520
5521 Note that this is actually conservative: it would be slightly more
5522 efficient to use the value of SPILL_INDIRECT_LEVELS from
5523 reload1.c here. */
5524
5525 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5526 opnum, ADDR_TYPE (type), ind_levels, insn);
5527 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5528 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5529 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5530 return 1;
5531
5532 case REG:
5533 {
5534 int regno = REGNO (x);
5535
5536 if (reg_equiv_constant[regno] != 0)
5537 {
5538 find_reloads_address_part (reg_equiv_constant[regno], loc,
5539 (context ? INDEX_REG_CLASS :
5540 MODE_BASE_REG_CLASS (mode)),
5541 GET_MODE (x), opnum, type, ind_levels);
5542 return 1;
5543 }
5544
5545#if 0 /* This might screw code in reload1.c to delete prior output-reload
5546 that feeds this insn. */
5547 if (reg_equiv_mem[regno] != 0)
5548 {
5549 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5550 (context ? INDEX_REG_CLASS :
5551 MODE_BASE_REG_CLASS (mode)),
5552 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5553 return 1;
5554 }
5555#endif
5556
5557 if (reg_equiv_memory_loc[regno]
5558 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5559 {

--- 10 unchanged lines hidden (view full) ---

5570
5571 if (reg_renumber[regno] >= 0)
5572 regno = reg_renumber[regno];
5573
5574 if ((regno >= FIRST_PSEUDO_REGISTER
5575 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5576 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5577 {
5578 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5579 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5580 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5581 return 1;
5582 }
5583
5584 /* If a register appearing in an address is the subject of a CLOBBER
5585 in this insn, reload it into some other register to be safe.
5586 The CLOBBER is supposed to make the register unavailable
5587 from before this insn to after it. */
5588 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5589 {
5590 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5591 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5592 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5593 return 1;
5594 }
5595 }
5596 return 0;
5597
5598 case SUBREG:
5599 if (GET_CODE (SUBREG_REG (x)) == REG)
5600 {
5601 /* If this is a SUBREG of a hard register and the resulting register
5602 is of the wrong class, reload the whole SUBREG. This avoids
5603 needless copies if SUBREG_REG is multi-word. */
5604 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5605 {
5606 int regno = subreg_regno (x);
5607
5608 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5609 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5610 {
5611 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5612 (context ? INDEX_REG_CLASS :
5613 MODE_BASE_REG_CLASS (mode)),
5614 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5615 return 1;
5616 }
5617 }
5618 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5619 is larger than the class size, then reload the whole SUBREG. */
5620 else
5621 {
5622 enum reg_class class = (context ? INDEX_REG_CLASS
5623 : MODE_BASE_REG_CLASS (mode));
5624 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5625 > reg_class_size[class])
5626 {
5627 x = find_reloads_subreg_address (x, 0, opnum, type,
5628 ind_levels, insn);
5629 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5630 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5631 return 1;
5632 }
5633 }
5634 }
5635 break;
5636
5637 default:
5638 break;
5639 }
5640
5641 {
5642 const char *fmt = GET_RTX_FORMAT (code);
5643 int i;
5644
5645 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5646 {
5647 if (fmt[i] == 'e')
5648 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5649 opnum, type, ind_levels, insn);
5650 }
5651 }

--- 27 unchanged lines hidden (view full) ---

5679 int ind_levels;
5680{
5681 if (CONSTANT_P (x)
5682 && (! LEGITIMATE_CONSTANT_P (x)
5683 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5684 {
5685 rtx tem;
5686
5687 tem = x = force_const_mem (mode, x);
5688 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5689 opnum, type, ind_levels, 0);
5690 }
5691
5692 else if (GET_CODE (x) == PLUS
5693 && CONSTANT_P (XEXP (x, 1))
5694 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5695 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5696 {
5697 rtx tem;
5698
5699 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5700 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5701 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5702 opnum, type, ind_levels, 0);
5703 }
5704
5705 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5706 mode, VOIDmode, 0, 0, opnum, type);
5707}
5708
5709/* X, a subreg of a pseudo, is a part of an address that needs to be
5710 reloaded.
5711
5712 If the pseudo is equivalent to a memory location that cannot be directly
5713 addressed, make the necessary address reloads.

--- 39 unchanged lines hidden (view full) ---

5753 {
5754 rtx tem = make_memloc (SUBREG_REG (x), regno);
5755
5756 /* If the address changes because of register elimination, then
5757 it must be replaced. */
5758 if (force_replace
5759 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5760 {
5761 int offset = SUBREG_BYTE (x);
5762 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5763 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5764
5765 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5766 PUT_MODE (tem, GET_MODE (x));
5767
5768 /* If this was a paradoxical subreg that we replaced, the
5769 resulting memory must be sufficiently aligned to allow
5770 us to widen the mode of the memory. */
5771 if (outer_size > inner_size && STRICT_ALIGNMENT)
5772 {
5773 rtx base;
5774
5775 base = XEXP (tem, 0);
5776 if (GET_CODE (base) == PLUS)
5777 {
5778 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5779 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5780 return x;
5781 base = XEXP (base, 0);
5782 }
5783 if (GET_CODE (base) != REG
5784 || (REGNO_POINTER_ALIGN (REGNO (base))
5785 < outer_size * BITS_PER_UNIT))
5786 return x;
5787 }
5788
5789 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5790 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5791 ind_levels, insn);
5792
5793 /* If this is not a toplevel operand, find_reloads doesn't see
5794 this substitution. We have to emit a USE of the pseudo so
5795 that delete_output_reload can see it. */
5796 if (replace_reloads && recog_data.operand[opnum] != x)
5797 /* We mark the USE with QImode so that we recognize it
5798 as one that can be safely deleted at the end of
5799 reload. */
5800 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5801 SUBREG_REG (x)),
5802 insn), QImode);
5803 x = tem;
5804 }
5805 }
5806 }
5807 return x;
5808}
5809
5810/* Substitute into the current INSN the registers into which we have reloaded
5811 the things that need reloading. The array `replacements'
5812 contains the locations of all pointers that must be changed
5813 and says what to replace them with.
5814
5815 Return the rtx that X translates into; usually X, but modified. */
5816
5817void
5818subst_reloads (insn)
5819 rtx insn;
5820{
5821 int i;
5822
5823 for (i = 0; i < n_replacements; i++)
5824 {
5825 struct replacement *r = &replacements[i];
5826 rtx reloadreg = rld[r->what].reg_rtx;
5827 if (reloadreg)
5828 {
5829#ifdef ENABLE_CHECKING
5830 /* Internal consistency test. Check that we don't modify
5831 anything in the equivalence arrays. Whenever something from
5832 those arrays needs to be reloaded, it must be unshared before
5833 being substituted into; the equivalence must not be modified.
5834 Otherwise, if the equivalence is used after that, it will
5835 have been modified, and the thing substituted (probably a
5836 register) is likely overwritten and not a usable equivalence. */
5837 int check_regno;
5838
5839 for (check_regno = 0; check_regno < max_regno; check_regno++)
5840 {
5841#define CHECK_MODF(ARRAY) \
5842 if (ARRAY[check_regno] \
5843 && loc_mentioned_in_p (r->where, \
5844 ARRAY[check_regno])) \
5845 abort ()
5846
5847 CHECK_MODF (reg_equiv_constant);
5848 CHECK_MODF (reg_equiv_memory_loc);
5849 CHECK_MODF (reg_equiv_address);
5850 CHECK_MODF (reg_equiv_mem);
5851#undef CHECK_MODF
5852 }
5853#endif /* ENABLE_CHECKING */
5854
5855 /* If we're replacing a LABEL_REF with a register, add a
5856 REG_LABEL note to indicate to flow which label this
5857 register refers to. */
5858 if (GET_CODE (*r->where) == LABEL_REF
5859 && GET_CODE (insn) == JUMP_INSN)
5860 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5861 XEXP (*r->where, 0),
5862 REG_NOTES (insn));
5863
5864 /* Encapsulate RELOADREG so its machine mode matches what
5865 used to be there. Note that gen_lowpart_common will
5866 do the wrong thing if RELOADREG is multi-word. RELOADREG
5867 will always be a REG here. */
5868 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5869 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5870
5871 /* If we are putting this into a SUBREG and RELOADREG is a
5872 SUBREG, we would be making nested SUBREGs, so we have to fix
5873 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5874
5875 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5876 {
5877 if (GET_MODE (*r->subreg_loc)
5878 == GET_MODE (SUBREG_REG (reloadreg)))
5879 *r->subreg_loc = SUBREG_REG (reloadreg);
5880 else
5881 {
5882 int final_offset =
5883 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5884
5885 /* When working with SUBREGs the rule is that the byte
5886 offset must be a multiple of the SUBREG's mode. */
5887 final_offset = (final_offset /
5888 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5889 final_offset = (final_offset *
5890 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5891
5892 *r->where = SUBREG_REG (reloadreg);
5893 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5894 }
5895 }
5896 else
5897 *r->where = reloadreg;
5898 }
5899 /* If reload got no reg and isn't optional, something's wrong. */
5900 else if (! rld[r->what].optional)
5901 abort ();
5902 }
5903}
5904
5905/* Make a copy of any replacements being done into X and move those copies
5906 to locations in Y, a copy of X. We only look at the highest level of
5907 the RTL. */
5908
5909void
5910copy_replacements (x, y)
5911 rtx x;
5912 rtx y;
5913{
5914 int i, j;
5915 enum rtx_code code = GET_CODE (x);
5916 const char *fmt = GET_RTX_FORMAT (code);
5917 struct replacement *r;
5918
5919 /* We can't support X being a SUBREG because we might then need to know its
5920 location if something inside it was replaced. */
5921 if (code == SUBREG)
5922 abort ();
5923
5924 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)

--- 44 unchanged lines hidden (view full) ---

5969rtx
5970find_replacement (loc)
5971 rtx *loc;
5972{
5973 struct replacement *r;
5974
5975 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5976 {
5977 rtx reloadreg = rld[r->what].reg_rtx;
5978
5979 if (reloadreg && r->where == loc)
5980 {
5981 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5982 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5983
5984 return reloadreg;
5985 }
5986 else if (reloadreg && r->subreg_loc == loc)
5987 {
5988 /* RELOADREG must be either a REG or a SUBREG.
5989
5990 ??? Is it actually still ever a SUBREG? If so, why? */
5991
5992 if (GET_CODE (reloadreg) == REG)
5993 return gen_rtx_REG (GET_MODE (*loc),
5994 (REGNO (reloadreg) +
5995 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
5996 GET_MODE (SUBREG_REG (*loc)),
5997 SUBREG_BYTE (*loc),
5998 GET_MODE (*loc))));
5999 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6000 return reloadreg;
6001 else
6002 {
6003 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6004
6005 /* When working with SUBREGs the rule is that the byte
6006 offset must be a multiple of the SUBREG's mode. */
6007 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6008 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6009 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6010 final_offset);
6011 }
6012 }
6013 }
6014
6015 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6016 what's inside and make a new rtl if so. */
6017 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6018 || GET_CODE (*loc) == MULT)
6019 {

--- 14 unchanged lines hidden (view full) ---

6034 References contained within the substructure at LOC do not count.
6035 LOC may be zero, meaning don't ignore anything.
6036
6037 This is similar to refers_to_regno_p in rtlanal.c except that we
6038 look at equivalences for pseudos that didn't get hard registers. */
6039
6040int
6041refers_to_regno_for_reload_p (regno, endregno, x, loc)
6042 unsigned int regno, endregno;
6043 rtx x;
6044 rtx *loc;
6045{
6046 int i;
6047 unsigned int r;
6048 RTX_CODE code;
6049 const char *fmt;
6050
6051 if (x == 0)
6052 return 0;
6053
6054 repeat:
6055 code = GET_CODE (x);
6056
6057 switch (code)
6058 {
6059 case REG:
6060 r = REGNO (x);
6061
6062 /* If this is a pseudo, a hard register must not have been allocated.
6063 X must therefore either be a constant or be in memory. */
6064 if (r >= FIRST_PSEUDO_REGISTER)
6065 {
6066 if (reg_equiv_memory_loc[r])
6067 return refers_to_regno_for_reload_p (regno, endregno,
6068 reg_equiv_memory_loc[r],
6069 (rtx*) 0);
6070
6071 if (reg_equiv_constant[r])
6072 return 0;
6073
6074 abort ();
6075 }
6076
6077 return (endregno > r
6078 && regno < r + (r < FIRST_PSEUDO_REGISTER
6079 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6080 : 1));
6081
6082 case SUBREG:
6083 /* If this is a SUBREG of a hard reg, we can see exactly which
6084 registers are being modified. Otherwise, handle normally. */
6085 if (GET_CODE (SUBREG_REG (x)) == REG
6086 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6087 {
6088 unsigned int inner_regno = subreg_regno (x);
6089 unsigned int inner_endregno
6090 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6091 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6092
6093 return endregno > inner_regno && regno < inner_endregno;
6094 }
6095 break;
6096
6097 case CLOBBER:

--- 16 unchanged lines hidden (view full) ---

6114 && refers_to_regno_for_reload_p (regno, endregno,
6115 SET_DEST (x), loc))))
6116 return 1;
6117
6118 if (code == CLOBBER || loc == &SET_SRC (x))
6119 return 0;
6120 x = SET_SRC (x);
6121 goto repeat;
6122
6123 default:
6124 break;
6125 }
6126
6127 /* X does not match, so try its subexpressions. */
6128
6129 fmt = GET_RTX_FORMAT (code);
6130 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)

--- 7 unchanged lines hidden (view full) ---

6138 }
6139 else
6140 if (refers_to_regno_for_reload_p (regno, endregno,
6141 XEXP (x, i), loc))
6142 return 1;
6143 }
6144 else if (fmt[i] == 'E')
6145 {
6146 int j;
6147 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6148 if (loc != &XVECEXP (x, i, j)
6149 && refers_to_regno_for_reload_p (regno, endregno,
6150 XVECEXP (x, i, j), loc))
6151 return 1;
6152 }
6153 }
6154 return 0;
6155}
6156
6157/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6158 we check if any register number in X conflicts with the relevant register
6159 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6160 contains a MEM (we don't bother checking for memory addresses that can't
6161 conflict because we expect this to be a rare case.
6162
6163 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6164 that we look at equivalences for pseudos that didn't get hard registers. */
6165
6166int
6167reg_overlap_mentioned_for_reload_p (x, in)
6168 rtx x, in;
6169{
6170 int regno, endregno;
6171
6172 /* Overly conservative. */
6173 if (GET_CODE (x) == STRICT_LOW_PART
6174 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6175 x = XEXP (x, 0);
6176
6177 /* If either argument is a constant, then modifying X can not affect IN. */
6178 if (CONSTANT_P (x) || CONSTANT_P (in))
6179 return 0;
6180 else if (GET_CODE (x) == SUBREG)
6181 {
6182 regno = REGNO (SUBREG_REG (x));
6183 if (regno < FIRST_PSEUDO_REGISTER)
6184 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6185 GET_MODE (SUBREG_REG (x)),
6186 SUBREG_BYTE (x),
6187 GET_MODE (x));
6188 }
6189 else if (GET_CODE (x) == REG)
6190 {
6191 regno = REGNO (x);
6192
6193 /* If this is a pseudo, it must not have been assigned a hard register.
6194 Therefore, it must either be in memory or be a constant. */
6195

--- 6 unchanged lines hidden (view full) ---

6202 abort ();
6203 }
6204 }
6205 else if (GET_CODE (x) == MEM)
6206 return refers_to_mem_for_reload_p (in);
6207 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6208 || GET_CODE (x) == CC0)
6209 return reg_mentioned_p (x, in);
6210 else if (GET_CODE (x) == PLUS)
6211 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6212 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6213 else
6214 abort ();
6215
6216 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6217 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6218
6219 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6220}
6221
6222/* Return nonzero if anything in X contains a MEM. Look also for pseudo
6223 registers. */
6224
6225int
6226refers_to_mem_for_reload_p (x)
6227 rtx x;
6228{
6229 const char *fmt;
6230 int i;
6231
6232 if (GET_CODE (x) == MEM)
6233 return 1;
6234
6235 if (GET_CODE (x) == REG)
6236 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6237 && reg_equiv_memory_loc[REGNO (x)]);
6238
6239 fmt = GET_RTX_FORMAT (GET_CODE (x));
6240 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6241 if (fmt[i] == 'e'
6242 && (GET_CODE (XEXP (x, i)) == MEM
6243 || refers_to_mem_for_reload_p (XEXP (x, i))))
6244 return 1;
6245
6246 return 0;
6247}
6248
6249/* Check the insns before INSN to see if there is a suitable register
6250 containing the same value as GOAL.
6251 If OTHER is -1, look for a register in class CLASS.
6252 Otherwise, just see if register number OTHER shares GOAL's value.
6253

--- 16 unchanged lines hidden (view full) ---

6270
6271 This function is used by jump.c as well as in the reload pass.
6272
6273 If GOAL is the sum of the stack pointer and a constant, we treat it
6274 as if it were a constant except that sp is required to be unchanging. */
6275
6276rtx
6277find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6278 rtx goal;
6279 rtx insn;
6280 enum reg_class class;
6281 int other;
6282 short *reload_reg_p;
6283 int goalreg;
6284 enum machine_mode mode;
6285{
6286 rtx p = insn;
6287 rtx goaltry, valtry, value, where;
6288 rtx pat;
6289 int regno = -1;
6290 int valueno;
6291 int goal_mem = 0;
6292 int goal_const = 0;
6293 int goal_mem_addr_varies = 0;
6294 int need_stable_sp = 0;
6295 int nregs;
6296 int valuenregs;
6297

--- 10 unchanged lines hidden (view full) ---

6308 return 0;
6309 /* An address with side effects must be reexecuted. */
6310 switch (code)
6311 {
6312 case POST_INC:
6313 case PRE_INC:
6314 case POST_DEC:
6315 case PRE_DEC:
6316 case POST_MODIFY:
6317 case PRE_MODIFY:
6318 return 0;
6319 default:
6320 break;
6321 }
6322 goal_mem = 1;
6323 }
6324 else if (CONSTANT_P (goal))
6325 goal_const = 1;
6326 else if (GET_CODE (goal) == PLUS
6327 && XEXP (goal, 0) == stack_pointer_rtx
6328 && CONSTANT_P (XEXP (goal, 1)))
6329 goal_const = need_stable_sp = 1;
6330 else if (GET_CODE (goal) == PLUS
6331 && XEXP (goal, 0) == frame_pointer_rtx
6332 && CONSTANT_P (XEXP (goal, 1)))
6333 goal_const = 1;
6334 else
6335 return 0;
6336
6337 /* Scan insns back from INSN, looking for one that copies
6338 a value into or out of GOAL.
6339 Stop and give up if we reach a label. */
6340
6341 while (1)
6342 {
6343 p = PREV_INSN (p);
6344 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6345 return 0;
6346
6347 if (GET_CODE (p) == INSN
6348 /* If we don't want spill regs ... */
6349 && (! (reload_reg_p != 0
6350 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6351 /* ... then ignore insns introduced by reload; they aren't
6352 useful and can cause results in reload_as_needed to be
6353 different from what they were when calculating the need for
6354 spills. If we notice an input-reload insn here, we will
6355 reject it below, but it might hide a usable equivalent.
6356 That makes bad code. It may even abort: perhaps no reg was
6357 spilled for this insn because it was assumed we would find
6358 that equivalent. */
6359 || INSN_UID (p) < reload_first_uid))
6360 {
6361 rtx tem;
6362 pat = single_set (p);
6363
6364 /* First check for something that sets some reg equal to GOAL. */
6365 if (pat != 0
6366 && ((regno >= 0
6367 && true_regnum (SET_SRC (pat)) == regno
6368 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6369 ||
6370 (regno >= 0
6371 && true_regnum (SET_DEST (pat)) == regno

--- 8 unchanged lines hidden (view full) ---

6380 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6381 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6382 || (goal_mem
6383 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6384 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6385 /* If we are looking for a constant,
6386 and something equivalent to that constant was copied
6387 into a reg, we can use that reg. */
6388 || (goal_const && REG_NOTES (p) != 0
6389 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6390 && ((rtx_equal_p (XEXP (tem, 0), goal)
6391 && (valueno
6392 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6393 || (GET_CODE (SET_DEST (pat)) == REG
6394 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6395 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6396 == MODE_FLOAT)
6397 && GET_CODE (goal) == CONST_INT
6398 && 0 != (goaltry
6399 = operand_subword (XEXP (tem, 0), 0, 0,
6400 VOIDmode))
6401 && rtx_equal_p (goal, goaltry)
6402 && (valtry
6403 = operand_subword (SET_DEST (pat), 0, 0,
6404 VOIDmode))
6405 && (valueno = true_regnum (valtry)) >= 0)))
6406 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6407 NULL_RTX))
6408 && GET_CODE (SET_DEST (pat)) == REG
6409 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6410 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6411 == MODE_FLOAT)
6412 && GET_CODE (goal) == CONST_INT
6413 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6414 VOIDmode))
6415 && rtx_equal_p (goal, goaltry)
6416 && (valtry
6417 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6418 && (valueno = true_regnum (valtry)) >= 0)))
6419 {

--- 25 unchanged lines hidden (view full) ---

6445 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6446 (or copying VALUE into GOAL, if GOAL is also a register).
6447 Now verify that VALUE is really valid. */
6448
6449 /* VALUENO is the register number of VALUE; a hard register. */
6450
6451 /* Don't try to re-use something that is killed in this insn. We want
6452 to be able to trust REG_UNUSED notes. */
6453 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6454 return 0;
6455
6456 /* If we propose to get the value from the stack pointer or if GOAL is
6457 a MEM based on the stack pointer, we need a stable SP. */
6458 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6459 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6460 goal)))
6461 need_stable_sp = 1;

--- 4 unchanged lines hidden (view full) ---

6466
6467 /* Reject VALUE if it was loaded from GOAL
6468 and is also a register that appears in the address of GOAL. */
6469
6470 if (goal_mem && value == SET_DEST (single_set (where))
6471 && refers_to_regno_for_reload_p (valueno,
6472 (valueno
6473 + HARD_REGNO_NREGS (valueno, mode)),
6474 goal, (rtx*) 0))
6475 return 0;
6476
6477 /* Reject registers that overlap GOAL. */
6478
6479 if (!goal_mem && !goal_const
6480 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6481 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6482 return 0;
6483
6484 nregs = HARD_REGNO_NREGS (regno, mode);
6485 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6486
6487 /* Reject VALUE if it is one of the regs reserved for reloads.
6488 Reload1 knows how to reuse them anyway, and it would get
6489 confused if we allocated one without its knowledge.
6490 (Now that insns introduced by reload are ignored above,
6491 this case shouldn't happen, but I'm not positive.) */
6492
6493 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6494 {
6495 int i;
6496 for (i = 0; i < valuenregs; ++i)
6497 if (reload_reg_p[valueno + i] >= 0)
6498 return 0;
6499 }
6500
6501 /* Reject VALUE if it is a register being used for an input reload
6502 even if it is not one of those reserved. */
6503
6504 if (reload_reg_p != 0)
6505 {
6506 int i;
6507 for (i = 0; i < n_reloads; i++)
6508 if (rld[i].reg_rtx != 0 && rld[i].in)
6509 {
6510 int regno1 = REGNO (rld[i].reg_rtx);
6511 int nregs1 = HARD_REGNO_NREGS (regno1,
6512 GET_MODE (rld[i].reg_rtx));
6513 if (regno1 < valueno + valuenregs
6514 && regno1 + nregs1 > valueno)
6515 return 0;
6516 }
6517 }
6518
6519 if (goal_mem)
6520 /* We must treat frame pointer as varying here,

--- 23 unchanged lines hidden (view full) ---

6544 for (i = 0; i < nregs; ++i)
6545 if (call_used_regs[regno + i])
6546 return 0;
6547
6548 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6549 for (i = 0; i < valuenregs; ++i)
6550 if (call_used_regs[valueno + i])
6551 return 0;
6552#ifdef NON_SAVING_SETJMP
6553 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6554 return 0;
6555#endif
6556 }
6557
6558 if (INSN_P (p))
6559 {
6560 pat = PATTERN (p);
6561
6562 /* Watch out for unspec_volatile, and volatile asms. */
6563 if (volatile_insn_p (pat))
6564 return 0;
6565
6566 /* If this insn P stores in either GOAL or VALUE, return 0.
6567 If GOAL is a memory ref and this insn writes memory, return 0.
6568 If GOAL is a memory ref and its address is not constant,
6569 and this insn P changes a register used in GOAL, return 0. */
6570
6571 if (GET_CODE (pat) == COND_EXEC)
6572 pat = COND_EXEC_CODE (pat);
6573 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6574 {
6575 rtx dest = SET_DEST (pat);
6576 while (GET_CODE (dest) == SUBREG
6577 || GET_CODE (dest) == ZERO_EXTRACT
6578 || GET_CODE (dest) == SIGN_EXTRACT
6579 || GET_CODE (dest) == STRICT_LOW_PART)
6580 dest = XEXP (dest, 0);
6581 if (GET_CODE (dest) == REG)
6582 {
6583 int xregno = REGNO (dest);
6584 int xnregs;
6585 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6586 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6587 else
6588 xnregs = 1;
6589 if (xregno < regno + nregs && xregno + xnregs > regno)
6590 return 0;
6591 if (xregno < valueno + valuenregs

--- 11 unchanged lines hidden (view full) ---

6603 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6604 && reg_equiv_memory_loc[regno] != 0)
6605 return 0;
6606 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6607 return 0;
6608 }
6609 else if (GET_CODE (pat) == PARALLEL)
6610 {
6611 int i;
6612 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6613 {
6614 rtx v1 = XVECEXP (pat, 0, i);
6615 if (GET_CODE (v1) == COND_EXEC)
6616 v1 = COND_EXEC_CODE (v1);
6617 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6618 {
6619 rtx dest = SET_DEST (v1);
6620 while (GET_CODE (dest) == SUBREG
6621 || GET_CODE (dest) == ZERO_EXTRACT
6622 || GET_CODE (dest) == SIGN_EXTRACT
6623 || GET_CODE (dest) == STRICT_LOW_PART)
6624 dest = XEXP (dest, 0);
6625 if (GET_CODE (dest) == REG)
6626 {
6627 int xregno = REGNO (dest);
6628 int xnregs;
6629 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6630 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6631 else
6632 xnregs = 1;
6633 if (xregno < regno + nregs
6634 && xregno + xnregs > regno)
6635 return 0;

--- 25 unchanged lines hidden (view full) ---

6661 rtx link;
6662
6663 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6664 link = XEXP (link, 1))
6665 {
6666 pat = XEXP (link, 0);
6667 if (GET_CODE (pat) == CLOBBER)
6668 {
6669 rtx dest = SET_DEST (pat);
6670
6671 if (GET_CODE (dest) == REG)
6672 {
6673 int xregno = REGNO (dest);
6674 int xnregs
6675 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6676
6677 if (xregno < regno + nregs
6678 && xregno + xnregs > regno)
6679 return 0;
6680 else if (xregno < valueno + valuenregs
6681 && xregno + xnregs > valueno)
6682 return 0;
6683 else if (goal_mem_addr_varies
6684 && reg_overlap_mentioned_for_reload_p (dest,
6685 goal))
6686 return 0;
6687 }
6688
6689 else if (goal_mem && GET_CODE (dest) == MEM
6690 && ! push_operand (dest, GET_MODE (dest)))
6691 return 0;
6692 else if (need_stable_sp
6693 && push_operand (dest, GET_MODE (dest)))
6694 return 0;
6695 }
6696 }
6697 }
6698
6699#ifdef AUTO_INC_DEC
6700 /* If this insn auto-increments or auto-decrements
6701 either regno or valueno, return 0 now.
6702 If GOAL is a memory ref and its address is not constant,
6703 and this insn P increments a register used in GOAL, return 0. */
6704 {
6705 rtx link;
6706
6707 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6708 if (REG_NOTE_KIND (link) == REG_INC
6709 && GET_CODE (XEXP (link, 0)) == REG)
6710 {
6711 int incno = REGNO (XEXP (link, 0));
6712 if (incno < regno + nregs && incno >= regno)
6713 return 0;
6714 if (incno < valueno + valuenregs && incno >= valueno)
6715 return 0;
6716 if (goal_mem_addr_varies
6717 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6718 goal))
6719 return 0;

--- 7 unchanged lines hidden (view full) ---

6727/* Find a place where INCED appears in an increment or decrement operator
6728 within X, and return the amount INCED is incremented or decremented by.
6729 The value is always positive. */
6730
6731static int
6732find_inc_amount (x, inced)
6733 rtx x, inced;
6734{
6735 enum rtx_code code = GET_CODE (x);
6736 const char *fmt;
6737 int i;
6738
6739 if (code == MEM)
6740 {
6741 rtx addr = XEXP (x, 0);
6742 if ((GET_CODE (addr) == PRE_DEC
6743 || GET_CODE (addr) == POST_DEC
6744 || GET_CODE (addr) == PRE_INC
6745 || GET_CODE (addr) == POST_INC)
6746 && XEXP (addr, 0) == inced)
6747 return GET_MODE_SIZE (GET_MODE (x));
6748 else if ((GET_CODE (addr) == PRE_MODIFY
6749 || GET_CODE (addr) == POST_MODIFY)
6750 && GET_CODE (XEXP (addr, 1)) == PLUS
6751 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6752 && XEXP (addr, 0) == inced
6753 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6754 {
6755 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6756 return i < 0 ? -i : i;
6757 }
6758 }
6759
6760 fmt = GET_RTX_FORMAT (code);
6761 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6762 {
6763 if (fmt[i] == 'e')
6764 {
6765 int tem = find_inc_amount (XEXP (x, i), inced);
6766 if (tem != 0)
6767 return tem;
6768 }
6769 if (fmt[i] == 'E')
6770 {
6771 int j;
6772 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6773 {
6774 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6775 if (tem != 0)
6776 return tem;
6777 }
6778 }
6779 }
6780
6781 return 0;
6782}
6783
6784/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6785 If SETS is nonzero, also consider SETs. */
6786
6787int
6788regno_clobbered_p (regno, insn, mode, sets)
6789 unsigned int regno;
6790 rtx insn;
6791 enum machine_mode mode;
6792 int sets;
6793{
6794 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6795 unsigned int endregno = regno + nregs;
6796
6797 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6798 || (sets && GET_CODE (PATTERN (insn)) == SET))
6799 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6800 {
6801 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6802
6803 return test >= regno && test < endregno;
6804 }
6805
6806 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6807 {
6808 int i = XVECLEN (PATTERN (insn), 0) - 1;
6809
6810 for (; i >= 0; i--)
6811 {
6812 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6813 if ((GET_CODE (elt) == CLOBBER
6814 || (sets && GET_CODE (PATTERN (insn)) == SET))
6815 && GET_CODE (XEXP (elt, 0)) == REG)
6816 {
6817 unsigned int test = REGNO (XEXP (elt, 0));
6818
6819 if (test >= regno && test < endregno)
6820 return 1;
6821 }
6822 }
6823 }
6824
6825 return 0;
6826}
6827
6828static const char *const reload_when_needed_name[] =
6829{
6830 "RELOAD_FOR_INPUT",
6831 "RELOAD_FOR_OUTPUT",
6832 "RELOAD_FOR_INSN",
6833 "RELOAD_FOR_INPUT_ADDRESS",
6834 "RELOAD_FOR_INPADDR_ADDRESS",
6835 "RELOAD_FOR_OUTPUT_ADDRESS",
6836 "RELOAD_FOR_OUTADDR_ADDRESS",
6837 "RELOAD_FOR_OPERAND_ADDRESS",
6838 "RELOAD_FOR_OPADDR_ADDR",
6839 "RELOAD_OTHER",
6840 "RELOAD_FOR_OTHER_ADDRESS"
6841};
6842
6843static const char * const reg_class_names[] = REG_CLASS_NAMES;
6844
6845/* These functions are used to print the variables set by 'find_reloads' */
6846
6847void
6848debug_reload_to_stream (f)
6849 FILE *f;
6850{
6851 int r;
6852 const char *prefix;
6853
6854 if (! f)
6855 f = stderr;
6856 for (r = 0; r < n_reloads; r++)
6857 {
6858 fprintf (f, "Reload %d: ", r);
6859
6860 if (rld[r].in != 0)
6861 {
6862 fprintf (f, "reload_in (%s) = ",
6863 GET_MODE_NAME (rld[r].inmode));
6864 print_inline_rtx (f, rld[r].in, 24);
6865 fprintf (f, "\n\t");
6866 }
6867
6868 if (rld[r].out != 0)
6869 {
6870 fprintf (f, "reload_out (%s) = ",
6871 GET_MODE_NAME (rld[r].outmode));
6872 print_inline_rtx (f, rld[r].out, 24);
6873 fprintf (f, "\n\t");
6874 }
6875
6876 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6877
6878 fprintf (f, "%s (opnum = %d)",
6879 reload_when_needed_name[(int) rld[r].when_needed],
6880 rld[r].opnum);
6881
6882 if (rld[r].optional)
6883 fprintf (f, ", optional");
6884
6885 if (rld[r].nongroup)
6886 fprintf (f, ", nongroup");
6887
6888 if (rld[r].inc != 0)
6889 fprintf (f, ", inc by %d", rld[r].inc);
6890
6891 if (rld[r].nocombine)
6892 fprintf (f, ", can't combine");
6893
6894 if (rld[r].secondary_p)
6895 fprintf (f, ", secondary_reload_p");
6896
6897 if (rld[r].in_reg != 0)
6898 {
6899 fprintf (f, "\n\treload_in_reg: ");
6900 print_inline_rtx (f, rld[r].in_reg, 24);
6901 }
6902
6903 if (rld[r].out_reg != 0)
6904 {
6905 fprintf (f, "\n\treload_out_reg: ");
6906 print_inline_rtx (f, rld[r].out_reg, 24);
6907 }
6908
6909 if (rld[r].reg_rtx != 0)
6910 {
6911 fprintf (f, "\n\treload_reg_rtx: ");
6912 print_inline_rtx (f, rld[r].reg_rtx, 24);
6913 }
6914
6915 prefix = "\n\t";
6916 if (rld[r].secondary_in_reload != -1)
6917 {
6918 fprintf (f, "%ssecondary_in_reload = %d",
6919 prefix, rld[r].secondary_in_reload);
6920 prefix = ", ";
6921 }
6922
6923 if (rld[r].secondary_out_reload != -1)
6924 fprintf (f, "%ssecondary_out_reload = %d\n",
6925 prefix, rld[r].secondary_out_reload);
6926
6927 prefix = "\n\t";
6928 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6929 {
6930 fprintf (f, "%ssecondary_in_icode = %s", prefix,
6931 insn_data[rld[r].secondary_in_icode].name);
6932 prefix = ", ";
6933 }
6934
6935 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6936 fprintf (f, "%ssecondary_out_icode = %s", prefix,
6937 insn_data[rld[r].secondary_out_icode].name);
6938
6939 fprintf (f, "\n");
6940 }
6941}
6942
6943void
6944debug_reload ()
6945{
6946 debug_reload_to_stream (stderr);
6947}