1/* Definitions of target machine for GNU compiler for Intel X86 2 (386, 486, Pentium). |
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. |
4 5This file is part of GNU CC. 6 7GNU CC is free software; you can redistribute it and/or modify 8it under the terms of the GNU General Public License as published by 9the Free Software Foundation; either version 2, or (at your option) 10any later version. 11 12GNU CC is distributed in the hope that it will be useful, 13but WITHOUT ANY WARRANTY; without even the implied warranty of 14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15GNU General Public License for more details. 16 17You should have received a copy of the GNU General Public License 18along with GNU CC; see the file COPYING. If not, write to 19the Free Software Foundation, 59 Temple Place - Suite 330, |
20Boston, MA 02111-1307, USA. */ |
21 |
22/* The purpose of this file is to define the characteristics of the i386, 23 independent of assembler syntax or operating system. 24 25 Three other files build on this one to describe a specific assembler syntax: 26 bsd386.h, att386.h, and sun386.h. 27 28 The actual tm.h file for a particular system should include 29 this file, and then the file for the appropriate assembler syntax. --- 17 unchanged lines hidden (view full) --- 47#define HALF_PIC_ENCODE(DECL) 48#define HALF_PIC_DECLARE(NAME) 49#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.") 50#define HALF_PIC_ADDRESS_P(X) 0 51#define HALF_PIC_PTR(X) X 52#define HALF_PIC_FINISH(STREAM) 53#endif 54 |
55/* Define the specific costs for a given cpu */ 56 57struct processor_costs { 58 int add; /* cost of an add instruction */ 59 int lea; /* cost of a lea instruction */ 60 int shift_var; /* variable shift costs */ 61 int shift_const; /* constant shift costs */ 62 int mult_init; /* cost of starting a multiply */ 63 int mult_bit; /* cost of multiply per each bit set */ 64 int divide; /* cost of a divide/mod */ 65}; 66 67extern struct processor_costs *ix86_cost; 68 |
69/* Run-time compilation parameters selecting different hardware subsets. */ 70 71extern int target_flags; 72 73/* Macros used in the machine description to test the flags. */ 74 75/* configure can arrange to make this 2, to force a 486. */ 76#ifndef TARGET_CPU_DEFAULT 77#define TARGET_CPU_DEFAULT 0 78#endif 79 80/* Masks for the -m switches */ 81#define MASK_80387 000000000001 /* Hardware floating point */ |
82#define MASK_NOTUSED1 000000000002 /* bit not currently used */ 83#define MASK_NOTUSED2 000000000004 /* bit not currently used */ |
84#define MASK_RTD 000000000010 /* Use ret that pops args */ 85#define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */ 86#define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */ 87#define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */ 88#define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */ 89#define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */ |
90#define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */ |
91 /* Temporary codegen switches */ 92#define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */ 93#define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */ 94#define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */ |
95#define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */ 96#define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */ 97#define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */ 98#define MASK_STACK_PROBE 000100000000 /* Enable stack probing */ |
99 100/* Use the floating point instructions */ 101#define TARGET_80387 (target_flags & MASK_80387) 102 103/* Compile using ret insn that pops args. 104 This will not work unless you use prototypes at least 105 for all functions that can take varying numbers of args. */ 106#define TARGET_RTD (target_flags & MASK_RTD) --- 16 unchanged lines hidden (view full) --- 123 in the 387 FPU or in 386 integer registers. If set, this flag causes 124 the 387 to be used, which is compatible with most calling conventions. */ 125#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS) 126 127/* Disable generation of FP sin, cos and sqrt operations for 387. 128 This is because FreeBSD lacks these in the math-emulator-code */ 129#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387) 130 |
131/* Don't create frame pointers for leaf functions */ 132#define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER) 133 |
134/* Temporary switches for tuning code generation */ 135 136/* Disable 32x32->64 bit multiplies that are used for long long multiplies 137 and division by constants, but sometimes cause reload problems. */ 138#define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY) 139#define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY) 140 |
141/* Emit/Don't emit prologue as rtl */ 142#define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE) 143 |
144/* Debug GO_IF_LEGITIMATE_ADDRESS */ 145#define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR) 146 147/* Debug FUNCTION_ARG macros */ 148#define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG) 149 150/* Hack macros for tuning code generation */ 151#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */ |
152#define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */ |
153 |
154#define TARGET_386 (ix86_cpu == PROCESSOR_I386) 155#define TARGET_486 (ix86_cpu == PROCESSOR_I486) 156#define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM) 157#define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO) 158#define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386) 159#define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386) 160#define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \ 161 && ix86_cpu != PROCESSOR_PENTIUMPRO) 162#define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386) 163#define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386) 164#define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386) 165#define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \ 166 || ix86_cpu == PROCESSOR_PENTIUMPRO) 167#define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486) 168#define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO) 169#define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO) 170#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) |
171 172#define TARGET_SWITCHES \ 173{ { "80387", MASK_80387 }, \ 174 { "no-80387", -MASK_80387 }, \ 175 { "hard-float", MASK_80387 }, \ 176 { "soft-float", -MASK_80387 }, \ 177 { "no-soft-float", MASK_80387 }, \ |
178 { "386", 0 }, \ 179 { "no-386", 0 }, \ 180 { "486", 0 }, \ 181 { "no-486", 0 }, \ 182 { "pentium", 0 }, \ 183 { "pentiumpro", 0 }, \ |
184 { "rtd", MASK_RTD }, \ 185 { "no-rtd", -MASK_RTD }, \ 186 { "align-double", MASK_ALIGN_DOUBLE }, \ 187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \ 188 { "svr3-shlib", MASK_SVR3_SHLIB }, \ 189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \ 190 { "ieee-fp", MASK_IEEE_FP }, \ 191 { "no-ieee-fp", -MASK_IEEE_FP }, \ 192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \ 193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \ 194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \ 195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \ |
196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \ 197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \ |
198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \ 199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \ |
200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \ 201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \ |
202 { "debug-addr", MASK_DEBUG_ADDR }, \ 203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \ 204 { "move", -MASK_NO_MOVE }, \ 205 { "no-move", MASK_NO_MOVE }, \ 206 { "debug-arg", MASK_DEBUG_ARG }, \ 207 { "no-debug-arg", -MASK_DEBUG_ARG }, \ |
208 { "stack-arg-probe", MASK_STACK_PROBE }, \ 209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \ 210 { "windows", 0 }, \ 211 { "dll", 0 }, \ |
212 SUBTARGET_SWITCHES \ |
213 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}} |
214 |
215/* Which processor to schedule for. The cpu attribute defines a list that 216 mirrors this list, so changes to i386.md must be made at the same time. */ 217 218enum processor_type 219 {PROCESSOR_I386, /* 80386 */ 220 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 221 PROCESSOR_PENTIUM, 222 PROCESSOR_PENTIUMPRO}; 223 224#define PROCESSOR_I386_STRING "i386" 225#define PROCESSOR_I486_STRING "i486" 226#define PROCESSOR_I586_STRING "i586" 227#define PROCESSOR_PENTIUM_STRING "pentium" 228#define PROCESSOR_I686_STRING "i686" 229#define PROCESSOR_PENTIUMPRO_STRING "pentiumpro" 230 231extern enum processor_type ix86_cpu; 232 233extern int ix86_arch; 234 235/* Define the default processor. This is overridden by other tm.h files. */ 236#define PROCESSOR_DEFAULT \ 237 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \ 238 ? PROCESSOR_I486 \ 239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \ 240 ? PROCESSOR_PENTIUM \ 241 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \ 242 ? PROCESSOR_PENTIUMPRO \ 243 : PROCESSOR_I386 244#define PROCESSOR_DEFAULT_STRING \ 245 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \ 246 ? PROCESSOR_I486_STRING \ 247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \ 248 ? PROCESSOR_PENTIUM_STRING \ 249 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \ 250 ? PROCESSOR_PENTIUMPRO_STRING \ 251 : PROCESSOR_I386_STRING 252 |
253/* This macro is similar to `TARGET_SWITCHES' but defines names of 254 command options that have values. Its definition is an 255 initializer with a subgrouping for each command option. 256 257 Each subgrouping contains a string constant, that defines the 258 fixed part of the option name, and the address of a variable. The 259 variable, type `char *', is set to the variable part of the given 260 option if the fixed part matches. The actual option name is made 261 by appending `-m' to the specified name. */ 262#define TARGET_OPTIONS \ |
263{ { "cpu=", &ix86_cpu_string}, \ 264 { "arch=", &ix86_arch_string}, \ 265 { "reg-alloc=", &i386_reg_alloc_order }, \ |
266 { "regparm=", &i386_regparm_string }, \ 267 { "align-loops=", &i386_align_loops_string }, \ 268 { "align-jumps=", &i386_align_jumps_string }, \ 269 { "align-functions=", &i386_align_funcs_string }, \ |
270 { "branch-cost=", &i386_branch_cost_string }, \ |
271 SUBTARGET_OPTIONS \ 272} 273 274/* Sometimes certain combinations of command options do not make 275 sense on a particular target machine. You can define a macro 276 `OVERRIDE_OPTIONS' to take account of this. This macro, if 277 defined, is executed once just after all the command options have 278 been parsed. 279 280 Don't use this macro to turn on various extra optimizations for 281 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 282 283#define OVERRIDE_OPTIONS override_options () 284 285/* These are meant to be redefined in the host dependent files */ 286#define SUBTARGET_SWITCHES 287#define SUBTARGET_OPTIONS 288 |
289/* Define this to change the optimizations performed by default. */ 290#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE) 291 292/* Specs for the compiler proper */ 293 294#ifndef CC1_CPU_SPEC 295#define CC1_CPU_SPEC "\ 296%{!mcpu*: \ 297%{m386:-mcpu=i386 -march=i386} \ 298%{mno-486:-mcpu=i386 -march=i386} \ 299%{m486:-mcpu=i486 -march=i486} \ 300%{mno-386:-mcpu=i486 -march=i486} \ 301%{mno-pentium:-mcpu=i486 -march=i486} \ 302%{mpentium:-mcpu=pentium} \ 303%{mno-pentiumpro:-mcpu=pentium} \ 304%{mpentiumpro:-mcpu=pentiumpro}}" 305#endif |
306 |
307#define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__" 308#define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \ 309 -D__i586 -D__i586__ -D__pentium -D__pentium__" 310#define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \ 311 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__" 312 313#ifndef CPP_CPU_DEFAULT_SPEC 314#if TARGET_CPU_DEFAULT == 1 315#define CPP_CPU_DEFAULT_SPEC "%(cpp_486)" 316#else 317#if TARGET_CPU_DEFAULT == 2 318#define CPP_CPU_DEFAULT_SPEC "%(cpp_586)" 319#else 320#if TARGET_CPU_DEFAULT == 3 321#define CPP_CPU_DEFAULT_SPEC "%(cpp_686)" 322#else 323#define CPP_CPU_DEFAULT_SPEC "" 324#endif 325#endif 326#endif 327#endif /* CPP_CPU_DEFAULT_SPEC */ 328 329#ifndef CPP_CPU_SPEC 330#define CPP_CPU_SPEC "\ 331-Asystem(unix) -Acpu(i386) -Amachine(i386) \ 332%{!ansi:-Di386} -D__i386 -D__i386__ \ 333%{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \ 334%{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \ 335%{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \ 336%{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}" 337#endif 338 339#ifndef CC1_SPEC 340#define CC1_SPEC "%(cc1_spec) " 341#endif 342 343/* This macro defines names of additional specifications to put in the 344 specs that can be used in various specifications like CC1_SPEC. Its 345 definition is an initializer with a subgrouping for each command option. 346 347 Each subgrouping contains a string constant, that defines the 348 specification name, and a string constant that used by the GNU CC driver 349 program. 350 351 Do not define this macro if it does not need to do anything. */ 352 353#ifndef SUBTARGET_EXTRA_SPECS 354#define SUBTARGET_EXTRA_SPECS 355#endif 356 357#define EXTRA_SPECS \ 358 { "cpp_486", CPP_486_SPEC}, \ 359 { "cpp_586", CPP_586_SPEC}, \ 360 { "cpp_686", CPP_686_SPEC}, \ 361 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ 362 { "cpp_cpu", CPP_CPU_SPEC }, \ 363 { "cc1_cpu", CC1_CPU_SPEC }, \ 364 SUBTARGET_EXTRA_SPECS 365 |
366/* target machine storage layout */ 367 368/* Define for XFmode extended real floating point support. 369 This will automatically cause REAL_ARITHMETIC to be defined. */ 370#define LONG_DOUBLE_TYPE_SIZE 96 371 372/* Define if you don't want extended real, but do want to use the 373 software floating point emulator for REAL_ARITHMETIC and --- 50 unchanged lines hidden (view full) --- 424 might need to be aligned. No data type wants to be aligned 425 rounder than this. The i386 supports 64-bit floating point 426 quantities, but these can be aligned on any 32-bit boundary. 427 The published ABIs say that doubles should be aligned on word 428 boundaries, but the Pentium gets better performance with them 429 aligned on 64 bit boundaries. */ 430#define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32) 431 |
432/* If defined, a C expression to compute the alignment given to a 433 constant that is being placed in memory. CONSTANT is the constant 434 and ALIGN is the alignment that the object would ordinarily have. 435 The value of this macro is used instead of that alignment to align 436 the object. 437 438 If this macro is not defined, then ALIGN is used. 439 440 The typical use of this macro is to increase alignment for string 441 constants to be word aligned so that `strcpy' calls that copy 442 constants can be done inline. */ 443 444#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 445 (TREE_CODE (EXP) == REAL_CST \ 446 ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \ 447 ? 64 \ 448 : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \ 449 ? 128 \ 450 : (ALIGN)) \ 451 : TREE_CODE (EXP) == STRING_CST \ 452 ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \ 453 ? 256 \ 454 : (ALIGN)) \ 455 : (ALIGN)) 456 457/* If defined, a C expression to compute the alignment for a static 458 variable. TYPE is the data type, and ALIGN is the alignment that 459 the object would ordinarily have. The value of this macro is used 460 instead of that alignment to align the object. 461 462 If this macro is not defined, then ALIGN is used. 463 464 One use of this macro is to increase alignment of medium-size 465 data to make it all fit in fewer cache lines. Another is to 466 cause character arrays to be word-aligned so that `strcpy' calls 467 that copy constants to character arrays can be done inline. */ 468 469#define DATA_ALIGNMENT(TYPE, ALIGN) \ 470 ((AGGREGATE_TYPE_P (TYPE) \ 471 && TYPE_SIZE (TYPE) \ 472 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \ 473 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \ 474 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \ 475 ? 256 \ 476 : TREE_CODE (TYPE) == ARRAY_TYPE \ 477 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \ 478 ? 64 \ 479 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \ 480 ? 128 \ 481 : (ALIGN)) \ 482 : TREE_CODE (TYPE) == COMPLEX_TYPE \ 483 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \ 484 ? 64 \ 485 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \ 486 ? 128 \ 487 : (ALIGN)) \ 488 : ((TREE_CODE (TYPE) == RECORD_TYPE \ 489 || TREE_CODE (TYPE) == UNION_TYPE \ 490 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \ 491 && TYPE_FIELDS (TYPE)) \ 492 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \ 493 ? 64 \ 494 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \ 495 ? 128 \ 496 : (ALIGN)) \ 497 : TREE_CODE (TYPE) == REAL_TYPE \ 498 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \ 499 ? 64 \ 500 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \ 501 ? 128 \ 502 : (ALIGN)) \ 503 : (ALIGN)) 504 |
505/* Set this non-zero if move instructions will actually fail to work 506 when given unaligned data. */ 507#define STRICT_ALIGNMENT 0 508 509/* If bit field type is int, don't let it cross an int, 510 and give entire struct the alignment of an int. */ 511/* Required on the 386 since it doesn't have bitfield insns. */ 512#define PCC_BITFIELD_TYPE_MATTERS 1 513 514/* Maximum power of 2 that code can be aligned to. */ 515#define MAX_CODE_ALIGN 6 /* 64 byte alignment */ 516 517/* Align loop starts for optimal branching. */ |
518#define LOOP_ALIGN(LABEL) (i386_align_loops) 519#define LOOP_ALIGN_MAX_SKIP (i386_align_loops_string ? 0 : 7) |
520 521/* This is how to align an instruction for optimal branching. 522 On i486 we'll get better performance by aligning on a 523 cache line (i.e. 16 byte) boundary. */ |
524#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps) 525#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (i386_align_jumps_string ? 0 : 7) |
526 527 528/* Standard register usage. */ 529 530/* This processor has special stack-like registers. See reg-stack.c 531 for details. */ 532 533#define STACK_REGS |
534#define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode) |
535 536/* Number of actual hardware registers. 537 The hardware registers are assigned numbers for the compiler 538 from 0 to just below FIRST_PSEUDO_REGISTER. 539 All registers that the compiler knows about must be given numbers, 540 even those that are not normally considered general registers. 541 542 In the 80386 we give the 8 general purpose registers the numbers 0-7. --- 101 unchanged lines hidden (view full) --- 644 On the 80386, the first 4 cpu registers can hold any mode 645 while the floating point registers may hold only floating point. 646 Make it clear that the fp regs could not hold a 16-byte float. */ 647 648/* The casts to int placate a compiler on a microvax, 649 for cross-compiler testing. */ 650 651#define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
652 ((REGNO) < 4 ? 1 \ |
653 : FP_REGNO_P (REGNO) \ 654 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \ 655 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \ |
656 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\ 657 : (int) (MODE) != (int) QImode ? 1 \ 658 : (reload_in_progress | reload_completed) == 1) |
659 660/* Value is 1 if it is a good idea to tie two pseudo registers 661 when one has mode MODE1 and one has mode MODE2. 662 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 663 for any hard reg, then this must be 0 for correct output. */ 664 |
665#define MODES_TIEABLE_P(MODE1, MODE2) \ 666 ((MODE1) == (MODE2) \ 667 || ((MODE1) == SImode && (MODE2) == HImode \ 668 || (MODE1) == HImode && (MODE2) == SImode)) |
669 |
670/* Specify the registers used for certain standard purposes. 671 The values of these macros are register numbers. */ 672 673/* on the 386 the pc register is %eip, and is not usable as a general 674 register. The ordinary mov instructions won't work */ 675/* #define PC_REGNUM */ 676 677/* Register to use for pushing function arguments. */ --- 8 unchanged lines hidden (view full) --- 686/* First & last stack-like regs */ 687#define FIRST_STACK_REG FIRST_FLOAT_REG 688#define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 689 690/* Value should be nonzero if functions must have frame pointers. 691 Zero means the frame pointer need not be set up (and parms 692 may be accessed via the stack pointer) in functions that seem suitable. 693 This is computed in `reload', in reload1.c. */ |
694#define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) |
695 696/* Base register for access to arguments of the function. */ 697#define ARG_POINTER_REGNUM 16 698 699/* Register in which static-chain is passed to a function. */ 700#define STATIC_CHAIN_REGNUM 2 701 702/* Register to hold the addressing base for position independent --- 86 unchanged lines hidden (view full) --- 789 "FLOAT_REGS", \ 790 "ALL_REGS" } 791 792/* Define which registers fit in which classes. 793 This is an initializer for a vector of HARD_REG_SET 794 of length N_REG_CLASSES. */ 795 796#define REG_CLASS_CONTENTS \ |
797{ {0}, \ 798 {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \ 799 {0x3}, /* AD_REGS */ \ 800 {0xf}, /* Q_REGS */ \ 801 {0x10}, {0x20}, /* SIREG, DIREG */ \ 802 {0x7f}, /* INDEX_REGS */ \ 803 {0x100ff}, /* GENERAL_REGS */ \ 804 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \ 805 {0xff00}, /* FLOAT_REGS */ \ 806 {0x1ffff}} |
807 808/* The same information, inverted: 809 Return the class number of the smallest class containing 810 reg number REGNO. This could be a conditional expression 811 or could index an array. */ 812 813#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 814 815/* When defined, the compiler allows registers explicitly used in the 816 rtl to be used as spill registers but prevents the compiler from 817 extending the lifetime of these registers. */ 818 |
819#define SMALL_REGISTER_CLASSES 1 |
820 821#define QI_REG_P(X) \ 822 (REG_P (X) && REGNO (X) < 4) 823#define NON_QI_REG_P(X) \ 824 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 825 826#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 827#define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) --- 57 unchanged lines hidden (view full) --- 885 886#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 887 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \ 888 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \ 889 (C) == 'K' ? (VALUE) == 0xff : \ 890 (C) == 'L' ? (VALUE) == 0xffff : \ 891 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \ 892 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\ |
893 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \ |
894 0) 895 896/* Similar, but for floating constants, and defining letters G and H. 897 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if 898 TARGET_387 isn't set, because the stack register converter may need to |
899 load 0.0 into the function value register. |
900 |
901 We disallow these constants when -fomit-frame-pointer and compiling 902 PIC code since reload might need to force the constant to memory. 903 Forcing the constant to memory changes the elimination offsets after 904 the point where they must stay constant. 905 906 However, we must allow them after reload as completed as reg-stack.c 907 will create insns which use these constants. */ 908 |
909#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ |
910 (((reload_completed || !flag_pic || !flag_omit_frame_pointer) && (C) == 'G') \ 911 ? standard_80387_constant_p (VALUE) : 0) |
912 913/* Place additional restrictions on the register class to use when it 914 is necessary to be able to hold a value of mode MODE in a reload 915 register for which class CLASS would ordinarily be used. */ 916 917#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 918 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \ 919 ? Q_REGS : (CLASS)) --- 108 unchanged lines hidden (view full) --- 1028#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \ 1029 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE)) 1030 1031/* Define how to find the value returned by a function. 1032 VALTYPE is the data type of the value (as a tree). 1033 If the precise function being called is known, FUNC is its FUNCTION_DECL; 1034 otherwise, FUNC is 0. */ 1035#define FUNCTION_VALUE(VALTYPE, FUNC) \ |
1036 gen_rtx_REG (TYPE_MODE (VALTYPE), \ |
1037 VALUE_REGNO (TYPE_MODE (VALTYPE))) 1038 1039/* Define how to find the value returned by a library function 1040 assuming the value has mode MODE. */ 1041 1042#define LIBCALL_VALUE(MODE) \ |
1043 gen_rtx_REG (MODE, VALUE_REGNO (MODE)) |
1044 1045/* Define the size of the result block used for communication between 1046 untyped_call and untyped_return. The block contains a DImode value 1047 followed by the block used by fnsave and frstor. */ 1048 1049#define APPLY_RESULT_SIZE (8+108) 1050 1051/* 1 if N is a possible register number for function argument passing. */ --- 10 unchanged lines hidden (view full) --- 1062 int nregs; /* # registers available for passing */ 1063 int regno; /* next available register number */ 1064} CUMULATIVE_ARGS; 1065 1066/* Initialize a variable CUM of type CUMULATIVE_ARGS 1067 for a call to a function whose data type is FNTYPE. 1068 For a library call, FNTYPE is 0. */ 1069 |
1070#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
1071 (init_cumulative_args (&CUM, FNTYPE, LIBNAME)) 1072 1073/* Update the data in CUM to advance over an argument 1074 of mode MODE and data type TYPE. 1075 (TYPE is null for libcalls where that information may not be available.) */ 1076 1077#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1078 (function_arg_advance (&CUM, MODE, TYPE, NAMED)) --- 16 unchanged lines hidden (view full) --- 1095 1096/* For an arg passed partly in registers and partly in memory, 1097 this is the number of registers used. 1098 For args passed entirely in registers or entirely in memory, zero. */ 1099 1100#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 1101 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)) 1102 |
1103/* This macro is invoked just before the start of a function. 1104 It is used here to output code for -fpic that will load the 1105 return address into %ebx. */ 1106 1107#undef ASM_OUTPUT_FUNCTION_PREFIX 1108#define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \ 1109 asm_output_function_prefix (FILE, FNNAME) 1110 |
1111/* This macro generates the assembly code for function entry. 1112 FILE is a stdio stream to output the code to. 1113 SIZE is an int: how many units of temporary storage to allocate. 1114 Refer to the array `regs_ever_live' to determine which registers 1115 to save; `regs_ever_live[I]' is nonzero if register number I 1116 is ever used in the function. This macro is responsible for 1117 knowing which registers should not be saved even if used. */ 1118 --- 13 unchanged lines hidden (view full) --- 1132 } \ 1133 else \ 1134 { \ 1135 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \ 1136 fprintf (FILE, "\tcall _mcount\n"); \ 1137 } \ 1138} 1139 |
1140 |
1141/* There are three profiling modes for basic blocks available. 1142 The modes are selected at compile time by using the options 1143 -a or -ax of the gnu compiler. 1144 The variable `profile_block_flag' will be set according to the 1145 selected option. |
1146 |
1147 profile_block_flag == 0, no option used: |
1148 |
1149 No profiling done. |
1150 |
1151 profile_block_flag == 1, -a option used. |
1152 |
1153 Count frequency of execution of every basic block. 1154 1155 profile_block_flag == 2, -ax option used. 1156 1157 Generate code to allow several different profiling modes at run time. 1158 Available modes are: 1159 Produce a trace of all basic blocks. 1160 Count frequency of jump instructions executed. 1161 In every mode it is possible to start profiling upon entering 1162 certain functions and to disable profiling of some other functions. 1163 1164 The result of basic-block profiling will be written to a file `bb.out'. 1165 If the -ax option is used parameters for the profiling will be read 1166 from file `bb.in'. 1167 1168*/ 1169 1170/* The following macro shall output assembler code to FILE 1171 to initialize basic-block profiling. 1172 1173 If profile_block_flag == 2 1174 1175 Output code to call the subroutine `__bb_init_trace_func' 1176 and pass two parameters to it. The first parameter is 1177 the address of a block allocated in the object module. 1178 The second parameter is the number of the first basic block 1179 of the function. 1180 1181 The name of the block is a local symbol made with this statement: 1182 1183 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0); 1184 1185 Of course, since you are writing the definition of 1186 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you 1187 can take a short cut in the definition of this macro and use the 1188 name that you know will result. 1189 1190 The number of the first basic block of the function is 1191 passed to the macro in BLOCK_OR_LABEL. 1192 1193 If described in a virtual assembler language the code to be 1194 output looks like: 1195 1196 parameter1 <- LPBX0 1197 parameter2 <- BLOCK_OR_LABEL 1198 call __bb_init_trace_func 1199 1200 else if profile_block_flag != 0 1201 1202 Output code to call the subroutine `__bb_init_func' 1203 and pass one single parameter to it, which is the same 1204 as the first parameter to `__bb_init_trace_func'. 1205 1206 The first word of this parameter is a flag which will be nonzero if 1207 the object module has already been initialized. So test this word 1208 first, and do not call `__bb_init_func' if the flag is nonzero. 1209 Note: When profile_block_flag == 2 the test need not be done 1210 but `__bb_init_trace_func' *must* be called. 1211 1212 BLOCK_OR_LABEL may be used to generate a label number as a 1213 branch destination in case `__bb_init_func' will not be called. 1214 1215 If described in a virtual assembler language the code to be 1216 output looks like: 1217 1218 cmp (LPBX0),0 1219 jne local_label 1220 parameter1 <- LPBX0 1221 call __bb_init_func 1222local_label: 1223 1224*/ 1225 |
1226#undef FUNCTION_BLOCK_PROFILER |
1227#define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \ |
1228do \ 1229 { \ 1230 static int num_func = 0; \ 1231 rtx xops[8]; \ 1232 char block_table[80], false_label[80]; \ 1233 \ 1234 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \ |
1235 \ |
1236 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \ |
1237 xops[5] = stack_pointer_rtx; \ |
1238 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \ |
1239 \ 1240 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \ |
1241 \ |
1242 switch (profile_block_flag) \ |
1243 { \ |
1244 \ |
1245 case 2: \ 1246 \ 1247 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \ 1248 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \ 1249 xops[6] = GEN_INT (8); \ 1250 \ 1251 output_asm_insn (AS1(push%L2,%2), xops); \ 1252 if (!flag_pic) \ 1253 output_asm_insn (AS1(push%L1,%1), xops); \ 1254 else \ 1255 { \ 1256 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \ 1257 output_asm_insn (AS1 (push%L7,%7), xops); \ 1258 } \ 1259 \ 1260 output_asm_insn (AS1(call,%P3), xops); \ 1261 output_asm_insn (AS2(add%L0,%6,%5), xops); \ 1262 \ 1263 break; \ 1264 \ 1265 default: \ 1266 \ 1267 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \ 1268 \ 1269 xops[0] = const0_rtx; \ 1270 xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \ 1271 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \ 1272 xops[4] = gen_rtx_MEM (Pmode, xops[1]); \ 1273 xops[6] = GEN_INT (4); \ 1274 \ 1275 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \ 1276 \ 1277 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \ 1278 output_asm_insn (AS1(jne,%2), xops); \ 1279 \ 1280 if (!flag_pic) \ 1281 output_asm_insn (AS1(push%L1,%1), xops); \ 1282 else \ 1283 { \ 1284 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \ 1285 output_asm_insn (AS1 (push%L7,%7), xops); \ 1286 } \ 1287 \ 1288 output_asm_insn (AS1(call,%P3), xops); \ 1289 output_asm_insn (AS2(add%L0,%6,%5), xops); \ 1290 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \ 1291 num_func++; \ 1292 \ 1293 break; \ 1294 \ 1295 } \ |
1296 } \ 1297while (0) 1298 |
1299/* The following macro shall output assembler code to FILE 1300 to increment a counter associated with basic block number BLOCKNO. |
1301 |
1302 If profile_block_flag == 2 |
1303 |
1304 Output code to initialize the global structure `__bb' and 1305 call the function `__bb_trace_func' which will increment the 1306 counter. |
1307 |
1308 `__bb' consists of two words. In the first word the number 1309 of the basic block has to be stored. In the second word 1310 the address of a block allocated in the object module 1311 has to be stored. |
1312 |
1313 The basic block number is given by BLOCKNO. 1314 1315 The address of the block is given by the label created with 1316 1317 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0); 1318 1319 by FUNCTION_BLOCK_PROFILER. 1320 1321 Of course, since you are writing the definition of 1322 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you 1323 can take a short cut in the definition of this macro and use the 1324 name that you know will result. 1325 1326 If described in a virtual assembler language the code to be 1327 output looks like: 1328 1329 move BLOCKNO -> (__bb) 1330 move LPBX0 -> (__bb+4) 1331 call __bb_trace_func 1332 1333 Note that function `__bb_trace_func' must not change the 1334 machine state, especially the flag register. To grant 1335 this, you must output code to save and restore registers 1336 either in this macro or in the macros MACHINE_STATE_SAVE 1337 and MACHINE_STATE_RESTORE. The last two macros will be 1338 used in the function `__bb_trace_func', so you must make 1339 sure that the function prologue does not change any 1340 register prior to saving it with MACHINE_STATE_SAVE. 1341 1342 else if profile_block_flag != 0 1343 1344 Output code to increment the counter directly. 1345 Basic blocks are numbered separately from zero within each 1346 compiled object module. The count associated with block number 1347 BLOCKNO is at index BLOCKNO in an array of words; the name of 1348 this array is a local symbol made with this statement: 1349 1350 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2); 1351 1352 Of course, since you are writing the definition of 1353 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you 1354 can take a short cut in the definition of this macro and use the 1355 name that you know will result. 1356 1357 If described in a virtual assembler language the code to be 1358 output looks like: 1359 1360 inc (LPBX2+4*BLOCKNO) 1361 1362*/ 1363 1364#define BLOCK_PROFILER(FILE, BLOCKNO) \ |
1365do \ 1366 { \ |
1367 rtx xops[8], cnt_rtx; \ |
1368 char counts[80]; \ |
1369 char *block_table = counts; \ |
1370 \ |
1371 switch (profile_block_flag) \ 1372 { \ |
1373 \ |
1374 case 2: \ |
1375 \ |
1376 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \ |
1377 \ |
1378 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \ 1379 xops[2] = GEN_INT ((BLOCKNO)); \ 1380 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \ 1381 xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \ 1382 xops[5] = plus_constant (xops[4], 4); \ 1383 xops[0] = gen_rtx_MEM (SImode, xops[4]); \ 1384 xops[6] = gen_rtx_MEM (SImode, xops[5]); \ 1385 \ 1386 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \ 1387 \ 1388 fprintf(FILE, "\tpushf\n"); \ 1389 output_asm_insn (AS2(mov%L0,%2,%0), xops); \ 1390 if (flag_pic) \ 1391 { \ 1392 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \ 1393 output_asm_insn (AS1(push%L7,%7), xops); \ 1394 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \ 1395 output_asm_insn (AS2(mov%L6,%7,%6), xops); \ 1396 output_asm_insn (AS1(pop%L7,%7), xops); \ 1397 } \ 1398 else \ 1399 output_asm_insn (AS2(mov%L6,%1,%6), xops); \ 1400 output_asm_insn (AS1(call,%P3), xops); \ 1401 fprintf(FILE, "\tpopf\n"); \ 1402 \ 1403 break; \ 1404 \ 1405 default: \ 1406 \ 1407 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \ 1408 cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \ 1409 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \ 1410 \ 1411 if (BLOCKNO) \ 1412 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \ 1413 \ 1414 if (flag_pic) \ 1415 cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \ 1416 \ 1417 xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \ 1418 output_asm_insn (AS1(inc%L0,%0), xops); \ 1419 \ 1420 break; \ 1421 \ 1422 } \ |
1423 } \ 1424while (0) 1425 |
1426/* The following macro shall output assembler code to FILE 1427 to indicate a return from function during basic-block profiling. 1428 1429 If profiling_block_flag == 2: 1430 1431 Output assembler code to call function `__bb_trace_ret'. 1432 1433 Note that function `__bb_trace_ret' must not change the 1434 machine state, especially the flag register. To grant 1435 this, you must output code to save and restore registers 1436 either in this macro or in the macros MACHINE_STATE_SAVE_RET 1437 and MACHINE_STATE_RESTORE_RET. The last two macros will be 1438 used in the function `__bb_trace_ret', so you must make 1439 sure that the function prologue does not change any 1440 register prior to saving it with MACHINE_STATE_SAVE_RET. 1441 1442 else if profiling_block_flag != 0: 1443 1444 The macro will not be used, so it need not distinguish 1445 these cases. 1446*/ 1447 1448#define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \ 1449do \ 1450 { \ 1451 rtx xops[1]; \ 1452 \ 1453 xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \ 1454 \ 1455 output_asm_insn (AS1(call,%P0), xops); \ 1456 \ 1457 } \ 1458while (0) 1459 1460/* The function `__bb_trace_func' is called in every basic block 1461 and is not allowed to change the machine state. Saving (restoring) 1462 the state can either be done in the BLOCK_PROFILER macro, 1463 before calling function (rsp. after returning from function) 1464 `__bb_trace_func', or it can be done inside the function by 1465 defining the macros: 1466 1467 MACHINE_STATE_SAVE(ID) 1468 MACHINE_STATE_RESTORE(ID) 1469 1470 In the latter case care must be taken, that the prologue code 1471 of function `__bb_trace_func' does not already change the 1472 state prior to saving it with MACHINE_STATE_SAVE. 1473 1474 The parameter `ID' is a string identifying a unique macro use. 1475 1476 On the i386 the initialization code at the begin of 1477 function `__bb_trace_func' contains a `sub' instruction 1478 therefore we handle save and restore of the flag register 1479 in the BLOCK_PROFILER macro. */ 1480 1481#define MACHINE_STATE_SAVE(ID) \ 1482 asm (" pushl %eax"); \ 1483 asm (" pushl %ecx"); \ 1484 asm (" pushl %edx"); \ 1485 asm (" pushl %esi"); 1486 1487#define MACHINE_STATE_RESTORE(ID) \ 1488 asm (" popl %esi"); \ 1489 asm (" popl %edx"); \ 1490 asm (" popl %ecx"); \ 1491 asm (" popl %eax"); 1492 |
1493/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 1494 the stack pointer does not matter. The value is tested only in 1495 functions that have frame pointers. 1496 No definition is equivalent to always zero. */ 1497/* Note on the 386 it might be more efficient not to define this since 1498 we have to restore it ourselves from the frame pointer, in order to 1499 use pop */ 1500 --- 9 unchanged lines hidden (view full) --- 1510 of alloca; we also take advantage of it to omit stack adjustments 1511 before returning. 1512 1513 If the last non-note insn in the function is a BARRIER, then there 1514 is no need to emit a function prologue, because control does not fall 1515 off the end. This happens if the function ends in an "exit" call, or 1516 if a `return' insn is emitted directly into the function. */ 1517 |
1518#if 0 1519#define FUNCTION_BEGIN_EPILOGUE(FILE) \ |
1520do { \ 1521 rtx last = get_last_insn (); \ 1522 if (last && GET_CODE (last) == NOTE) \ 1523 last = prev_nonnote_insn (last); \ |
1524/* if (! last || GET_CODE (last) != BARRIER) \ 1525 function_epilogue (FILE, SIZE);*/ \ |
1526} while (0) |
1527#endif |
1528 |
1529#define FUNCTION_EPILOGUE(FILE, SIZE) \ 1530 function_epilogue (FILE, SIZE) 1531 |
1532/* Output assembler code for a block containing the constant parts 1533 of a trampoline, leaving space for the variable parts. */ 1534 1535/* On the 386, the trampoline contains three instructions: 1536 mov #STATIC,ecx 1537 mov #FUNCTION,eax 1538 jmp @eax */ 1539#define TRAMPOLINE_TEMPLATE(FILE) \ --- 13 unchanged lines hidden (view full) --- 1553#define TRAMPOLINE_SIZE 12 1554 1555/* Emit RTL insns to initialize the variable parts of a trampoline. 1556 FNADDR is an RTX for the address of the function's pure code. 1557 CXT is an RTX for the static chain value for the function. */ 1558 1559#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1560{ \ |
1561 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \ 1562 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \ |
1563} 1564 1565/* Definitions for register eliminations. 1566 1567 This is an array of structures. Each structure initializes one pair 1568 of eliminable registers. The "from" register number is given first, 1569 followed by "to". Eliminations of the same "from" register are listed 1570 in order of preference. --- 30 unchanged lines hidden (view full) --- 1601 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \ 1602 else \ 1603 { \ 1604 int regno; \ 1605 int offset = 0; \ 1606 \ 1607 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ 1608 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \ |
1609 || ((current_function_uses_pic_offset_table \ 1610 || current_function_uses_const_pool) \ 1611 && flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)) \ |
1612 offset += 4; \ 1613 \ 1614 (OFFSET) = offset + get_frame_size (); \ 1615 \ 1616 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1617 (OFFSET) += 4; /* Skip saved PC */ \ 1618 } \ 1619} --- 127 unchanged lines hidden (view full) --- 1747 However, if REG is a broken-out memory address or multiplication, 1748 nothing needs to be done because REG can certainly go in a general reg. 1749 1750 When -fpic is used, special handling is needed for symbolic references. 1751 See comments by legitimize_pic_address in i386.c for details. */ 1752 1753#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 1754{ \ |
1755 (X) = legitimize_address (X, OLDX, MODE); \ 1756 if (memory_address_p (MODE, X)) \ 1757 goto WIN; \ 1758} 1759 |
1760#define REWRITE_ADDRESS(x) rewrite_address(x) 1761 |
1762/* Nonzero if the constant value X is a legitimate general operand 1763 when generating PIC code. It is given that flag_pic is on and 1764 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1765 1766#define LEGITIMATE_PIC_OPERAND_P(X) \ 1767 (! SYMBOLIC_CONST (X) \ 1768 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))) 1769 --- 18 unchanged lines hidden (view full) --- 1788 1789#define ENCODE_SECTION_INFO(DECL) \ 1790do \ 1791 { \ 1792 if (flag_pic) \ 1793 { \ 1794 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ 1795 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ |
1796 \ 1797 if (TARGET_DEBUG_ADDR \ 1798 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \ 1799 { \ 1800 fprintf (stderr, "Encode %s, public = %d\n", \ 1801 IDENTIFIER_POINTER (DECL_NAME (DECL)), \ 1802 TREE_PUBLIC (DECL)); \ 1803 } \ 1804 \ |
1805 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ 1806 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ 1807 || ! TREE_PUBLIC (DECL)); \ 1808 } \ 1809 } \ 1810while (0) 1811 |
1812/* Initialize data used by insn expanders. This is called from 1813 init_emit, once for each function, before code is generated. 1814 For 386, clear stack slot assignments remembered from previous 1815 functions. */ 1816 1817#define INIT_EXPANDERS clear_386_stack_locals () 1818 1819/* The `FINALIZE_PIC' macro serves as a hook to emit these special --- 47 unchanged lines hidden (view full) --- 1867 1868#define REGPARM_MAX 3 1869 1870 1871/* Specify the machine mode that this machine uses 1872 for the index in the tablejump instruction. */ 1873#define CASE_VECTOR_MODE Pmode 1874 |
1875/* Define as C expression which evaluates to nonzero if the tablejump 1876 instruction expects the table to contain offsets from the address of the 1877 table. 1878 Do not define this if the table should contain absolute addresses. */ 1879/* #define CASE_VECTOR_PC_RELATIVE 1 */ |
1880 1881/* Specify the tree operation to be used to convert reals to integers. 1882 This should be changed to take advantage of fist --wfs ?? 1883 */ 1884#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1885 1886/* This is the kind of divide that is easiest to do in the general case. */ 1887#define EASY_DIV_EXPR TRUNC_DIV_EXPR 1888 1889/* Define this as 1 if `char' should by default be signed; else as 0. */ 1890#define DEFAULT_SIGNED_CHAR 1 1891 1892/* Max number of bytes we can move from memory to memory 1893 in one reasonably fast instruction. */ 1894#define MOVE_MAX 4 1895 |
1896/* The number of scalar move insns which should be generated instead 1897 of a string move insn or a library call. Increasing the value 1898 will always make code faster, but eventually incurs high cost in 1899 increased code size. |
1900 |
1901 If you don't define this, a reasonable default is used. |
1902 |
1903 Make this large on i386, since the block move is very inefficient with small 1904 blocks, and the hard register needs of the block move require much reload 1905 work. */ |
1906 |
1907#define MOVE_RATIO 5 1908 |
1909/* Define if shifts truncate the shift count 1910 which implies one can omit a sign-extension or zero-extension 1911 of a shift count. */ |
1912/* On i386, shifts do truncate the count. But bit opcodes don't. */ |
1913 1914/* #define SHIFT_COUNT_TRUNCATED */ 1915 1916/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1917 is done just by pretending it is already truncated. */ 1918#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1919 1920/* We assume that the store-condition-codes instructions store 0 for false --- 10 unchanged lines hidden (view full) --- 1931 After generation of rtl, the compiler makes no further distinction 1932 between pointers and any other objects of this machine mode. */ 1933#define Pmode SImode 1934 1935/* A function address in a call instruction 1936 is a byte address (for indexing purposes) 1937 so give the MEM rtx a byte's mode. */ 1938#define FUNCTION_MODE QImode |
1939 1940/* A part of a C `switch' statement that describes the relative costs 1941 of constant RTL expressions. It must contain `case' labels for 1942 expression codes `const_int', `const', `symbol_ref', `label_ref' 1943 and `const_double'. Each case must ultimately reach a `return' 1944 statement to return the relative cost of the use of that kind of 1945 constant value in an expression. The cost may depend on the 1946 precise value of the constant, which is available for examination 1947 in X, and the rtx code of the expression in which it is contained, 1948 found in OUTER_CODE. 1949 1950 CODE is the expression code--redundant, since it can be obtained 1951 with `GET_CODE (X)'. */ |
1952 |
1953#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1954 case CONST_INT: \ |
1955 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \ |
1956 case CONST: \ 1957 case LABEL_REF: \ 1958 case SYMBOL_REF: \ |
1959 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \ 1960 \ |
1961 case CONST_DOUBLE: \ 1962 { \ 1963 int code; \ 1964 if (GET_MODE (RTX) == VOIDmode) \ 1965 return 2; \ |
1966 \ |
1967 code = standard_80387_constant_p (RTX); \ 1968 return code == 1 ? 0 : \ 1969 code == 2 ? 1 : \ 1970 2; \ 1971 } 1972 |
1973/* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */ 1974#define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;} |
1975 |
1976/* Like `CONST_COSTS' but applies to nonconstant RTL expressions. 1977 This can be used, for example, to indicate how costly a multiply 1978 instruction is. In writing this macro, you can use the construct 1979 `COSTS_N_INSNS (N)' to specify a cost equal to N fast 1980 instructions. OUTER_CODE is the code of the expression in which X 1981 is contained. 1982 1983 This macro is optional; do not define it if the default cost 1984 assumptions are adequate for the target machine. */ 1985 1986#define RTX_COSTS(X,CODE,OUTER_CODE) \ 1987 case ASHIFT: \ 1988 if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1989 && GET_MODE (XEXP (X, 0)) == SImode) \ 1990 { \ 1991 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ 1992 \ 1993 if (value == 1) \ 1994 return COSTS_N_INSNS (ix86_cost->add) \ 1995 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 1996 \ 1997 if (value == 2 || value == 3) \ 1998 return COSTS_N_INSNS (ix86_cost->lea) \ 1999 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 2000 } \ 2001 /* fall through */ \ 2002 \ 2003 case ROTATE: \ 2004 case ASHIFTRT: \ 2005 case LSHIFTRT: \ 2006 case ROTATERT: \ 2007 if (GET_MODE (XEXP (X, 0)) == DImode) \ 2008 { \ 2009 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 2010 { \ 2011 if (INTVAL (XEXP (X, 1)) > 32) \ 2012 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \ 2013 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \ 2014 } \ 2015 return ((GET_CODE (XEXP (X, 1)) == AND \ 2016 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \ 2017 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \ 2018 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \ 2019 } \ 2020 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \ 2021 ? ix86_cost->shift_const \ 2022 : ix86_cost->shift_var) \ 2023 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 2024 \ 2025 case MULT: \ 2026 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 2027 { \ 2028 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \ 2029 int nbits = 0; \ 2030 \ 2031 if (value == 2) \ 2032 return COSTS_N_INSNS (ix86_cost->add) \ 2033 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 2034 if (value == 4 || value == 8) \ 2035 return COSTS_N_INSNS (ix86_cost->lea) \ 2036 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 2037 \ 2038 while (value != 0) \ 2039 { \ 2040 nbits++; \ 2041 value >>= 1; \ 2042 } \ 2043 \ 2044 if (nbits == 1) \ 2045 return COSTS_N_INSNS (ix86_cost->shift_const) \ 2046 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 2047 \ 2048 return COSTS_N_INSNS (ix86_cost->mult_init \ 2049 + nbits * ix86_cost->mult_bit) \ 2050 + rtx_cost(XEXP (X, 0), OUTER_CODE); \ 2051 } \ 2052 \ 2053 else /* This is arbitrary */ \ 2054 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ 2055 + 7 * ix86_cost->mult_bit); \ 2056 \ 2057 case DIV: \ 2058 case UDIV: \ 2059 case MOD: \ 2060 case UMOD: \ 2061 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \ 2062 \ 2063 case PLUS: \ 2064 if (GET_CODE (XEXP (X, 0)) == REG \ 2065 && GET_MODE (XEXP (X, 0)) == SImode \ 2066 && GET_CODE (XEXP (X, 1)) == PLUS) \ 2067 return COSTS_N_INSNS (ix86_cost->lea); \ 2068 \ 2069 /* fall through */ \ 2070 case AND: \ 2071 case IOR: \ 2072 case XOR: \ 2073 case MINUS: \ 2074 if (GET_MODE (X) == DImode) \ 2075 return COSTS_N_INSNS (ix86_cost->add) * 2 \ 2076 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \ 2077 << (GET_MODE (XEXP (X, 0)) != DImode)) \ 2078 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \ 2079 << (GET_MODE (XEXP (X, 1)) != DImode)); \ 2080 case NEG: \ 2081 case NOT: \ 2082 if (GET_MODE (X) == DImode) \ 2083 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \ 2084 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add) 2085 2086 2087/* An expression giving the cost of an addressing mode that contains 2088 ADDRESS. If not defined, the cost is computed from the ADDRESS 2089 expression and the `CONST_COSTS' values. 2090 2091 For most CISC machines, the default cost is a good approximation 2092 of the true cost of the addressing mode. However, on RISC 2093 machines, all instructions normally have the same length and 2094 execution time. Hence all addresses will have equal costs. 2095 2096 In cases where more than one form of an address is known, the form 2097 with the lowest cost will be used. If multiple forms have the 2098 same, lowest, cost, the one that is the most complex will be used. 2099 2100 For example, suppose an address that is equal to the sum of a 2101 register and a constant is used twice in the same basic block. 2102 When this macro is not defined, the address will be computed in a 2103 register and memory references will be indirect through that 2104 register. On machines where the cost of the addressing mode 2105 containing the sum is no higher than that of a simple indirect 2106 reference, this will produce an additional instruction and 2107 possibly require an additional register. Proper specification of 2108 this macro eliminates this overhead for such machines. 2109 2110 Similar use of this macro is made in strength reduction of loops. 2111 2112 ADDRESS need not be valid as an address. In such a case, the cost 2113 is not relevant and can be any value; invalid addresses need not be 2114 assigned a different cost. 2115 2116 On machines where an address involving more than one register is as 2117 cheap as an address computation involving only one register, 2118 defining `ADDRESS_COST' to reflect this can cause two registers to 2119 be live over a region of code where only one would have been if 2120 `ADDRESS_COST' were not defined in that manner. This effect should 2121 be considered in the definition of this macro. Equivalent costs 2122 should probably only be given to addresses with different numbers 2123 of registers on machines with lots of registers. 2124 2125 This macro will normally either not be defined or be defined as a 2126 constant. 2127 |
2128 For i386, it is better to use a complex address than let gcc copy 2129 the address into a reg and make a new pseudo. But not if the address 2130 requires to two regs - that would mean more pseudos with longer 2131 lifetimes. */ 2132 2133#define ADDRESS_COST(RTX) \ 2134 ((CONSTANT_P (RTX) \ 2135 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \ 2136 && REG_P (XEXP (RTX, 0)))) ? 0 \ 2137 : REG_P (RTX) ? 1 \ 2138 : 2) |
2139 2140/* A C expression for the cost of moving data of mode M between a 2141 register and memory. A value of 2 is the default; this cost is 2142 relative to those in `REGISTER_MOVE_COST'. 2143 2144 If moving between registers and memory is more expensive than 2145 between two registers, you should define this macro to express the 2146 relative cost. 2147 2148 On the i386, copying between floating-point and fixed-point 2149 registers is expensive. */ 2150 2151#define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 2152 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \ 2153 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \ 2154 : 2) 2155 2156 2157/* A C expression for the cost of moving data of mode M between a 2158 register and memory. A value of 2 is the default; this cost is 2159 relative to those in `REGISTER_MOVE_COST'. 2160 2161 If moving between registers and memory is more expensive than 2162 between two registers, you should define this macro to express the 2163 relative cost. */ 2164 2165/* #define MEMORY_MOVE_COST(M,C,I) 2 */ 2166 2167/* A C expression for the cost of a branch instruction. A value of 1 2168 is the default; other values are interpreted relative to that. */ 2169 2170#define BRANCH_COST i386_branch_cost 2171 2172/* Define this macro as a C expression which is nonzero if accessing 2173 less than a word of memory (i.e. a `char' or a `short') is no 2174 faster than accessing a word of memory, i.e., if such access 2175 require more than one instruction or if there is no difference in 2176 cost between byte and (aligned) word loads. 2177 2178 When this macro is not defined, the compiler will access a field by 2179 finding the smallest containing object; when it is defined, a 2180 fullword load will be used if alignment permits. Unless bytes 2181 accesses are faster than word accesses, using word accesses is 2182 preferable since it may eliminate subsequent memory access if 2183 subsequent accesses occur to other fields in the same word of the 2184 structure, but to different bytes. */ 2185 2186#define SLOW_BYTE_ACCESS 0 2187 2188/* Nonzero if access to memory by shorts is slow and undesirable. */ 2189#define SLOW_SHORT_ACCESS 0 2190 2191/* Define this macro if zero-extension (of a `char' or `short' to an 2192 `int') can be done faster if the destination is a register that is 2193 known to be zero. 2194 2195 If you define this macro, you must have instruction patterns that 2196 recognize RTL structures like this: 2197 2198 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...) 2199 2200 and likewise for `HImode'. */ 2201 2202/* #define SLOW_ZERO_EXTEND */ 2203 2204/* Define this macro to be the value 1 if unaligned accesses have a 2205 cost many times greater than aligned accesses, for example if they 2206 are emulated in a trap handler. 2207 2208 When this macro is non-zero, the compiler will act as if 2209 `STRICT_ALIGNMENT' were non-zero when generating code for block 2210 moves. This can cause significantly more instructions to be 2211 produced. Therefore, do not set this macro non-zero if unaligned 2212 accesses only add a cycle or two to the time for a memory access. 2213 2214 If the value of this macro is always zero, it need not be defined. */ 2215 2216/* #define SLOW_UNALIGNED_ACCESS 0 */ 2217 2218/* Define this macro to inhibit strength reduction of memory 2219 addresses. (On some machines, such strength reduction seems to do 2220 harm rather than good.) */ 2221 2222/* #define DONT_REDUCE_ADDR */ 2223 2224/* Define this macro if it is as good or better to call a constant 2225 function address than to call an address kept in a register. 2226 2227 Desirable on the 386 because a CALL with a constant address is 2228 faster than one with a register address. */ 2229 2230#define NO_FUNCTION_CSE 2231 2232/* Define this macro if it is as good or better for a function to call 2233 itself with an explicit address than to call an address kept in a 2234 register. */ 2235 2236#define NO_RECURSIVE_FUNCTION_CSE 2237 2238/* A C statement (sans semicolon) to update the integer variable COST 2239 based on the relationship between INSN that is dependent on 2240 DEP_INSN through the dependence LINK. The default is to make no 2241 adjustment to COST. This can be used for example to specify to 2242 the scheduler that an output- or anti-dependence does not incur 2243 the same cost as a data-dependence. */ 2244 2245#define ADJUST_COST(insn,link,dep_insn,cost) \ 2246 { \ 2247 rtx next_inst; \ 2248 if (GET_CODE (dep_insn) == CALL_INSN) \ 2249 (cost) = 0; \ 2250 \ 2251 else if (GET_CODE (dep_insn) == INSN \ 2252 && GET_CODE (PATTERN (dep_insn)) == SET \ 2253 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \ 2254 && GET_CODE (insn) == INSN \ 2255 && GET_CODE (PATTERN (insn)) == SET \ 2256 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \ 2257 SET_SRC (PATTERN (insn)))) \ 2258 { \ 2259 (cost) = 0; \ 2260 } \ 2261 \ 2262 else if (GET_CODE (insn) == JUMP_INSN) \ 2263 { \ 2264 (cost) = 0; \ 2265 } \ 2266 \ 2267 if (TARGET_PENTIUM) \ 2268 { \ 2269 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \ 2270 && !is_fp_dest (dep_insn)) \ 2271 { \ 2272 (cost) = 0; \ 2273 } \ 2274 \ 2275 if (agi_dependent (insn, dep_insn)) \ 2276 { \ 2277 (cost) = 3; \ 2278 } \ 2279 else if (GET_CODE (insn) == INSN \ 2280 && GET_CODE (PATTERN (insn)) == SET \ 2281 && SET_DEST (PATTERN (insn)) == cc0_rtx \ 2282 && (next_inst = next_nonnote_insn (insn)) \ 2283 && GET_CODE (next_inst) == JUMP_INSN) \ 2284 { /* compare probably paired with jump */ \ 2285 (cost) = 0; \ 2286 } \ 2287 } \ 2288 else \ 2289 if (!is_fp_dest (dep_insn)) \ 2290 { \ 2291 if(!agi_dependent (insn, dep_insn)) \ 2292 (cost) = 0; \ 2293 else if (TARGET_486) \ 2294 (cost) = 2; \ 2295 } \ 2296 else \ 2297 if (is_fp_store (insn) && is_fp_insn (dep_insn) \ 2298 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \ 2299 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \ 2300 && (GET_CODE (NEXT_INSN (insn)) == INSN) \ 2301 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \ 2302 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \ 2303 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \ 2304 == NOTE_INSN_LOOP_END)) \ 2305 { \ 2306 (cost) = 3; \ 2307 } \ 2308 } 2309 2310 2311#define ADJUST_BLOCKAGE(last_insn,insn,blockage) \ 2312{ \ 2313 if (is_fp_store (last_insn) && is_fp_insn (insn) \ 2314 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \ 2315 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \ 2316 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \ 2317 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \ 2318 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \ 2319 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \ 2320 == NOTE_INSN_LOOP_END)) \ 2321 { \ 2322 (blockage) = 3; \ 2323 } \ 2324} 2325 |
2326 2327/* Add any extra modes needed to represent the condition code. 2328 2329 For the i386, we need separate modes when floating-point equality 2330 comparisons are being done. */ 2331 2332#define EXTRA_CC_MODES CCFPEQmode 2333 --- 16 unchanged lines hidden (view full) --- 2350 2351extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)(); 2352 2353/* Tell final.c how to eliminate redundant test instructions. */ 2354 2355/* Here we define machine-dependent flags and fields in cc_status 2356 (see `conditions.h'). */ 2357 |
2358/* Set if the cc value was actually from the 80387 and 2359 we are testing eax directly (i.e. no sahf) */ 2360#define CC_TEST_AX 020000 2361 |
2362/* Set if the cc value is actually in the 80387, so a floating point 2363 conditional branch must be output. */ 2364#define CC_IN_80387 04000 2365 2366/* Set if the CC value was stored in a nonstandard way, so that 2367 the state of equality is indicated by zero in the carry bit. */ 2368#define CC_Z_IN_NOT_C 010000 2369 |
2370/* Set if the CC value was actually from the 80387 and loaded directly 2371 into the eflags instead of via eax/sahf. */ 2372#define CC_FCOMI 040000 2373 |
2374/* Store in cc_status the expressions 2375 that the condition codes will describe 2376 after execution of an instruction whose pattern is EXP. 2377 Do not alter them if the instruction would not alter the cc's. */ 2378 2379#define NOTICE_UPDATE_CC(EXP, INSN) \ 2380 notice_update_cc((EXP)) 2381 --- 29 unchanged lines hidden (view full) --- 2411{"ax","dx","cx","bx","si","di","bp","sp", \ 2412 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" } 2413 2414#define REGISTER_NAMES HI_REGISTER_NAMES 2415 2416/* Table of additional register names to use in user input. */ 2417 2418#define ADDITIONAL_REGISTER_NAMES \ |
2419{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 2420 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 2421 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 2422 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } } |
2423 2424/* Note we are omitting these since currently I don't know how 2425to get gcc to use these, since they want the same but different 2426number as al, and ax. 2427*/ 2428 2429/* note the last four are not really qi_registers, but 2430 the md will have to never output movb into one of them --- 17 unchanged lines hidden (view full) --- 2448 (n) == 2 ? 1 : \ 2449 (n) == 3 ? 3 : \ 2450 (n) == 4 ? 6 : \ 2451 (n) == 5 ? 7 : \ 2452 (n) == 6 ? 4 : \ 2453 (n) == 7 ? 5 : \ 2454 (n) + 4) 2455 |
2456/* Before the prologue, RA is at 0(%esp). */ 2457#define INCOMING_RETURN_ADDR_RTX \ 2458 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 2459 2460/* After the prologue, RA is at -4(AP) in the current frame. */ 2461#define RETURN_ADDR_RTX(COUNT, FRAME) \ 2462 ((COUNT) == 0 \ 2463 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\ 2464 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4)))) 2465 2466/* PC is dbx register 8; let's use that column for RA. */ 2467#define DWARF_FRAME_RETURN_COLUMN 8 2468 2469/* Before the prologue, the top of the frame is at 4(%esp). */ 2470#define INCOMING_FRAME_SP_OFFSET 4 2471 |
2472/* This is how to output the definition of a user-level label named NAME, 2473 such as the label on a static function or variable NAME. */ 2474 2475#define ASM_OUTPUT_LABEL(FILE,NAME) \ 2476 (assemble_name (FILE, NAME), fputs (":\n", FILE)) 2477 2478/* This is how to output an assembler line defining a `double' constant. */ 2479 2480#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 2481do { long l[2]; \ 2482 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \ |
2483 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \ |
2484 } while (0) 2485 2486/* This is how to output a `long double' extended real constant. */ 2487 2488#undef ASM_OUTPUT_LONG_DOUBLE 2489#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \ 2490do { long l[3]; \ 2491 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \ |
2492 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \ |
2493 } while (0) 2494 2495/* This is how to output an assembler line defining a `float' constant. */ 2496 2497#define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 2498do { long l; \ 2499 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ |
2500 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \ |
2501 } while (0) 2502 2503/* Store in OUTPUT a string (made with alloca) containing 2504 an assembler-name for a local static variable named NAME. 2505 LABELNO is an integer which is different for each call. */ 2506 2507#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 2508( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ --- 35 unchanged lines hidden (view full) --- 2544 2545#define ASM_OUTPUT_BYTE(FILE,VALUE) \ 2546 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE)) 2547 2548/* This is how to output an insn to push a register on the stack. 2549 It need not be very fast code. */ 2550 2551#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ |
2552 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO]) |
2553 2554/* This is how to output an insn to pop a register from the stack. 2555 It need not be very fast code. */ 2556 2557#define ASM_OUTPUT_REG_POP(FILE,REGNO) \ |
2558 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO]) |
2559 2560/* This is how to output an element of a case-vector that is absolute. 2561 */ 2562 2563#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 2564 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE) 2565 2566/* This is how to output an element of a case-vector that is relative. 2567 We don't use these on the 386 yet, because the ATT assembler can't do 2568 forward reference the differences. 2569 */ 2570 |
2571#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
2572 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL) 2573 2574/* Define the parentheses used to group arithmetic operations 2575 in assembler code. */ 2576 2577#define ASM_OPEN_PAREN "" 2578#define ASM_CLOSE_PAREN "" 2579 --- 12 unchanged lines hidden (view full) --- 2592 outputs b,w,or l respectively. 2593 2594 On the 80386, we use several such letters: 2595 f -- float insn (print a CONST_DOUBLE as a float rather than in hex). 2596 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand. 2597 R -- print the prefix for register names. 2598 z -- print the opcode suffix for the size of the current operand. 2599 * -- print a star (in certain assembler syntax) |
2600 P -- if PIC, print an @PLT suffix. 2601 X -- don't print any sort of PIC '@' suffix for a symbol. 2602 J -- print jump insn for arithmetic_comparison_operator. 2603 s -- ??? something to do with double shifts. not actually used, afaik. 2604 C -- print a conditional move suffix corresponding to the op code. 2605 c -- likewise, but reverse the condition. 2606 F,f -- likewise, but for floating-point. */ |
2607 2608#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2609 ((CODE) == '*') 2610 2611/* Print the name of a register based on its machine mode and number. 2612 If CODE is 'w', pretend the mode is HImode. 2613 If CODE is 'b', pretend the mode is QImode. 2614 If CODE is 'k', pretend the mode is SImode. --- 88 unchanged lines hidden (view full) --- 2703 (FP_REGNO_P (REGNO) \ 2704 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER)) 2705*/ 2706 2707/* a letter which is not needed by the normal asm syntax, which 2708 we can use for operand syntax in the extended asm */ 2709 2710#define ASM_OPERAND_LETTER '#' |
2711#define RET return "" |
2712#define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx)) |
2713 |
2714/* Helper macros to expand a binary/unary operator if needed */ 2715#define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \ 2716do { \ 2717 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \ 2718 FAIL; \ 2719} while (0) 2720 2721#define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \ 2722do { \ 2723 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \ 2724 FAIL; \ 2725} while (0) 2726 2727 |
2728/* Functions in i386.c */ 2729extern void override_options (); 2730extern void order_regs_for_local_alloc (); |
2731extern char *output_strlen_unroll (); 2732extern struct rtx_def *i386_sext16_if_const (); 2733extern int i386_aligned_p (); 2734extern int i386_cc_probably_useless_p (); |
2735extern int i386_valid_decl_attribute_p (); 2736extern int i386_valid_type_attribute_p (); 2737extern int i386_return_pops_args (); 2738extern int i386_comp_type_attributes (); 2739extern void init_cumulative_args (); 2740extern void function_arg_advance (); 2741extern struct rtx_def *function_arg (); 2742extern int function_arg_partial_nregs (); |
2743extern char *output_strlen_unroll (); |
2744extern void output_op_from_reg (); 2745extern void output_to_reg (); 2746extern char *singlemove_string (); 2747extern char *output_move_double (); 2748extern char *output_move_memory (); 2749extern char *output_move_pushmem (); 2750extern int standard_80387_constant_p (); 2751extern char *output_move_const_single (); 2752extern int symbolic_operand (); 2753extern int call_insn_operand (); 2754extern int expander_call_insn_operand (); 2755extern int symbolic_reference_mentioned_p (); |
2756extern int ix86_expand_binary_operator (); 2757extern int ix86_binary_operator_ok (); 2758extern int ix86_expand_unary_operator (); 2759extern int ix86_unary_operator_ok (); |
2760extern void emit_pic_move (); 2761extern void function_prologue (); 2762extern int simple_386_epilogue (); 2763extern void function_epilogue (); 2764extern int legitimate_address_p (); 2765extern struct rtx_def *legitimize_pic_address (); 2766extern struct rtx_def *legitimize_address (); 2767extern void print_operand (); --- 6 unchanged lines hidden (view full) --- 2774extern char *output_387_binary_op (); 2775extern char *output_fix_trunc (); 2776extern char *output_float_compare (); 2777extern char *output_fp_cc0_set (); 2778extern void save_386_machine_status (); 2779extern void restore_386_machine_status (); 2780extern void clear_386_stack_locals (); 2781extern struct rtx_def *assign_386_stack_local (); |
2782extern int is_mul (); 2783extern int is_div (); 2784extern int last_to_set_cc (); 2785extern int doesnt_set_condition_code (); 2786extern int sets_condition_code (); 2787extern int str_immediate_operand (); 2788extern int is_fp_insn (); 2789extern int is_fp_dest (); 2790extern int is_fp_store (); 2791extern int agi_dependent (); 2792extern int reg_mentioned_in_mem (); 2793extern char *output_int_conditional_move (); 2794extern char *output_fp_conditional_move (); 2795extern int ix86_can_use_return_insn_p (); |
2796 |
2797#ifdef NOTYET 2798extern struct rtx_def *copy_all_rtx (); 2799extern void rewrite_address (); 2800#endif 2801 |
2802/* Variables in i386.c */ |
2803extern char *ix86_cpu_string; /* for -mcpu=<xxx> */ 2804extern char *ix86_arch_string; /* for -march=<xxx> */ |
2805extern char *i386_reg_alloc_order; /* register allocation order */ 2806extern char *i386_regparm_string; /* # registers to use to pass args */ 2807extern char *i386_align_loops_string; /* power of two alignment for loops */ 2808extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */ 2809extern char *i386_align_funcs_string; /* power of two alignment for functions */ |
2810extern char *i386_branch_cost_string; /* values 1-5: see jump.c */ |
2811extern int i386_regparm; /* i386_regparm_string as a number */ 2812extern int i386_align_loops; /* power of two alignment for loops */ 2813extern int i386_align_jumps; /* power of two alignment for non-loop jumps */ 2814extern int i386_align_funcs; /* power of two alignment for functions */ |
2815extern int i386_branch_cost; /* values 1-5: see jump.c */ |
2816extern char *hi_reg_name[]; /* names for 16 bit regs */ 2817extern char *qi_reg_name[]; /* names for 8 bit regs (low) */ 2818extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */ 2819extern enum reg_class regclass_map[]; /* smalled class containing REGNO */ 2820extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */ 2821extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */ 2822 2823/* External variables used */ |
2824extern int optimize; /* optimization level */ 2825extern int obey_regdecls; /* TRUE if stupid register allocation */ |
2826 2827/* External functions used */ 2828extern struct rtx_def *force_operand (); |
2829 |
2830 2831/* 2832Local variables: 2833version-control: t 2834End: 2835*/ |